2 * (C) Copyright 2002, 2003
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
5 * Gary Jennejohn <garyj@denx.de>
6 * David Mueller <d.mueller@elsoft.ch>
8 * Configuation settings for the MPL VCMA9 board.
10 * SPDX-License-Identifier: GPL-2.0+
17 #define MACH_TYPE_MPL_VCMA9 227
20 * High Level Configuration Options
23 #define CONFIG_S3C24X0 /* This is a SAMSUNG S3C24x0-type SoC */
24 #define CONFIG_S3C2410 /* specifically a SAMSUNG S3C2410 SoC */
25 #define CONFIG_VCMA9 /* on a MPL VCMA9 Board */
26 #define CONFIG_MACH_TYPE MACH_TYPE_MPL_VCMA9 /* Machine type */
28 #define CONFIG_SYS_TEXT_BASE 0x0
30 #define CONFIG_SYS_GENERIC_BOARD
32 #define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
34 /* input clock of PLL (VCMA9 has 12MHz input clock) */
35 #define CONFIG_SYS_CLK_FREQ 12000000
37 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
38 #define CONFIG_SETUP_MEMORY_TAGS
39 #define CONFIG_INITRD_TAG
44 #define CONFIG_BOOTP_BOOTFILESIZE
45 #define CONFIG_BOOTP_BOOTPATH
46 #define CONFIG_BOOTP_GATEWAY
47 #define CONFIG_BOOTP_HOSTNAME
50 * Command line configuration.
52 #include <config_cmd_default.h>
54 #define CONFIG_CMD_CACHE
55 #define CONFIG_CMD_EEPROM
56 #define CONFIG_CMD_I2C
57 #define CONFIG_CMD_USB
58 #define CONFIG_CMD_REGINFO
59 #define CONFIG_CMD_DATE
60 #define CONFIG_CMD_ELF
61 #define CONFIG_CMD_DHCP
62 #define CONFIG_CMD_PING
63 #define CONFIG_CMD_BSP
64 #define CONFIG_CMD_NAND
66 #define CONFIG_BOARD_LATE_INIT
68 #define CONFIG_SYS_HUSH_PARSER
69 #define CONFIG_CMDLINE_EDITING
73 * the MPL VCMA9 is equipped with an ATMEL 24C256 EEPROM at
74 * address 0x50 with 16bit addressing
76 #define CONFIG_SYS_I2C
78 /* we use the built-in I2C controller */
79 #define CONFIG_SYS_I2C_S3C24X0
80 #define CONFIG_SYS_I2C_S3C24X0_SPEED 100000 /* I2C speed */
81 #define CONFIG_SYS_I2C_S3C24X0_SLAVE 0x7F /* I2C slave addr */
83 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
84 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
85 /* use EEPROM for environment vars */
86 #define CONFIG_ENV_IS_IN_EEPROM 1
87 /* environment starts at offset 0 */
88 #define CONFIG_ENV_OFFSET 0x000
89 /* 2KB should be more than enough */
90 #define CONFIG_ENV_SIZE 0x800
92 #undef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
93 /* 64 bytes page write mode on 24C256 */
94 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
95 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
100 #define CONFIG_CS8900 /* we have a CS8900 on-board */
101 #define CONFIG_CS8900_BASE 0x20000300
102 #define CONFIG_CS8900_BUS16
105 * select serial console configuration
107 #define CONFIG_S3C24X0_SERIAL
108 #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on VCMA9 */
110 /* USB support (currently only works with D-cache off) */
111 #define CONFIG_USB_OHCI
112 #define CONFIG_USB_OHCI_S3C24XX
113 #define CONFIG_USB_KEYBOARD
114 #define CONFIG_USB_STORAGE
115 #define CONFIG_DOS_PARTITION
117 /* Enable needed helper functions */
118 #define CONFIG_SYS_STDIO_DEREGISTER /* needs stdio_deregister */
121 #define CONFIG_RTC_S3C24X0
124 /* allow to overwrite serial and ethaddr */
125 #define CONFIG_ENV_OVERWRITE
127 #define CONFIG_BAUDRATE 9600
129 #define CONFIG_BOOTDELAY 5
130 #define CONFIG_BOOT_RETRY_TIME -1
131 #define CONFIG_RESET_TO_RETRY
132 #define CONFIG_ZERO_BOOTDELAY_CHECK
134 #define CONFIG_NETMASK 255.255.255.0
135 #define CONFIG_IPADDR 10.0.0.110
136 #define CONFIG_SERVERIP 10.0.0.1
138 #if defined(CONFIG_CMD_KGDB)
139 /* speed to run kgdb serial port */
140 #define CONFIG_KGDB_BAUDRATE 115200
143 /* Miscellaneous configurable options */
144 #define CONFIG_SYS_LONGHELP /* undef to save memory */
145 #define CONFIG_SYS_PROMPT "VCMA9 # "
146 #define CONFIG_SYS_CBSIZE 256
147 /* Print Buffer Size */
148 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
149 #define CONFIG_SYS_MAXARGS 16
150 /* Boot Argument Buffer Size */
151 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
153 #define CONFIG_DISPLAY_CPUINFO /* Display cpu info */
154 #define CONFIG_DISPLAY_BOARDINFO /* Display board info */
156 #define CONFIG_SYS_MEMTEST_START 0x30000000 /* memtest works on */
157 #define CONFIG_SYS_MEMTEST_END 0x31FFFFFF /* 32 MB in DRAM */
159 #define CONFIG_SYS_ALT_MEMTEST
160 #define CONFIG_SYS_LOAD_ADDR 0x30800000
162 /* we configure PWM Timer 4 to 1ms 1000Hz */
164 /* support additional compression methods */
170 /*#define VERSION_TAG "released"*/
171 #define VERSION_TAG "unstable"
172 #define CONFIG_IDENT_STRING "\n(c) 2003 - 2011 by MPL AG Switzerland, " \
173 "MEV-10080-001 " VERSION_TAG
175 /* Physical Memory Map */
176 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
177 #define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */
178 #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
180 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
182 /* FLASH and environment organization */
184 #define CONFIG_SYS_FLASH_CFI
185 #define CONFIG_FLASH_CFI_DRIVER
186 #define CONFIG_FLASH_CFI_LEGACY
187 #define CONFIG_SYS_FLASH_LEGACY_512Kx16
188 #define CONFIG_FLASH_SHOW_PROGRESS 45
189 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
190 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
191 #define CONFIG_SYS_MAX_FLASH_SECT (19)
194 * Size of malloc() pool
195 * BZIP2 / LZO / LZMA need a lot of RAM
197 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
198 #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
199 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
201 /* NAND configuration */
202 #ifdef CONFIG_CMD_NAND
203 #define CONFIG_NAND_S3C2410
204 #define CONFIG_SYS_S3C2410_NAND_HWECC
205 #define CONFIG_SYS_MAX_NAND_DEVICE 1
206 #define CONFIG_SYS_NAND_BASE 0x4E000000
207 #define CONFIG_S3C24XX_CUSTOM_NAND_TIMING
208 #define CONFIG_S3C24XX_TACLS 1
209 #define CONFIG_S3C24XX_TWRPH0 5
210 #define CONFIG_S3C24XX_TWRPH1 3
213 #define MULTI_PURPOSE_SOCKET_ADDR 0x08000000
216 #define CONFIG_CMD_FAT
217 #define CONFIG_CMD_UBI
218 #define CONFIG_CMD_UBIFS
219 #define CONFIG_CMD_JFFS2
220 #define CONFIG_YAFFS2
221 #define CONFIG_RBTREE
222 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
223 #define CONFIG_MTD_PARTITIONS
224 #define CONFIG_CMD_MTDPARTS
227 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
228 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
229 GENERATED_GBL_DATA_SIZE)
231 #define CONFIG_BOARD_EARLY_INIT_F
233 #endif /* __CONFIG_H */