include/configs/UCP1020.h

   1 /*
   2  * Copyright 2013-2015 Arcturus Networks, Inc.
   3  *           http://www.arcturusnetworks.com/products/ucp1020/
   4  * based on include/configs/p1_p2_rdb_pc.h
   5  * original copyright follows:
   6  * Copyright 2009-2011 Freescale Semiconductor, Inc.
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10
  11 /*
  12  * QorIQ uCP1020-xx boards configuration file
  13  */
  14 #ifndef __CONFIG_H
  15 #define __CONFIG_H
  16
  17 #define CONFIG_PCIE1    /* PCIE controller 1 (slot 1) */
  18 #define CONFIG_PCIE2    /* PCIE controller 2 (slot 2) */
  19 #define CONFIG_FSL_PCI_INIT     /* Use common FSL init code */
  20 #define CONFIG_PCI_INDIRECT_BRIDGE      /* indirect PCI bridge support */
  21 #define CONFIG_FSL_PCIE_RESET   /* need PCIe reset errata */
  22 #define CONFIG_SYS_PCI_64BIT    /* enable 64-bit PCI resources */
  23
  24 #if defined(CONFIG_TARTGET_UCP1020T1)
  25
  26 #define CONFIG_UCP1020_REV_1_3
  27
  28 #define CONFIG_BOARDNAME "uCP1020-64EE512-0U1-XR-T1"
  29
  30 #define CONFIG_TSEC_ENET
  31 #define CONFIG_TSEC1
  32 #define CONFIG_TSEC3
  33 #define CONFIG_HAS_ETH0
  34 #define CONFIG_HAS_ETH1
  35 #define CONFIG_ETHADDR          00:19:D3:FF:FF:FF
  36 #define CONFIG_ETH1ADDR         00:19:D3:FF:FF:FE
  37 #define CONFIG_ETH2ADDR         00:19:D3:FF:FF:FD
  38 #define CONFIG_IPADDR           10.80.41.229
  39 #define CONFIG_SERVERIP         10.80.41.227
  40 #define CONFIG_NETMASK          255.255.252.0
  41 #define CONFIG_ETHPRIME         "eTSEC3"
  42
  43 #ifndef CONFIG_SPI_FLASH
  44 #endif
  45 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
  46
  47 #define CONFIG_SYS_L2_SIZE      (256 << 10)
  48
  49 #define CONFIG_LAST_STAGE_INIT
  50
  51 #endif
  52
  53 #if defined(CONFIG_TARGET_UCP1020)
  54
  55 #define CONFIG_UCP1020
  56 #define CONFIG_UCP1020_REV_1_3
  57
  58 #define CONFIG_BOARDNAME_LOCAL "uCP1020-64EEE512-OU1-XR"
  59
  60 #define CONFIG_TSEC_ENET
  61 #define CONFIG_TSEC1
  62 #define CONFIG_TSEC2
  63 #define CONFIG_TSEC3
  64 #define CONFIG_HAS_ETH0
  65 #define CONFIG_HAS_ETH1
  66 #define CONFIG_HAS_ETH2
  67 #define CONFIG_ETHADDR          00:06:3B:FF:FF:FF
  68 #define CONFIG_ETH1ADDR         00:06:3B:FF:FF:FE
  69 #define CONFIG_ETH2ADDR         00:06:3B:FF:FF:FD
  70 #define CONFIG_IPADDR           192.168.1.81
  71 #define CONFIG_IPADDR1          192.168.1.82
  72 #define CONFIG_IPADDR2          192.168.1.83
  73 #define CONFIG_SERVERIP         192.168.1.80
  74 #define CONFIG_GATEWAYIP        102.168.1.1
  75 #define CONFIG_NETMASK          255.255.255.0
  76 #define CONFIG_ETHPRIME         "eTSEC1"
  77
  78 #ifndef CONFIG_SPI_FLASH
  79 #endif
  80 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
  81
  82 #define CONFIG_SYS_L2_SIZE      (256 << 10)
  83
  84 #define CONFIG_LAST_STAGE_INIT
  85
  86 #endif
  87
  88 #ifdef CONFIG_SDCARD
  89 #define CONFIG_RAMBOOT_SDCARD
  90 #define CONFIG_SYS_RAMBOOT
  91 #define CONFIG_SYS_EXTRA_ENV_RELOC
  92 #define CONFIG_SYS_TEXT_BASE            0x11000000
  93 #define CONFIG_RESET_VECTOR_ADDRESS     0x1107fffc
  94 #endif
  95
  96 #ifdef CONFIG_SPIFLASH
  97 #define CONFIG_RAMBOOT_SPIFLASH
  98 #define CONFIG_SYS_RAMBOOT
  99 #define CONFIG_SYS_EXTRA_ENV_RELOC
 100 #define CONFIG_SYS_TEXT_BASE            0x11000000
 101 #define CONFIG_RESET_VECTOR_ADDRESS     0x1107fffc
 102 #endif
 103
 104 #ifndef CONFIG_SYS_TEXT_BASE
 105 #define CONFIG_SYS_TEXT_BASE            0xeff80000
 106 #endif
 107 #define CONFIG_SYS_TEXT_BASE_NOR        0xeff80000
 108
 109 #ifndef CONFIG_RESET_VECTOR_ADDRESS
 110 #define CONFIG_RESET_VECTOR_ADDRESS     0xeffffffc
 111 #endif
 112
 113 #ifndef CONFIG_SYS_MONITOR_BASE
 114 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE    /* start of monitor */
 115 #endif
 116
 117 #define CONFIG_MP
 118
 119 #define CONFIG_ENV_OVERWRITE
 120
 121 #define CONFIG_CMD_SATA
 122 #define CONFIG_SATA_SIL
 123 #define CONFIG_SYS_SATA_MAX_DEVICE      2
 124 #define CONFIG_LIBATA
 125 #define CONFIG_LBA48
 126
 127 #define CONFIG_SYS_CLK_FREQ     66666666
 128 #define CONFIG_DDR_CLK_FREQ     66666666
 129
 130 #define CONFIG_HWCONFIG
 131
 132 #define CONFIG_DTT_ADM1021      1       /* ADM1021 temp sensor support  */
 133 #define CONFIG_SYS_DTT_BUS_NUM  1       /* The I2C bus for DTT          */
 134 #define CONFIG_DTT_SENSORS      { 0, 1 }        /* Sensor index */
 135 /*
 136  * ADM1021/NCT72 temp sensor configuration (see dtt/adm1021.c for details).
 137  * there will be one entry in this array for each two (dummy) sensors in
 138  * CONFIG_DTT_SENSORS.
 139  *
 140  * For uCP1020 module:
 141  * - only one ADM1021/NCT72
 142  * - i2c addr 0x41
 143  * - conversion rate 0x02 = 0.25 conversions/second
 144  * - ALERT output disabled
 145  * - local temp sensor enabled, min set to 0 deg, max set to 85 deg
 146  * - remote temp sensor enabled, min set to 0 deg, max set to 85 deg
 147  */
 148 #define CONFIG_SYS_DTT_ADM1021  { { CONFIG_SYS_I2C_NCT72_ADDR, \
 149                                          0x02, 0, 1, 0, 85, 1, 0, 85} }
 150
 151 #define CONFIG_CMD_DTT
 152
 153 /*
 154  * These can be toggled for performance analysis, otherwise use default.
 155  */
 156 #define CONFIG_L2_CACHE
 157 #define CONFIG_BTB
 158
 159 #define CONFIG_ENABLE_36BIT_PHYS
 160
 161 #define CONFIG_SYS_MEMTEST_START        0x00200000      /* memtest works on */
 162 #define CONFIG_SYS_MEMTEST_END          0x1fffffff
 163 #define CONFIG_PANIC_HANG       /* do not reset board on panic */
 164
 165 #define CONFIG_SYS_CCSRBAR              0xffe00000
 166 #define CONFIG_SYS_CCSRBAR_PHYS_LOW     CONFIG_SYS_CCSRBAR
 167
 168 /* IN case of NAND bootloader relocate CCSRBAR in RAMboot code not in the 4k
 169        SPL code*/
 170 #ifdef CONFIG_SPL_BUILD
 171 #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
 172 #endif
 173
 174 /* DDR Setup */
 175 #define CONFIG_DDR_ECC_ENABLE
 176 #ifndef CONFIG_DDR_ECC_ENABLE
 177 #define CONFIG_SYS_DDR_RAW_TIMING
 178 #define CONFIG_DDR_SPD
 179 #endif
 180 #define CONFIG_SYS_SPD_BUS_NUM 1
 181 #undef CONFIG_FSL_DDR_INTERACTIVE
 182
 183 #define CONFIG_SYS_SDRAM_SIZE_LAW       LAW_SIZE_512M
 184 #define CONFIG_CHIP_SELECTS_PER_CTRL    1
 185 #define CONFIG_SYS_SDRAM_SIZE           (1u << (CONFIG_SYS_SDRAM_SIZE_LAW - 19))
 186 #define CONFIG_SYS_DDR_SDRAM_BASE       0x00000000
 187 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
 188
 189 #define CONFIG_DIMM_SLOTS_PER_CTLR      1
 190
 191 /* Default settings for DDR3 */
 192 #define CONFIG_SYS_DDR_CS0_BNDS         0x0000003f
 193 #define CONFIG_SYS_DDR_CS0_CONFIG       0x80014302
 194 #define CONFIG_SYS_DDR_CS0_CONFIG_2     0x00000000
 195 #define CONFIG_SYS_DDR_CS1_BNDS         0x0040007f
 196 #define CONFIG_SYS_DDR_CS1_CONFIG       0x80014302
 197 #define CONFIG_SYS_DDR_CS1_CONFIG_2     0x00000000
 198
 199 #define CONFIG_SYS_DDR_DATA_INIT        0xdeadbeef
 200 #define CONFIG_SYS_DDR_INIT_ADDR        0x00000000
 201 #define CONFIG_SYS_DDR_INIT_EXT_ADDR    0x00000000
 202 #define CONFIG_SYS_DDR_MODE_CONTROL     0x00000000
 203
 204 #define CONFIG_SYS_DDR_ZQ_CONTROL       0x89080600
 205 #define CONFIG_SYS_DDR_WRLVL_CONTROL    0x8655A608
 206 #define CONFIG_SYS_DDR_SR_CNTR          0x00000000
 207 #define CONFIG_SYS_DDR_RCW_1            0x00000000
 208 #define CONFIG_SYS_DDR_RCW_2            0x00000000
 209 #ifdef CONFIG_DDR_ECC_ENABLE
 210 #define CONFIG_SYS_DDR_CONTROL          0xE70C0000      /* Type = DDR3 & ECC */
 211 #else
 212 #define CONFIG_SYS_DDR_CONTROL          0xC70C0000      /* Type = DDR3 */
 213 #endif
 214 #define CONFIG_SYS_DDR_CONTROL_2        0x04401050
 215 #define CONFIG_SYS_DDR_TIMING_4         0x00220001
 216 #define CONFIG_SYS_DDR_TIMING_5         0x03402400
 217
 218 #define CONFIG_SYS_DDR_TIMING_3         0x00020000
 219 #define CONFIG_SYS_DDR_TIMING_0         0x00330004
 220 #define CONFIG_SYS_DDR_TIMING_1         0x6f6B4846
 221 #define CONFIG_SYS_DDR_TIMING_2         0x0FA8C8CF
 222 #define CONFIG_SYS_DDR_CLK_CTRL         0x03000000
 223 #define CONFIG_SYS_DDR_MODE_1           0x40461520
 224 #define CONFIG_SYS_DDR_MODE_2           0x8000c000
 225 #define CONFIG_SYS_DDR_INTERVAL         0x0C300000
 226
 227 #undef CONFIG_CLOCKS_IN_MHZ
 228
 229 /*
 230  * Memory map
 231  *
 232  * 0x0000_0000 0x7fff_ffff      DDR             Up to 2GB cacheable
 233  * 0x8000_0000 0xdfff_ffff      PCI Express Mem 1G non-cacheable(PCIe * 2)
 234  * 0xec00_0000 0xefff_ffff      NOR flash       Up to 64M non-cacheable CS0/1
 235  * 0xf8f8_0000 0xf8ff_ffff      L2 SRAM         Up to 256K cacheable
 236  *   (early boot only)
 237  * 0xffc0_0000 0xffc3_ffff      PCI IO range    256k non-cacheable
 238  * 0xffd0_0000 0xffd0_3fff      L1 for stack    16K cacheable
 239  * 0xffe0_0000 0xffef_ffff      CCSR            1M non-cacheable
 240  */
 241
 242 /*
 243  * Local Bus Definitions
 244  */
 245 #define CONFIG_SYS_MAX_FLASH_SECT       512     /* 64M */
 246 #define CONFIG_SYS_FLASH_BASE           0xec000000
 247
 248 #define CONFIG_SYS_FLASH_BASE_PHYS      CONFIG_SYS_FLASH_BASE
 249
 250 #define CONFIG_FLASH_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) \
 251         | BR_PS_16 | BR_V)
 252
 253 #define CONFIG_FLASH_OR_PRELIM          0xfc000ff7
 254
 255 #define CONFIG_SYS_FLASH_BANKS_LIST     {CONFIG_SYS_FLASH_BASE_PHYS}
 256 #define CONFIG_SYS_FLASH_QUIET_TEST
 257 #define CONFIG_FLASH_SHOW_PROGRESS      45      /* count down from 45/5: 9..1 */
 258
 259 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* number of banks */
 260
 261 #undef CONFIG_SYS_FLASH_CHECKSUM
 262 #define CONFIG_SYS_FLASH_ERASE_TOUT     60000   /* Flash Erase Timeout (ms) */
 263 #define CONFIG_SYS_FLASH_WRITE_TOUT     500     /* Flash Write Timeout (ms) */
 264
 265 #define CONFIG_FLASH_CFI_DRIVER
 266 #define CONFIG_SYS_FLASH_CFI
 267 #define CONFIG_SYS_FLASH_EMPTY_INFO
 268 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
 269
 270 #define CONFIG_BOARD_EARLY_INIT_R       /* call board_early_init_r function */
 271
 272 #define CONFIG_SYS_INIT_RAM_LOCK
 273 #define CONFIG_SYS_INIT_RAM_ADDR        0xffd00000 /* stack in RAM */
 274 /* Initial L1 address */
 275 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS   CONFIG_SYS_INIT_RAM_ADDR
 276 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0
 277 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR_PHYS
 278 /* Size of used area in RAM */
 279 #define CONFIG_SYS_INIT_RAM_SIZE        0x00004000
 280
 281 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - \
 282                                         GENERATED_GBL_DATA_SIZE)
 283 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 284
 285 #define CONFIG_SYS_MONITOR_LEN  (256 * 1024)/* Reserve 256 kB for Mon */
 286 #define CONFIG_SYS_MALLOC_LEN   (1024 * 1024)/* Reserved for malloc */
 287
 288 #define CONFIG_SYS_PMC_BASE     0xff980000
 289 #define CONFIG_SYS_PMC_BASE_PHYS        CONFIG_SYS_PMC_BASE
 290 #define CONFIG_PMC_BR_PRELIM    (BR_PHYS_ADDR(CONFIG_SYS_PMC_BASE_PHYS) | \
 291                                         BR_PS_8 | BR_V)
 292 #define CONFIG_PMC_OR_PRELIM    (OR_AM_64KB | OR_GPCM_CSNT | OR_GPCM_XACS | \
 293                                  OR_GPCM_SCY | OR_GPCM_TRLX | OR_GPCM_EHTR | \
 294                                  OR_GPCM_EAD)
 295
 296 #define CONFIG_SYS_BR0_PRELIM   CONFIG_FLASH_BR_PRELIM  /* NOR Base Address */
 297 #define CONFIG_SYS_OR0_PRELIM   CONFIG_FLASH_OR_PRELIM  /* NOR Options */
 298 #ifdef CONFIG_NAND_FSL_ELBC
 299 #define CONFIG_SYS_BR1_PRELIM   CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Addr */
 300 #define CONFIG_SYS_OR1_PRELIM   CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
 301 #endif
 302
 303 /* Serial Port - controlled on board with jumper J8
 304  * open - index 2
 305  * shorted - index 1
 306  */
 307 #define CONFIG_CONS_INDEX               1
 308 #undef CONFIG_SERIAL_SOFTWARE_FIFO
 309 #define CONFIG_SYS_NS16550_SERIAL
 310 #define CONFIG_SYS_NS16550_REG_SIZE     1
 311 #define CONFIG_SYS_NS16550_CLK          get_bus_freq(0)
 312 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_INIT_MINIMAL)
 313 #define CONFIG_NS16550_MIN_FUNCTIONS
 314 #endif
 315
 316 #define CONFIG_SYS_BAUDRATE_TABLE       \
 317         {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
 318
 319 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR + 0x4500)
 320 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR + 0x4600)
 321
 322 /* I2C */
 323 #define CONFIG_SYS_I2C
 324 #define CONFIG_SYS_I2C_FSL
 325 #define CONFIG_SYS_FSL_I2C_SPEED        400000
 326 #define CONFIG_SYS_FSL_I2C_SLAVE        0x7F
 327 #define CONFIG_SYS_FSL_I2C_OFFSET       0x3000
 328 #define CONFIG_SYS_FSL_I2C2_SPEED       400000
 329 #define CONFIG_SYS_FSL_I2C2_SLAVE       0x7F
 330 #define CONFIG_SYS_FSL_I2C2_OFFSET      0x3100
 331 #define CONFIG_SYS_I2C_NOPROBES         { {0, 0x29} }
 332 #define CONFIG_SYS_SPD_BUS_NUM          1 /* For rom_loc and flash bank */
 333
 334 #define CONFIG_RTC_DS1337
 335 #define CONFIG_SYS_RTC_DS1337_NOOSC
 336 #define CONFIG_SYS_I2C_RTC_ADDR         0x68
 337 #define CONFIG_SYS_I2C_PCA9557_ADDR     0x18
 338 #define CONFIG_SYS_I2C_NCT72_ADDR       0x4C
 339 #define CONFIG_SYS_I2C_IDT6V49205B      0x69
 340
 341 /*
 342  * eSPI - Enhanced SPI
 343  */
 344 #define CONFIG_HARD_SPI
 345
 346 #define CONFIG_SF_DEFAULT_SPEED         10000000
 347 #define CONFIG_SF_DEFAULT_MODE          SPI_MODE_0
 348
 349 #if defined(CONFIG_PCI)
 350 /*
 351  * General PCI
 352  * Memory space is mapped 1-1, but I/O space must start from 0.
 353  */
 354
 355 /* controller 2, direct to uli, tgtid 2, Base address 9000 */
 356 #define CONFIG_SYS_PCIE2_NAME           "PCIe SLOT CON9"
 357 #define CONFIG_SYS_PCIE2_MEM_VIRT       0xa0000000
 358 #define CONFIG_SYS_PCIE2_MEM_BUS        0xa0000000
 359 #define CONFIG_SYS_PCIE2_MEM_PHYS       0xa0000000
 360 #define CONFIG_SYS_PCIE2_MEM_SIZE       0x20000000      /* 512M */
 361 #define CONFIG_SYS_PCIE2_IO_VIRT        0xffc10000
 362 #define CONFIG_SYS_PCIE2_IO_BUS         0x00000000
 363 #define CONFIG_SYS_PCIE2_IO_PHYS        0xffc10000
 364 #define CONFIG_SYS_PCIE2_IO_SIZE        0x00010000      /* 64k */
 365
 366 /* controller 1, Slot 2, tgtid 1, Base address a000 */
 367 #define CONFIG_SYS_PCIE1_NAME           "PCIe SLOT CON10"
 368 #define CONFIG_SYS_PCIE1_MEM_VIRT       0x80000000
 369 #define CONFIG_SYS_PCIE1_MEM_BUS        0x80000000
 370 #define CONFIG_SYS_PCIE1_MEM_PHYS       0x80000000
 371 #define CONFIG_SYS_PCIE1_MEM_SIZE       0x20000000      /* 512M */
 372 #define CONFIG_SYS_PCIE1_IO_VIRT        0xffc00000
 373 #define CONFIG_SYS_PCIE1_IO_BUS         0x00000000
 374 #define CONFIG_SYS_PCIE1_IO_PHYS        0xffc00000
 375 #define CONFIG_SYS_PCIE1_IO_SIZE        0x00010000      /* 64k */
 376
 377 #define CONFIG_CMD_PCI
 378
 379 #define CONFIG_PCI_SCAN_SHOW    /* show pci devices on startup */
 380 #endif /* CONFIG_PCI */
 381
 382 /*
 383  * Environment
 384  */
 385 #ifdef CONFIG_ENV_FIT_UCBOOT
 386
 387 #define CONFIG_ENV_IS_IN_FLASH
 388 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + 0x20000)
 389 #define CONFIG_ENV_SIZE         0x20000
 390 #define CONFIG_ENV_SECT_SIZE    0x20000 /* 128K (one sector) */
 391
 392 #else
 393
 394 #define CONFIG_ENV_SPI_BUS      0
 395 #define CONFIG_ENV_SPI_CS       0
 396 #define CONFIG_ENV_SPI_MAX_HZ   10000000
 397 #define CONFIG_ENV_SPI_MODE     0
 398
 399 #ifdef CONFIG_RAMBOOT_SPIFLASH
 400
 401 #define CONFIG_ENV_IS_IN_SPI_FLASH
 402 #define CONFIG_ENV_SIZE         0x3000          /* 12KB */
 403 #define CONFIG_ENV_OFFSET       0x2000          /* 8KB */
 404 #define CONFIG_ENV_SECT_SIZE    0x1000
 405
 406 #if defined(CONFIG_SYS_REDUNDAND_ENVIRONMENT)
 407 /* Address and size of Redundant Environment Sector     */
 408 #define CONFIG_ENV_OFFSET_REDUND        (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
 409 #define CONFIG_ENV_SIZE_REDUND          CONFIG_ENV_SIZE
 410 #endif
 411
 412 #elif defined(CONFIG_RAMBOOT_SDCARD)
 413 #define CONFIG_ENV_IS_IN_MMC
 414 #define CONFIG_FSL_FIXED_MMC_LOCATION
 415 #define CONFIG_ENV_SIZE         0x2000
 416 #define CONFIG_SYS_MMC_ENV_DEV  0
 417
 418 #elif defined(CONFIG_SYS_RAMBOOT)
 419 #define CONFIG_ENV_IS_NOWHERE   /* Store ENV in memory only */
 420 #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE - 0x1000)
 421 #define CONFIG_ENV_SIZE         0x2000
 422
 423 #else
 424 #define CONFIG_ENV_IS_IN_FLASH
 425 #define CONFIG_ENV_BASE         (CONFIG_SYS_FLASH_BASE)
 426 #define CONFIG_ENV_SECT_SIZE    0x20000 /* 128K (one sector) */
 427 #define CONFIG_ENV_SIZE         CONFIG_ENV_SECT_SIZE
 428 #define CONFIG_ENV_ADDR         (CONFIG_ENV_BASE + 0xC0000)
 429 #if defined(CONFIG_SYS_REDUNDAND_ENVIRONMENT)
 430 /* Address and size of Redundant Environment Sector     */
 431 #define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR + CONFIG_ENV_SIZE)
 432 #define CONFIG_ENV_SIZE_REDUND  CONFIG_ENV_SIZE
 433 #endif
 434
 435 #endif
 436
 437 #endif  /* CONFIG_ENV_FIT_UCBOOT */
 438
 439 #define CONFIG_LOADS_ECHO               /* echo on for serial download */
 440 #define CONFIG_SYS_LOADS_BAUD_CHANGE    /* allow baudrate change */
 441
 442 /*
 443  * Command line configuration.
 444  */
 445 #define CONFIG_CMD_IRQ
 446 #define CONFIG_CMD_DATE
 447 #define CONFIG_CMD_IRQ
 448 #define CONFIG_CMD_REGINFO
 449 #define CONFIG_CMD_ERRATA
 450 #define CONFIG_CMD_CRAMFS
 451
 452 /*
 453  * USB
 454  */
 455 #define CONFIG_HAS_FSL_DR_USB
 456
 457 #if defined(CONFIG_HAS_FSL_DR_USB)
 458 #define CONFIG_USB_EHCI
 459
 460 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
 461
 462 #ifdef CONFIG_USB_EHCI
 463 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 464 #define CONFIG_USB_EHCI_FSL
 465 #endif
 466 #endif
 467
 468 #undef CONFIG_WATCHDOG                  /* watchdog disabled */
 469
 470 #ifdef CONFIG_MMC
 471 #define CONFIG_FSL_ESDHC
 472 #define CONFIG_SYS_FSL_ESDHC_ADDR       CONFIG_SYS_MPC85xx_ESDHC_ADDR
 473 #define CONFIG_MMC_SPI
 474 #define CONFIG_CMD_MMC_SPI
 475 #endif
 476
 477 /* Misc Extra Settings */
 478 #undef CONFIG_WATCHDOG  /* watchdog disabled */
 479
 480 /*
 481  * Miscellaneous configurable options
 482  */
 483 #define CONFIG_SYS_LONGHELP                     /* undef to save memory */
 484 #define CONFIG_CMDLINE_EDITING                  /* Command-line editing */
 485 #define CONFIG_SYS_LOAD_ADDR    0x2000000       /* default load address */
 486 #if defined(CONFIG_CMD_KGDB)
 487 #define CONFIG_SYS_CBSIZE       1024            /* Console I/O Buffer Size */
 488 #else
 489 #define CONFIG_SYS_CBSIZE       256             /* Console I/O Buffer Size */
 490 #endif
 491 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 492         /* Print Buffer Size */
 493 #define CONFIG_SYS_MAXARGS      16      /* max number of command args */
 494 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */
 495 #define CONFIG_SYS_HZ           1000    /* decrementer freq: 1ms tick */
 496
 497 /*
 498  * For booting Linux, the board info and command line data
 499  * have to be in the first 64 MB of memory, since this is
 500  * the maximum mapped by the Linux kernel during initialization.
 501  */
 502 #define CONFIG_SYS_BOOTMAPSZ    (64 << 20)      /* Initial Memory for Linux*/
 503 #define CONFIG_SYS_BOOTM_LEN    (64 << 20)      /* Increase max gunzip size */
 504
 505 #if defined(CONFIG_CMD_KGDB)
 506 #define CONFIG_KGDB_BAUDRATE    230400  /* speed to run kgdb serial port */
 507 #define CONFIG_KGDB_SER_INDEX   2       /* which serial port to use */
 508 #endif
 509
 510 /*
 511  * Environment Configuration
 512  */
 513
 514 #if defined(CONFIG_TSEC_ENET)
 515
 516 #if defined(CONFIG_UCP1020_REV_1_2)
 517 #define CONFIG_PHY_MICREL_KSZ9021
 518 #elif defined(CONFIG_UCP1020_REV_1_3)
 519 #define CONFIG_PHY_MICREL_KSZ9031
 520 #else
 521 #error "UCP1020 module revision is not defined !!!"
 522 #endif
 523
 524 #define CONFIG_BOOTP_SERVERIP
 525
 526 #define CONFIG_MII              /* MII PHY management */
 527 #define CONFIG_TSEC1_NAME       "eTSEC1"
 528 #define CONFIG_TSEC2_NAME       "eTSEC2"
 529 #define CONFIG_TSEC3_NAME       "eTSEC3"
 530
 531 #define TSEC1_PHY_ADDR  4
 532 #define TSEC2_PHY_ADDR  0
 533 #define TSEC2_PHY_ADDR_SGMII    0x00
 534 #define TSEC3_PHY_ADDR  6
 535
 536 #define TSEC1_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
 537 #define TSEC2_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
 538 #define TSEC3_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
 539
 540 #define TSEC1_PHYIDX    0
 541 #define TSEC2_PHYIDX    0
 542 #define TSEC3_PHYIDX    0
 543
 544 #define CONFIG_PHY_GIGE 1       /* Include GbE speed/duplex detection */
 545
 546 #endif
 547
 548 #define CONFIG_HOSTNAME         UCP1020
 549 #define CONFIG_ROOTPATH         "/opt/nfsroot"
 550 #define CONFIG_BOOTFILE         "uImage"
 551 #define CONFIG_UBOOTPATH        u-boot.bin /* U-Boot image on TFTP server */
 552
 553 /* default location for tftp and bootm */
 554 #define CONFIG_LOADADDR         1000000
 555
 556 #define CONFIG_BOOTARGS /* the boot command will set bootargs */
 557
 558 #if defined(CONFIG_DONGLE)
 559
 560 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 561 "bootcmd=run prog_spi_mbrbootcramfs\0"                                  \
 562 "bootfile=uImage\0"                                                     \
 563 "consoledev=ttyS0\0"                                                    \
 564 "cramfsfile=image.cramfs\0"                                             \
 565 "dtbaddr=0x00c00000\0"                                                  \
 566 "dtbfile=image.dtb\0"                                                   \
 567 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
 568 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
 569 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
 570 "fileaddr=0x01000000\0"                                                 \
 571 "filesize=0x00080000\0"                                                 \
 572 "flashmbr=sf probe 0; "                                                 \
 573         "tftp $loadaddr $mbr; "                                         \
 574         "sf erase $mbr_offset +$filesize; "                             \
 575         "sf write $loadaddr $mbr_offset $filesize\0"                    \
 576 "flashrecovery=tftp $recoveryaddr $cramfsfile; "                        \
 577         "protect off $nor_recoveryaddr +$filesize; "                    \
 578         "erase $nor_recoveryaddr +$filesize; "                          \
 579         "cp.b $recoveryaddr $nor_recoveryaddr $filesize; "              \
 580         "protect on $nor_recoveryaddr +$filesize\0 "                    \
 581 "flashuboot=tftp $ubootaddr $ubootfile; "                               \
 582         "protect off $nor_ubootaddr +$filesize; "                       \
 583         "erase $nor_ubootaddr +$filesize; "                             \
 584         "cp.b $ubootaddr $nor_ubootaddr $filesize; "                    \
 585         "protect on $nor_ubootaddr +$filesize\0 "                       \
 586 "flashworking=tftp $workingaddr $cramfsfile; "                          \
 587         "protect off $nor_workingaddr +$filesize; "                     \
 588         "erase $nor_workingaddr +$filesize; "                           \
 589         "cp.b $workingaddr $nor_workingaddr $filesize; "                \
 590         "protect on $nor_workingaddr +$filesize\0 "                     \
 591 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
 592 "kerneladdr=0x01100000\0"                                               \
 593 "kernelfile=uImage\0"                                                   \
 594 "loadaddr=0x01000000\0"                                                 \
 595 "mbr=uCP1020d.mbr\0"                                                    \
 596 "mbr_offset=0x00000000\0"                                               \
 597 "mmbr=uCP1020Quiet.mbr\0"                                               \
 598 "mmcpart=0:2\0"                                                         \
 599 "mmc__mbrd=fatload mmc $mmcpart $loadaddr $mbr; "                       \
 600         "mmc erase 1 1; "                                               \
 601         "mmc write $loadaddr 1 1\0"                                     \
 602 "mmc__uboot=fatload mmc $mmcpart $loadaddr $ubootfile; "                \
 603         "mmc erase 0x40 0x400; "                                        \
 604         "mmc write $loadaddr 0x40 0x400\0"                              \
 605 "netdev=eth0\0"                                                         \
 606 "nor_recoveryaddr=0xEC0A0000\0"                                         \
 607 "nor_ubootaddr=0xEFF80000\0"                                            \
 608 "nor_workingaddr=0xECFA0000\0"                                          \
 609 "norbootrecovery=setenv bootargs $recoverybootargs"                     \
 610         " console=$consoledev,$baudrate $othbootargs; "                 \
 611         "run norloadrecovery; "                                         \
 612         "bootm $kerneladdr - $dtbaddr\0"                                \
 613 "norbootworking=setenv bootargs $workingbootargs"                       \
 614         " console=$consoledev,$baudrate $othbootargs; "                 \
 615         "run norloadworking; "                                          \
 616         "bootm $kerneladdr - $dtbaddr\0"                                \
 617 "norloadrecovery=mw.l $kerneladdr 0x0 0x00a00000; "                     \
 618         "setenv cramfsaddr $nor_recoveryaddr; "                         \
 619         "cramfsload $dtbaddr $dtbfile; "                                \
 620         "cramfsload $kerneladdr $kernelfile\0"                          \
 621 "norloadworking=mw.l $kerneladdr 0x0 0x00a00000; "                      \
 622         "setenv cramfsaddr $nor_workingaddr; "                          \
 623         "cramfsload $dtbaddr $dtbfile; "                                \
 624         "cramfsload $kerneladdr $kernelfile\0"                          \
 625 "prog_spi_mbr=run spi__mbr\0"                                           \
 626 "prog_spi_mbrboot=run spi__mbr; run spi__boot1; run spi__boot2\0"       \
 627 "prog_spi_mbrbootcramfs=run spi__mbr; run spi__boot1; run spi__boot2; " \
 628         "run spi__cramfs\0"                                             \
 629 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
 630         " console=$consoledev,$baudrate $othbootargs; "                 \
 631         "tftp $rootfsaddr $rootfsfile; "                                \
 632         "tftp $loadaddr $kernelfile; "                                  \
 633         "tftp $dtbaddr $dtbfile; "                                      \
 634         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
 635 "ramdisk_size=120000\0"                                                 \
 636 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
 637 "recoveryaddr=0x02F00000\0"                                             \
 638 "recoverybootargs=root=/dev/mtdblock0 rootfstype=cramfs ro\0"           \
 639 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
 640         "mw.l 0xffe0f008 0x00400000\0"                                  \
 641 "rootfsaddr=0x02F00000\0"                                               \
 642 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
 643 "rootpath=/opt/nfsroot\0"                                               \
 644 "spi__boot1=fatload mmc $mmcpart $loadaddr u-boot.bin; "                \
 645         "protect off 0xeC000000 +$filesize; "                           \
 646         "erase 0xEC000000 +$filesize; "                                 \
 647         "cp.b $loadaddr 0xEC000000 $filesize; "                         \
 648         "cmp.b $loadaddr 0xEC000000 $filesize; "                        \
 649         "protect on 0xeC000000 +$filesize\0"                            \
 650 "spi__boot2=fatload mmc $mmcpart $loadaddr u-boot.bin; "                \
 651         "protect off 0xeFF80000 +$filesize; "                           \
 652         "erase 0xEFF80000 +$filesize; "                                 \
 653         "cp.b $loadaddr 0xEFF80000 $filesize; "                         \
 654         "cmp.b $loadaddr 0xEFF80000 $filesize; "                        \
 655         "protect on 0xeFF80000 +$filesize\0"                            \
 656 "spi__bootd=fatload mmc $mmcpart $loadaddr $ubootd; "                   \
 657         "sf probe 0; sf erase 0x8000 +$filesize; "                      \
 658         "sf write $loadaddr 0x8000 $filesize\0"                         \
 659 "spi__cramfs=fatload mmc $mmcpart $loadaddr image.cramfs; "             \
 660         "protect off 0xec0a0000 +$filesize; "                           \
 661         "erase 0xeC0A0000 +$filesize; "                                 \
 662         "cp.b $loadaddr 0xeC0A0000 $filesize; "                         \
 663         "protect on 0xec0a0000 +$filesize\0"                            \
 664 "spi__mbr=fatload mmc $mmcpart $loadaddr $mmbr; "                       \
 665         "sf probe 1; sf erase 0 +$filesize; "                           \
 666         "sf write $loadaddr 0 $filesize\0"                              \
 667 "spi__mbrd=fatload mmc $mmcpart $loadaddr $mbr; "                       \
 668         "sf probe 0; sf erase 0 +$filesize; "                           \
 669         "sf write $loadaddr 0 $filesize\0"                              \
 670 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
 671         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 672         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
 673         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
 674         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 675         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
 676 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
 677 "ubootaddr=0x01000000\0"                                                \
 678 "ubootfile=u-boot.bin\0"                                                \
 679 "ubootd=u-boot4dongle.bin\0"                                            \
 680 "upgrade=run flashworking\0"                                            \
 681 "usb_phy_type=ulpi\0 "                                                  \
 682 "workingaddr=0x02F00000\0"                                              \
 683 "workingbootargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"
 684
 685 #else
 686
 687 #if defined(CONFIG_UCP1020T1)
 688
 689 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 690 "bootcmd=run releasefpga; run norbootworking || run norbootrecovery\0"  \
 691 "bootfile=uImage\0"                                                     \
 692 "consoledev=ttyS0\0"                                                    \
 693 "cramfsfile=image.cramfs\0"                                             \
 694 "dtbaddr=0x00c00000\0"                                                  \
 695 "dtbfile=image.dtb\0"                                                   \
 696 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
 697 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
 698 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
 699 "fileaddr=0x01000000\0"                                                 \
 700 "filesize=0x00080000\0"                                                 \
 701 "flashmbr=sf probe 0; "                                                 \
 702         "tftp $loadaddr $mbr; "                                         \
 703         "sf erase $mbr_offset +$filesize; "                             \
 704         "sf write $loadaddr $mbr_offset $filesize\0"                    \
 705 "flashrecovery=tftp $recoveryaddr $cramfsfile; "                        \
 706         "protect off $nor_recoveryaddr +$filesize; "                    \
 707         "erase $nor_recoveryaddr +$filesize; "                          \
 708         "cp.b $recoveryaddr $nor_recoveryaddr $filesize; "              \
 709         "protect on $nor_recoveryaddr +$filesize\0 "                    \
 710 "flashuboot=tftp $ubootaddr $ubootfile; "                               \
 711         "protect off $nor_ubootaddr +$filesize; "                       \
 712         "erase $nor_ubootaddr +$filesize; "                             \
 713         "cp.b $ubootaddr $nor_ubootaddr $filesize; "                    \
 714         "protect on $nor_ubootaddr +$filesize\0 "                       \
 715 "flashworking=tftp $workingaddr $cramfsfile; "                          \
 716         "protect off $nor_workingaddr +$filesize; "                     \
 717         "erase $nor_workingaddr +$filesize; "                           \
 718         "cp.b $workingaddr $nor_workingaddr $filesize; "                \
 719         "protect on $nor_workingaddr +$filesize\0 "                     \
 720 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
 721 "kerneladdr=0x01100000\0"                                               \
 722 "kernelfile=uImage\0"                                                   \
 723 "loadaddr=0x01000000\0"                                                 \
 724 "mbr=uCP1020.mbr\0"                                                     \
 725 "mbr_offset=0x00000000\0"                                               \
 726 "netdev=eth0\0"                                                         \
 727 "nor_recoveryaddr=0xEC0A0000\0"                                         \
 728 "nor_ubootaddr=0xEFF80000\0"                                            \
 729 "nor_workingaddr=0xECFA0000\0"                                          \
 730 "norbootrecovery=setenv bootargs $recoverybootargs"                     \
 731         " console=$consoledev,$baudrate $othbootargs; "                 \
 732         "run norloadrecovery; "                                         \
 733         "bootm $kerneladdr - $dtbaddr\0"                                \
 734 "norbootworking=setenv bootargs $workingbootargs"                       \
 735         " console=$consoledev,$baudrate $othbootargs; "                 \
 736         "run norloadworking; "                                          \
 737         "bootm $kerneladdr - $dtbaddr\0"                                \
 738 "norloadrecovery=mw.l $kerneladdr 0x0 0x00a00000; "                     \
 739         "setenv cramfsaddr $nor_recoveryaddr; "                         \
 740         "cramfsload $dtbaddr $dtbfile; "                                \
 741         "cramfsload $kerneladdr $kernelfile\0"                          \
 742 "norloadworking=mw.l $kerneladdr 0x0 0x00a00000; "                      \
 743         "setenv cramfsaddr $nor_workingaddr; "                          \
 744         "cramfsload $dtbaddr $dtbfile; "                                \
 745         "cramfsload $kerneladdr $kernelfile\0"                          \
 746 "othbootargs=quiet\0"                                                   \
 747 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
 748         " console=$consoledev,$baudrate $othbootargs; "                 \
 749         "tftp $rootfsaddr $rootfsfile; "                                \
 750         "tftp $loadaddr $kernelfile; "                                  \
 751         "tftp $dtbaddr $dtbfile; "                                      \
 752         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
 753 "ramdisk_size=120000\0"                                                 \
 754 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
 755 "recoveryaddr=0x02F00000\0"                                             \
 756 "recoverybootargs=root=/dev/mtdblock0 rootfstype=cramfs ro\0"           \
 757 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
 758         "mw.l 0xffe0f008 0x00400000\0"                                  \
 759 "rootfsaddr=0x02F00000\0"                                               \
 760 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
 761 "rootpath=/opt/nfsroot\0"                                               \
 762 "silent=1\0"                                                            \
 763 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
 764         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 765         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
 766         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
 767         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 768         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
 769 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
 770 "ubootaddr=0x01000000\0"                                                \
 771 "ubootfile=u-boot.bin\0"                                                \
 772 "upgrade=run flashworking\0"                                            \
 773 "workingaddr=0x02F00000\0"                                              \
 774 "workingbootargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"
 775
 776 #else /* For Arcturus Modules */
 777
 778 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 779 "bootcmd=run norkernel\0"                                               \
 780 "bootfile=uImage\0"                                                     \
 781 "consoledev=ttyS0\0"                                                    \
 782 "dtbaddr=0x00c00000\0"                                                  \
 783 "dtbfile=image.dtb\0"                                                   \
 784 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
 785 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
 786 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
 787 "fileaddr=0x01000000\0"                                                 \
 788 "filesize=0x00080000\0"                                                 \
 789 "flashmbr=sf probe 0; "                                                 \
 790         "tftp $loadaddr $mbr; "                                         \
 791         "sf erase $mbr_offset +$filesize; "                             \
 792         "sf write $loadaddr $mbr_offset $filesize\0"                    \
 793 "flashuboot=tftp $loadaddr $ubootfile; "                                \
 794         "protect off $nor_ubootaddr0 +$filesize; "                      \
 795         "erase $nor_ubootaddr0 +$filesize; "                            \
 796         "cp.b $loadaddr $nor_ubootaddr0 $filesize; "                    \
 797         "protect on $nor_ubootaddr0 +$filesize; "                       \
 798         "protect off $nor_ubootaddr1 +$filesize; "                      \
 799         "erase $nor_ubootaddr1 +$filesize; "                            \
 800         "cp.b $loadaddr $nor_ubootaddr1 $filesize; "                    \
 801         "protect on $nor_ubootaddr1 +$filesize\0 "                      \
 802 "format0=protect off $part0base +$part0size; "                          \
 803         "erase $part0base +$part0size\0"                                \
 804 "format1=protect off $part1base +$part1size; "                          \
 805         "erase $part1base +$part1size\0"                                \
 806 "format2=protect off $part2base +$part2size; "                          \
 807         "erase $part2base +$part2size\0"                                \
 808 "format3=protect off $part3base +$part3size; "                          \
 809         "erase $part3base +$part3size\0"                                \
 810 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
 811 "kerneladdr=0x01100000\0"                                               \
 812 "kernelargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"                 \
 813 "kernelfile=uImage\0"                                                   \
 814 "loadaddr=0x01000000\0"                                                 \
 815 "mbr=uCP1020.mbr\0"                                                     \
 816 "mbr_offset=0x00000000\0"                                               \
 817 "netdev=eth0\0"                                                         \
 818 "nor_ubootaddr0=0xEC000000\0"                                           \
 819 "nor_ubootaddr1=0xEFF80000\0"                                           \
 820 "norkernel=setenv bootargs $kernelargs console=$consoledev,$baudrate; " \
 821         "run norkernelload; "                                           \
 822         "bootm $kerneladdr - $dtbaddr\0"                                \
 823 "norkernelload=mw.l $kerneladdr 0x0 0x00a00000; "                       \
 824         "setenv cramfsaddr $part0base; "                                \
 825         "cramfsload $dtbaddr $dtbfile; "                                \
 826         "cramfsload $kerneladdr $kernelfile\0"                          \
 827 "part0base=0xEC100000\0"                                                \
 828 "part0size=0x00700000\0"                                                \
 829 "part1base=0xEC800000\0"                                                \
 830 "part1size=0x02000000\0"                                                \
 831 "part2base=0xEE800000\0"                                                \
 832 "part2size=0x00800000\0"                                                \
 833 "part3base=0xEF000000\0"                                                \
 834 "part3size=0x00F80000\0"                                                \
 835 "partENVbase=0xEC080000\0"                                              \
 836 "partENVsize=0x00080000\0"                                              \
 837 "program0=tftp part0-000000.bin; "                                      \
 838         "protect off $part0base +$filesize; "                           \
 839         "erase $part0base +$filesize; "                                 \
 840         "cp.b $loadaddr $part0base $filesize; "                         \
 841         "echo Verifying...; "                                           \
 842         "cmp.b $loadaddr $part0base $filesize\0"                        \
 843 "program1=tftp part1-000000.bin; "                                      \
 844         "protect off $part1base +$filesize; "                           \
 845         "erase $part1base +$filesize; "                                 \
 846         "cp.b $loadaddr $part1base $filesize; "                         \
 847         "echo Verifying...; "                                           \
 848         "cmp.b $loadaddr $part1base $filesize\0"                        \
 849 "program2=tftp part2-000000.bin; "                                      \
 850         "protect off $part2base +$filesize; "                           \
 851         "erase $part2base +$filesize; "                                 \
 852         "cp.b $loadaddr $part2base $filesize; "                         \
 853         "echo Verifying...; "                                           \
 854         "cmp.b $loadaddr $part2base $filesize\0"                        \
 855 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
 856         "  console=$consoledev,$baudrate $othbootargs; "                \
 857         "tftp $rootfsaddr $rootfsfile; "                                \
 858         "tftp $loadaddr $kernelfile; "                                  \
 859         "tftp $dtbaddr $dtbfile; "                                      \
 860         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
 861 "ramdisk_size=120000\0"                                                 \
 862 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
 863 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
 864         "mw.l 0xffe0f008 0x00400000\0"                                  \
 865 "rootfsaddr=0x02F00000\0"                                               \
 866 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
 867 "rootpath=/opt/nfsroot\0"                                               \
 868 "spi__mbr=fatload mmc $mmcpart $loadaddr $mmbr; "                       \
 869         "sf probe 0; sf erase 0 +$filesize; "                           \
 870         "sf write $loadaddr 0 $filesize\0"                              \
 871 "spi__boot=fatload mmc $mmcpart $loadaddr u-boot.bin; "                 \
 872         "protect off 0xeC000000 +$filesize; "                           \
 873         "erase 0xEC000000 +$filesize; "                                 \
 874         "cp.b $loadaddr 0xEC000000 $filesize; "                         \
 875         "cmp.b $loadaddr 0xEC000000 $filesize; "                        \
 876         "protect on 0xeC000000 +$filesize\0"                            \
 877 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
 878         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 879         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
 880         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
 881         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 882         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
 883 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
 884 "ubootfile=u-boot.bin\0"                                                \
 885 "upgrade=run flashuboot\0"                                              \
 886 "usb_phy_type=ulpi\0 "                                                  \
 887 "boot_nfs= "                                                            \
 888         "setenv bootargs root=/dev/nfs rw "                             \
 889         "nfsroot=$serverip:$rootpath "                                  \
 890         "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
 891         "console=$consoledev,$baudrate $othbootargs;"                   \
 892         "tftp $loadaddr $bootfile;"                                     \
 893         "tftp $fdtaddr $fdtfile;"                                       \
 894         "bootm $loadaddr - $fdtaddr\0"                                  \
 895 "boot_hd = "                                                            \
 896         "setenv bootargs root=/dev/$bdev rw rootdelay=30 "              \
 897         "console=$consoledev,$baudrate $othbootargs;"                   \
 898         "usb start;"                                                    \
 899         "ext2load usb 0:1 $loadaddr /boot/$bootfile;"                   \
 900         "ext2load usb 0:1 $fdtaddr /boot/$fdtfile;"                     \
 901         "bootm $loadaddr - $fdtaddr\0"                                  \
 902 "boot_usb_fat = "                                                       \
 903         "setenv bootargs root=/dev/ram rw "                             \
 904         "console=$consoledev,$baudrate $othbootargs "                   \
 905         "ramdisk_size=$ramdisk_size;"                                   \
 906         "usb start;"                                                    \
 907         "fatload usb 0:2 $loadaddr $bootfile;"                          \
 908         "fatload usb 0:2 $fdtaddr $fdtfile;"                            \
 909         "fatload usb 0:2 $ramdiskaddr $ramdiskfile;"                    \
 910         "bootm $loadaddr $ramdiskaddr $fdtaddr\0 "                      \
 911 "boot_usb_ext2 = "                                                      \
 912         "setenv bootargs root=/dev/ram rw "                             \
 913         "console=$consoledev,$baudrate $othbootargs "                   \
 914         "ramdisk_size=$ramdisk_size;"                                   \
 915         "usb start;"                                                    \
 916         "ext2load usb 0:4 $loadaddr $bootfile;"                         \
 917         "ext2load usb 0:4 $fdtaddr $fdtfile;"                           \
 918         "ext2load usb 0:4 $ramdiskaddr $ramdiskfile;"                   \
 919         "bootm $loadaddr $ramdiskaddr $fdtaddr\0 "                      \
 920 "boot_nor = "                                                           \
 921         "setenv bootargs root=/dev/$jffs2nor rw "                       \
 922         "console=$consoledev,$baudrate rootfstype=jffs2 $othbootargs;"  \
 923         "bootm $norbootaddr - $norfdtaddr\0 "                           \
 924 "boot_ram = "                                                           \
 925         "setenv bootargs root=/dev/ram rw "                             \
 926         "console=$consoledev,$baudrate $othbootargs "                   \
 927         "ramdisk_size=$ramdisk_size;"                                   \
 928         "tftp $ramdiskaddr $ramdiskfile;"                               \
 929         "tftp $loadaddr $bootfile;"                                     \
 930         "tftp $fdtaddr $fdtfile;"                                       \
 931         "bootm $loadaddr $ramdiskaddr $fdtaddr\0"
 932
 933 #endif
 934 #endif
 935
 936 #endif /* __CONFIG_H */