include/configs/UCP1020.h

   1 /*
   2  * Copyright 2013-2015 Arcturus Networks, Inc.
   3  *           http://www.arcturusnetworks.com/products/ucp1020/
   4  * based on include/configs/p1_p2_rdb_pc.h
   5  * original copyright follows:
   6  * Copyright 2009-2011 Freescale Semiconductor, Inc.
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10
  11 /*
  12  * QorIQ uCP1020-xx boards configuration file
  13  */
  14 #ifndef __CONFIG_H
  15 #define __CONFIG_H
  16
  17 #define CONFIG_FSL_ELBC
  18 #define CONFIG_PCIE1    /* PCIE controller 1 (slot 1) */
  19 #define CONFIG_PCIE2    /* PCIE controller 2 (slot 2) */
  20 #define CONFIG_FSL_PCI_INIT     /* Use common FSL init code */
  21 #define CONFIG_PCI_INDIRECT_BRIDGE      /* indirect PCI bridge support */
  22 #define CONFIG_FSL_PCIE_RESET   /* need PCIe reset errata */
  23 #define CONFIG_SYS_PCI_64BIT    /* enable 64-bit PCI resources */
  24
  25 #if defined(CONFIG_TARTGET_UCP1020T1)
  26
  27 #define CONFIG_UCP1020_REV_1_3
  28
  29 #define CONFIG_BOARDNAME "uCP1020-64EE512-0U1-XR-T1"
  30
  31 #define CONFIG_TSEC_ENET
  32 #define CONFIG_TSEC1
  33 #define CONFIG_TSEC3
  34 #define CONFIG_HAS_ETH0
  35 #define CONFIG_HAS_ETH1
  36 #define CONFIG_ETHADDR          00:19:D3:FF:FF:FF
  37 #define CONFIG_ETH1ADDR         00:19:D3:FF:FF:FE
  38 #define CONFIG_ETH2ADDR         00:19:D3:FF:FF:FD
  39 #define CONFIG_IPADDR           10.80.41.229
  40 #define CONFIG_SERVERIP         10.80.41.227
  41 #define CONFIG_NETMASK          255.255.252.0
  42 #define CONFIG_ETHPRIME         "eTSEC3"
  43
  44 #ifndef CONFIG_SPI_FLASH
  45 #endif
  46 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
  47
  48 #define CONFIG_SYS_L2_SIZE      (256 << 10)
  49
  50 #define CONFIG_LAST_STAGE_INIT
  51
  52 #endif
  53
  54 #if defined(CONFIG_TARGET_UCP1020)
  55
  56 #define CONFIG_UCP1020
  57 #define CONFIG_UCP1020_REV_1_3
  58
  59 #define CONFIG_BOARDNAME_LOCAL "uCP1020-64EEE512-OU1-XR"
  60
  61 #define CONFIG_TSEC_ENET
  62 #define CONFIG_TSEC1
  63 #define CONFIG_TSEC2
  64 #define CONFIG_TSEC3
  65 #define CONFIG_HAS_ETH0
  66 #define CONFIG_HAS_ETH1
  67 #define CONFIG_HAS_ETH2
  68 #define CONFIG_ETHADDR          00:06:3B:FF:FF:FF
  69 #define CONFIG_ETH1ADDR         00:06:3B:FF:FF:FE
  70 #define CONFIG_ETH2ADDR         00:06:3B:FF:FF:FD
  71 #define CONFIG_IPADDR           192.168.1.81
  72 #define CONFIG_IPADDR1          192.168.1.82
  73 #define CONFIG_IPADDR2          192.168.1.83
  74 #define CONFIG_SERVERIP         192.168.1.80
  75 #define CONFIG_GATEWAYIP        102.168.1.1
  76 #define CONFIG_NETMASK          255.255.255.0
  77 #define CONFIG_ETHPRIME         "eTSEC1"
  78
  79 #ifndef CONFIG_SPI_FLASH
  80 #endif
  81 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
  82
  83 #define CONFIG_SYS_L2_SIZE      (256 << 10)
  84
  85 #define CONFIG_LAST_STAGE_INIT
  86
  87 #endif
  88
  89 #ifdef CONFIG_SDCARD
  90 #define CONFIG_RAMBOOT_SDCARD
  91 #define CONFIG_SYS_RAMBOOT
  92 #define CONFIG_SYS_EXTRA_ENV_RELOC
  93 #define CONFIG_SYS_TEXT_BASE            0x11000000
  94 #define CONFIG_RESET_VECTOR_ADDRESS     0x1107fffc
  95 #endif
  96
  97 #ifdef CONFIG_SPIFLASH
  98 #define CONFIG_RAMBOOT_SPIFLASH
  99 #define CONFIG_SYS_RAMBOOT
 100 #define CONFIG_SYS_EXTRA_ENV_RELOC
 101 #define CONFIG_SYS_TEXT_BASE            0x11000000
 102 #define CONFIG_RESET_VECTOR_ADDRESS     0x1107fffc
 103 #endif
 104
 105 #ifndef CONFIG_SYS_TEXT_BASE
 106 #define CONFIG_SYS_TEXT_BASE            0xeff80000
 107 #endif
 108 #define CONFIG_SYS_TEXT_BASE_NOR        0xeff80000
 109
 110 #ifndef CONFIG_RESET_VECTOR_ADDRESS
 111 #define CONFIG_RESET_VECTOR_ADDRESS     0xeffffffc
 112 #endif
 113
 114 #ifndef CONFIG_SYS_MONITOR_BASE
 115 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE    /* start of monitor */
 116 #endif
 117
 118 #define CONFIG_MP
 119
 120 #define CONFIG_ENV_OVERWRITE
 121
 122 #define CONFIG_CMD_SATA
 123 #define CONFIG_SATA_SIL
 124 #define CONFIG_SYS_SATA_MAX_DEVICE      2
 125 #define CONFIG_LIBATA
 126 #define CONFIG_LBA48
 127
 128 #define CONFIG_SYS_CLK_FREQ     66666666
 129 #define CONFIG_DDR_CLK_FREQ     66666666
 130
 131 #define CONFIG_HWCONFIG
 132
 133 #define CONFIG_DTT_ADM1021      1       /* ADM1021 temp sensor support  */
 134 #define CONFIG_SYS_DTT_BUS_NUM  1       /* The I2C bus for DTT          */
 135 #define CONFIG_DTT_SENSORS      { 0, 1 }        /* Sensor index */
 136 /*
 137  * ADM1021/NCT72 temp sensor configuration (see dtt/adm1021.c for details).
 138  * there will be one entry in this array for each two (dummy) sensors in
 139  * CONFIG_DTT_SENSORS.
 140  *
 141  * For uCP1020 module:
 142  * - only one ADM1021/NCT72
 143  * - i2c addr 0x41
 144  * - conversion rate 0x02 = 0.25 conversions/second
 145  * - ALERT output disabled
 146  * - local temp sensor enabled, min set to 0 deg, max set to 85 deg
 147  * - remote temp sensor enabled, min set to 0 deg, max set to 85 deg
 148  */
 149 #define CONFIG_SYS_DTT_ADM1021  { { CONFIG_SYS_I2C_NCT72_ADDR, \
 150                                          0x02, 0, 1, 0, 85, 1, 0, 85} }
 151
 152 #define CONFIG_CMD_DTT
 153
 154 /*
 155  * These can be toggled for performance analysis, otherwise use default.
 156  */
 157 #define CONFIG_L2_CACHE
 158 #define CONFIG_BTB
 159
 160 #define CONFIG_BOARD_EARLY_INIT_F       /* Call board_pre_init */
 161
 162 #define CONFIG_ENABLE_36BIT_PHYS
 163
 164 #define CONFIG_SYS_MEMTEST_START        0x00200000      /* memtest works on */
 165 #define CONFIG_SYS_MEMTEST_END          0x1fffffff
 166 #define CONFIG_PANIC_HANG       /* do not reset board on panic */
 167
 168 #define CONFIG_SYS_CCSRBAR              0xffe00000
 169 #define CONFIG_SYS_CCSRBAR_PHYS_LOW     CONFIG_SYS_CCSRBAR
 170
 171 /* IN case of NAND bootloader relocate CCSRBAR in RAMboot code not in the 4k
 172        SPL code*/
 173 #ifdef CONFIG_SPL_BUILD
 174 #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
 175 #endif
 176
 177 /* DDR Setup */
 178 #define CONFIG_DDR_ECC_ENABLE
 179 #ifndef CONFIG_DDR_ECC_ENABLE
 180 #define CONFIG_SYS_DDR_RAW_TIMING
 181 #define CONFIG_DDR_SPD
 182 #endif
 183 #define CONFIG_SYS_SPD_BUS_NUM 1
 184 #undef CONFIG_FSL_DDR_INTERACTIVE
 185
 186 #define CONFIG_SYS_SDRAM_SIZE_LAW       LAW_SIZE_512M
 187 #define CONFIG_CHIP_SELECTS_PER_CTRL    1
 188 #define CONFIG_SYS_SDRAM_SIZE           (1u << (CONFIG_SYS_SDRAM_SIZE_LAW - 19))
 189 #define CONFIG_SYS_DDR_SDRAM_BASE       0x00000000
 190 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
 191
 192 #define CONFIG_NUM_DDR_CONTROLLERS      1
 193 #define CONFIG_DIMM_SLOTS_PER_CTLR      1
 194
 195 /* Default settings for DDR3 */
 196 #define CONFIG_SYS_DDR_CS0_BNDS         0x0000003f
 197 #define CONFIG_SYS_DDR_CS0_CONFIG       0x80014302
 198 #define CONFIG_SYS_DDR_CS0_CONFIG_2     0x00000000
 199 #define CONFIG_SYS_DDR_CS1_BNDS         0x0040007f
 200 #define CONFIG_SYS_DDR_CS1_CONFIG       0x80014302
 201 #define CONFIG_SYS_DDR_CS1_CONFIG_2     0x00000000
 202
 203 #define CONFIG_SYS_DDR_DATA_INIT        0xdeadbeef
 204 #define CONFIG_SYS_DDR_INIT_ADDR        0x00000000
 205 #define CONFIG_SYS_DDR_INIT_EXT_ADDR    0x00000000
 206 #define CONFIG_SYS_DDR_MODE_CONTROL     0x00000000
 207
 208 #define CONFIG_SYS_DDR_ZQ_CONTROL       0x89080600
 209 #define CONFIG_SYS_DDR_WRLVL_CONTROL    0x8655A608
 210 #define CONFIG_SYS_DDR_SR_CNTR          0x00000000
 211 #define CONFIG_SYS_DDR_RCW_1            0x00000000
 212 #define CONFIG_SYS_DDR_RCW_2            0x00000000
 213 #ifdef CONFIG_DDR_ECC_ENABLE
 214 #define CONFIG_SYS_DDR_CONTROL          0xE70C0000      /* Type = DDR3 & ECC */
 215 #else
 216 #define CONFIG_SYS_DDR_CONTROL          0xC70C0000      /* Type = DDR3 */
 217 #endif
 218 #define CONFIG_SYS_DDR_CONTROL_2        0x04401050
 219 #define CONFIG_SYS_DDR_TIMING_4         0x00220001
 220 #define CONFIG_SYS_DDR_TIMING_5         0x03402400
 221
 222 #define CONFIG_SYS_DDR_TIMING_3         0x00020000
 223 #define CONFIG_SYS_DDR_TIMING_0         0x00330004
 224 #define CONFIG_SYS_DDR_TIMING_1         0x6f6B4846
 225 #define CONFIG_SYS_DDR_TIMING_2         0x0FA8C8CF
 226 #define CONFIG_SYS_DDR_CLK_CTRL         0x03000000
 227 #define CONFIG_SYS_DDR_MODE_1           0x40461520
 228 #define CONFIG_SYS_DDR_MODE_2           0x8000c000
 229 #define CONFIG_SYS_DDR_INTERVAL         0x0C300000
 230
 231 #undef CONFIG_CLOCKS_IN_MHZ
 232
 233 /*
 234  * Memory map
 235  *
 236  * 0x0000_0000 0x7fff_ffff      DDR             Up to 2GB cacheable
 237  * 0x8000_0000 0xdfff_ffff      PCI Express Mem 1G non-cacheable(PCIe * 2)
 238  * 0xec00_0000 0xefff_ffff      NOR flash       Up to 64M non-cacheable CS0/1
 239  * 0xf8f8_0000 0xf8ff_ffff      L2 SRAM         Up to 256K cacheable
 240  *   (early boot only)
 241  * 0xffc0_0000 0xffc3_ffff      PCI IO range    256k non-cacheable
 242  * 0xffd0_0000 0xffd0_3fff      L1 for stack    16K cacheable
 243  * 0xffe0_0000 0xffef_ffff      CCSR            1M non-cacheable
 244  */
 245
 246 /*
 247  * Local Bus Definitions
 248  */
 249 #define CONFIG_SYS_MAX_FLASH_SECT       512     /* 64M */
 250 #define CONFIG_SYS_FLASH_BASE           0xec000000
 251
 252 #define CONFIG_SYS_FLASH_BASE_PHYS      CONFIG_SYS_FLASH_BASE
 253
 254 #define CONFIG_FLASH_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) \
 255         | BR_PS_16 | BR_V)
 256
 257 #define CONFIG_FLASH_OR_PRELIM          0xfc000ff7
 258
 259 #define CONFIG_SYS_FLASH_BANKS_LIST     {CONFIG_SYS_FLASH_BASE_PHYS}
 260 #define CONFIG_SYS_FLASH_QUIET_TEST
 261 #define CONFIG_FLASH_SHOW_PROGRESS      45      /* count down from 45/5: 9..1 */
 262
 263 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* number of banks */
 264
 265 #undef CONFIG_SYS_FLASH_CHECKSUM
 266 #define CONFIG_SYS_FLASH_ERASE_TOUT     60000   /* Flash Erase Timeout (ms) */
 267 #define CONFIG_SYS_FLASH_WRITE_TOUT     500     /* Flash Write Timeout (ms) */
 268
 269 #define CONFIG_FLASH_CFI_DRIVER
 270 #define CONFIG_SYS_FLASH_CFI
 271 #define CONFIG_SYS_FLASH_EMPTY_INFO
 272 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
 273
 274 #define CONFIG_BOARD_EARLY_INIT_R       /* call board_early_init_r function */
 275
 276 #define CONFIG_SYS_INIT_RAM_LOCK
 277 #define CONFIG_SYS_INIT_RAM_ADDR        0xffd00000 /* stack in RAM */
 278 /* Initial L1 address */
 279 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS   CONFIG_SYS_INIT_RAM_ADDR
 280 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0
 281 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR_PHYS
 282 /* Size of used area in RAM */
 283 #define CONFIG_SYS_INIT_RAM_SIZE        0x00004000
 284
 285 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - \
 286                                         GENERATED_GBL_DATA_SIZE)
 287 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 288
 289 #define CONFIG_SYS_MONITOR_LEN  (256 * 1024)/* Reserve 256 kB for Mon */
 290 #define CONFIG_SYS_MALLOC_LEN   (1024 * 1024)/* Reserved for malloc */
 291
 292 #define CONFIG_SYS_PMC_BASE     0xff980000
 293 #define CONFIG_SYS_PMC_BASE_PHYS        CONFIG_SYS_PMC_BASE
 294 #define CONFIG_PMC_BR_PRELIM    (BR_PHYS_ADDR(CONFIG_SYS_PMC_BASE_PHYS) | \
 295                                         BR_PS_8 | BR_V)
 296 #define CONFIG_PMC_OR_PRELIM    (OR_AM_64KB | OR_GPCM_CSNT | OR_GPCM_XACS | \
 297                                  OR_GPCM_SCY | OR_GPCM_TRLX | OR_GPCM_EHTR | \
 298                                  OR_GPCM_EAD)
 299
 300 #define CONFIG_SYS_BR0_PRELIM   CONFIG_FLASH_BR_PRELIM  /* NOR Base Address */
 301 #define CONFIG_SYS_OR0_PRELIM   CONFIG_FLASH_OR_PRELIM  /* NOR Options */
 302 #ifdef CONFIG_NAND_FSL_ELBC
 303 #define CONFIG_SYS_BR1_PRELIM   CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Addr */
 304 #define CONFIG_SYS_OR1_PRELIM   CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
 305 #endif
 306
 307 /* Serial Port - controlled on board with jumper J8
 308  * open - index 2
 309  * shorted - index 1
 310  */
 311 #define CONFIG_CONS_INDEX               1
 312 #undef CONFIG_SERIAL_SOFTWARE_FIFO
 313 #define CONFIG_SYS_NS16550_SERIAL
 314 #define CONFIG_SYS_NS16550_REG_SIZE     1
 315 #define CONFIG_SYS_NS16550_CLK          get_bus_freq(0)
 316 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_INIT_MINIMAL)
 317 #define CONFIG_NS16550_MIN_FUNCTIONS
 318 #endif
 319
 320 #define CONFIG_SYS_BAUDRATE_TABLE       \
 321         {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
 322
 323 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR + 0x4500)
 324 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR + 0x4600)
 325
 326 /* I2C */
 327 #define CONFIG_SYS_I2C
 328 #define CONFIG_SYS_I2C_FSL
 329 #define CONFIG_SYS_FSL_I2C_SPEED        400000
 330 #define CONFIG_SYS_FSL_I2C_SLAVE        0x7F
 331 #define CONFIG_SYS_FSL_I2C_OFFSET       0x3000
 332 #define CONFIG_SYS_FSL_I2C2_SPEED       400000
 333 #define CONFIG_SYS_FSL_I2C2_SLAVE       0x7F
 334 #define CONFIG_SYS_FSL_I2C2_OFFSET      0x3100
 335 #define CONFIG_SYS_I2C_NOPROBES         { {0, 0x29} }
 336 #define CONFIG_SYS_SPD_BUS_NUM          1 /* For rom_loc and flash bank */
 337
 338 #define CONFIG_RTC_DS1337
 339 #define CONFIG_SYS_RTC_DS1337_NOOSC
 340 #define CONFIG_SYS_I2C_RTC_ADDR         0x68
 341 #define CONFIG_SYS_I2C_PCA9557_ADDR     0x18
 342 #define CONFIG_SYS_I2C_NCT72_ADDR       0x4C
 343 #define CONFIG_SYS_I2C_IDT6V49205B      0x69
 344
 345 /*
 346  * eSPI - Enhanced SPI
 347  */
 348 #define CONFIG_HARD_SPI
 349
 350 #define CONFIG_SF_DEFAULT_SPEED         10000000
 351 #define CONFIG_SF_DEFAULT_MODE          SPI_MODE_0
 352
 353 #if defined(CONFIG_PCI)
 354 /*
 355  * General PCI
 356  * Memory space is mapped 1-1, but I/O space must start from 0.
 357  */
 358
 359 /* controller 2, direct to uli, tgtid 2, Base address 9000 */
 360 #define CONFIG_SYS_PCIE2_NAME           "PCIe SLOT CON9"
 361 #define CONFIG_SYS_PCIE2_MEM_VIRT       0xa0000000
 362 #define CONFIG_SYS_PCIE2_MEM_BUS        0xa0000000
 363 #define CONFIG_SYS_PCIE2_MEM_PHYS       0xa0000000
 364 #define CONFIG_SYS_PCIE2_MEM_SIZE       0x20000000      /* 512M */
 365 #define CONFIG_SYS_PCIE2_IO_VIRT        0xffc10000
 366 #define CONFIG_SYS_PCIE2_IO_BUS         0x00000000
 367 #define CONFIG_SYS_PCIE2_IO_PHYS        0xffc10000
 368 #define CONFIG_SYS_PCIE2_IO_SIZE        0x00010000      /* 64k */
 369
 370 /* controller 1, Slot 2, tgtid 1, Base address a000 */
 371 #define CONFIG_SYS_PCIE1_NAME           "PCIe SLOT CON10"
 372 #define CONFIG_SYS_PCIE1_MEM_VIRT       0x80000000
 373 #define CONFIG_SYS_PCIE1_MEM_BUS        0x80000000
 374 #define CONFIG_SYS_PCIE1_MEM_PHYS       0x80000000
 375 #define CONFIG_SYS_PCIE1_MEM_SIZE       0x20000000      /* 512M */
 376 #define CONFIG_SYS_PCIE1_IO_VIRT        0xffc00000
 377 #define CONFIG_SYS_PCIE1_IO_BUS         0x00000000
 378 #define CONFIG_SYS_PCIE1_IO_PHYS        0xffc00000
 379 #define CONFIG_SYS_PCIE1_IO_SIZE        0x00010000      /* 64k */
 380
 381 #define CONFIG_CMD_PCI
 382
 383 #define CONFIG_PCI_SCAN_SHOW    /* show pci devices on startup */
 384 #define CONFIG_DOS_PARTITION
 385 #endif /* CONFIG_PCI */
 386
 387 /*
 388  * Environment
 389  */
 390 #ifdef CONFIG_ENV_FIT_UCBOOT
 391
 392 #define CONFIG_ENV_IS_IN_FLASH
 393 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + 0x20000)
 394 #define CONFIG_ENV_SIZE         0x20000
 395 #define CONFIG_ENV_SECT_SIZE    0x20000 /* 128K (one sector) */
 396
 397 #else
 398
 399 #define CONFIG_ENV_SPI_BUS      0
 400 #define CONFIG_ENV_SPI_CS       0
 401 #define CONFIG_ENV_SPI_MAX_HZ   10000000
 402 #define CONFIG_ENV_SPI_MODE     0
 403
 404 #ifdef CONFIG_RAMBOOT_SPIFLASH
 405
 406 #define CONFIG_ENV_IS_IN_SPI_FLASH
 407 #define CONFIG_ENV_SIZE         0x3000          /* 12KB */
 408 #define CONFIG_ENV_OFFSET       0x2000          /* 8KB */
 409 #define CONFIG_ENV_SECT_SIZE    0x1000
 410
 411 #if defined(CONFIG_SYS_REDUNDAND_ENVIRONMENT)
 412 /* Address and size of Redundant Environment Sector     */
 413 #define CONFIG_ENV_OFFSET_REDUND        (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
 414 #define CONFIG_ENV_SIZE_REDUND          CONFIG_ENV_SIZE
 415 #endif
 416
 417 #elif defined(CONFIG_RAMBOOT_SDCARD)
 418 #define CONFIG_ENV_IS_IN_MMC
 419 #define CONFIG_FSL_FIXED_MMC_LOCATION
 420 #define CONFIG_ENV_SIZE         0x2000
 421 #define CONFIG_SYS_MMC_ENV_DEV  0
 422
 423 #elif defined(CONFIG_SYS_RAMBOOT)
 424 #define CONFIG_ENV_IS_NOWHERE   /* Store ENV in memory only */
 425 #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE - 0x1000)
 426 #define CONFIG_ENV_SIZE         0x2000
 427
 428 #else
 429 #define CONFIG_ENV_IS_IN_FLASH
 430 #define CONFIG_ENV_BASE         (CONFIG_SYS_FLASH_BASE)
 431 #define CONFIG_ENV_SECT_SIZE    0x20000 /* 128K (one sector) */
 432 #define CONFIG_ENV_SIZE         CONFIG_ENV_SECT_SIZE
 433 #define CONFIG_ENV_ADDR         (CONFIG_ENV_BASE + 0xC0000)
 434 #if defined(CONFIG_SYS_REDUNDAND_ENVIRONMENT)
 435 /* Address and size of Redundant Environment Sector     */
 436 #define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR + CONFIG_ENV_SIZE)
 437 #define CONFIG_ENV_SIZE_REDUND  CONFIG_ENV_SIZE
 438 #endif
 439
 440 #endif
 441
 442 #endif  /* CONFIG_ENV_FIT_UCBOOT */
 443
 444 #define CONFIG_LOADS_ECHO               /* echo on for serial download */
 445 #define CONFIG_SYS_LOADS_BAUD_CHANGE    /* allow baudrate change */
 446
 447 /*
 448  * Command line configuration.
 449  */
 450 #define CONFIG_CMD_IRQ
 451 #define CONFIG_CMD_DATE
 452 #define CONFIG_CMD_IRQ
 453 #define CONFIG_CMD_REGINFO
 454 #define CONFIG_CMD_ERRATA
 455 #define CONFIG_CMD_CRAMFS
 456
 457 /*
 458  * USB
 459  */
 460 #define CONFIG_HAS_FSL_DR_USB
 461
 462 #if defined(CONFIG_HAS_FSL_DR_USB)
 463 #define CONFIG_USB_EHCI
 464
 465 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
 466
 467 #ifdef CONFIG_USB_EHCI
 468 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 469 #define CONFIG_USB_EHCI_FSL
 470 #endif
 471 #endif
 472
 473 #undef CONFIG_WATCHDOG                  /* watchdog disabled */
 474
 475 #ifdef CONFIG_MMC
 476 #define CONFIG_FSL_ESDHC
 477 #define CONFIG_SYS_FSL_ESDHC_ADDR       CONFIG_SYS_MPC85xx_ESDHC_ADDR
 478 #define CONFIG_MMC_SPI
 479 #define CONFIG_CMD_MMC_SPI
 480 #define CONFIG_GENERIC_MMC
 481 #endif
 482
 483 #if defined(CONFIG_MMC) || defined(CONFIG_USB_EHCI) || defined(CONFIG_FSL_SATA)
 484 #define CONFIG_DOS_PARTITION
 485 #endif
 486
 487 /* Misc Extra Settings */
 488 #undef CONFIG_WATCHDOG  /* watchdog disabled */
 489
 490 /*
 491  * Miscellaneous configurable options
 492  */
 493 #define CONFIG_SYS_LONGHELP                     /* undef to save memory */
 494 #define CONFIG_CMDLINE_EDITING                  /* Command-line editing */
 495 #define CONFIG_SYS_LOAD_ADDR    0x2000000       /* default load address */
 496 #if defined(CONFIG_CMD_KGDB)
 497 #define CONFIG_SYS_CBSIZE       1024            /* Console I/O Buffer Size */
 498 #else
 499 #define CONFIG_SYS_CBSIZE       256             /* Console I/O Buffer Size */
 500 #endif
 501 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 502         /* Print Buffer Size */
 503 #define CONFIG_SYS_MAXARGS      16      /* max number of command args */
 504 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */
 505 #define CONFIG_SYS_HZ           1000    /* decrementer freq: 1ms tick */
 506
 507 /*
 508  * For booting Linux, the board info and command line data
 509  * have to be in the first 64 MB of memory, since this is
 510  * the maximum mapped by the Linux kernel during initialization.
 511  */
 512 #define CONFIG_SYS_BOOTMAPSZ    (64 << 20)      /* Initial Memory for Linux*/
 513 #define CONFIG_SYS_BOOTM_LEN    (64 << 20)      /* Increase max gunzip size */
 514
 515 #if defined(CONFIG_CMD_KGDB)
 516 #define CONFIG_KGDB_BAUDRATE    230400  /* speed to run kgdb serial port */
 517 #define CONFIG_KGDB_SER_INDEX   2       /* which serial port to use */
 518 #endif
 519
 520 /*
 521  * Environment Configuration
 522  */
 523
 524 #if defined(CONFIG_TSEC_ENET)
 525
 526 #if defined(CONFIG_UCP1020_REV_1_2)
 527 #define CONFIG_PHY_MICREL_KSZ9021
 528 #elif defined(CONFIG_UCP1020_REV_1_3)
 529 #define CONFIG_PHY_MICREL_KSZ9031
 530 #else
 531 #error "UCP1020 module revision is not defined !!!"
 532 #endif
 533
 534 #define CONFIG_BOOTP_SERVERIP
 535
 536 #define CONFIG_MII              /* MII PHY management */
 537 #define CONFIG_TSEC1_NAME       "eTSEC1"
 538 #define CONFIG_TSEC2_NAME       "eTSEC2"
 539 #define CONFIG_TSEC3_NAME       "eTSEC3"
 540
 541 #define TSEC1_PHY_ADDR  4
 542 #define TSEC2_PHY_ADDR  0
 543 #define TSEC2_PHY_ADDR_SGMII    0x00
 544 #define TSEC3_PHY_ADDR  6
 545
 546 #define TSEC1_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
 547 #define TSEC2_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
 548 #define TSEC3_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
 549
 550 #define TSEC1_PHYIDX    0
 551 #define TSEC2_PHYIDX    0
 552 #define TSEC3_PHYIDX    0
 553
 554 #define CONFIG_PHY_GIGE 1       /* Include GbE speed/duplex detection */
 555
 556 #endif
 557
 558 #define CONFIG_HOSTNAME         UCP1020
 559 #define CONFIG_ROOTPATH         "/opt/nfsroot"
 560 #define CONFIG_BOOTFILE         "uImage"
 561 #define CONFIG_UBOOTPATH        u-boot.bin /* U-Boot image on TFTP server */
 562
 563 /* default location for tftp and bootm */
 564 #define CONFIG_LOADADDR         1000000
 565
 566 #define CONFIG_BOOTARGS /* the boot command will set bootargs */
 567
 568 #define CONFIG_BAUDRATE 115200
 569
 570 #if defined(CONFIG_DONGLE)
 571
 572 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 573 "bootcmd=run prog_spi_mbrbootcramfs\0"                                  \
 574 "bootfile=uImage\0"                                                     \
 575 "consoledev=ttyS0\0"                                                    \
 576 "cramfsfile=image.cramfs\0"                                             \
 577 "dtbaddr=0x00c00000\0"                                                  \
 578 "dtbfile=image.dtb\0"                                                   \
 579 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
 580 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
 581 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
 582 "fileaddr=0x01000000\0"                                                 \
 583 "filesize=0x00080000\0"                                                 \
 584 "flashmbr=sf probe 0; "                                                 \
 585         "tftp $loadaddr $mbr; "                                         \
 586         "sf erase $mbr_offset +$filesize; "                             \
 587         "sf write $loadaddr $mbr_offset $filesize\0"                    \
 588 "flashrecovery=tftp $recoveryaddr $cramfsfile; "                        \
 589         "protect off $nor_recoveryaddr +$filesize; "                    \
 590         "erase $nor_recoveryaddr +$filesize; "                          \
 591         "cp.b $recoveryaddr $nor_recoveryaddr $filesize; "              \
 592         "protect on $nor_recoveryaddr +$filesize\0 "                    \
 593 "flashuboot=tftp $ubootaddr $ubootfile; "                               \
 594         "protect off $nor_ubootaddr +$filesize; "                       \
 595         "erase $nor_ubootaddr +$filesize; "                             \
 596         "cp.b $ubootaddr $nor_ubootaddr $filesize; "                    \
 597         "protect on $nor_ubootaddr +$filesize\0 "                       \
 598 "flashworking=tftp $workingaddr $cramfsfile; "                          \
 599         "protect off $nor_workingaddr +$filesize; "                     \
 600         "erase $nor_workingaddr +$filesize; "                           \
 601         "cp.b $workingaddr $nor_workingaddr $filesize; "                \
 602         "protect on $nor_workingaddr +$filesize\0 "                     \
 603 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
 604 "kerneladdr=0x01100000\0"                                               \
 605 "kernelfile=uImage\0"                                                   \
 606 "loadaddr=0x01000000\0"                                                 \
 607 "mbr=uCP1020d.mbr\0"                                                    \
 608 "mbr_offset=0x00000000\0"                                               \
 609 "mmbr=uCP1020Quiet.mbr\0"                                               \
 610 "mmcpart=0:2\0"                                                         \
 611 "mmc__mbrd=fatload mmc $mmcpart $loadaddr $mbr; "                       \
 612         "mmc erase 1 1; "                                               \
 613         "mmc write $loadaddr 1 1\0"                                     \
 614 "mmc__uboot=fatload mmc $mmcpart $loadaddr $ubootfile; "                \
 615         "mmc erase 0x40 0x400; "                                        \
 616         "mmc write $loadaddr 0x40 0x400\0"                              \
 617 "netdev=eth0\0"                                                         \
 618 "nor_recoveryaddr=0xEC0A0000\0"                                         \
 619 "nor_ubootaddr=0xEFF80000\0"                                            \
 620 "nor_workingaddr=0xECFA0000\0"                                          \
 621 "norbootrecovery=setenv bootargs $recoverybootargs"                     \
 622         " console=$consoledev,$baudrate $othbootargs; "                 \
 623         "run norloadrecovery; "                                         \
 624         "bootm $kerneladdr - $dtbaddr\0"                                \
 625 "norbootworking=setenv bootargs $workingbootargs"                       \
 626         " console=$consoledev,$baudrate $othbootargs; "                 \
 627         "run norloadworking; "                                          \
 628         "bootm $kerneladdr - $dtbaddr\0"                                \
 629 "norloadrecovery=mw.l $kerneladdr 0x0 0x00a00000; "                     \
 630         "setenv cramfsaddr $nor_recoveryaddr; "                         \
 631         "cramfsload $dtbaddr $dtbfile; "                                \
 632         "cramfsload $kerneladdr $kernelfile\0"                          \
 633 "norloadworking=mw.l $kerneladdr 0x0 0x00a00000; "                      \
 634         "setenv cramfsaddr $nor_workingaddr; "                          \
 635         "cramfsload $dtbaddr $dtbfile; "                                \
 636         "cramfsload $kerneladdr $kernelfile\0"                          \
 637 "prog_spi_mbr=run spi__mbr\0"                                           \
 638 "prog_spi_mbrboot=run spi__mbr; run spi__boot1; run spi__boot2\0"       \
 639 "prog_spi_mbrbootcramfs=run spi__mbr; run spi__boot1; run spi__boot2; " \
 640         "run spi__cramfs\0"                                             \
 641 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
 642         " console=$consoledev,$baudrate $othbootargs; "                 \
 643         "tftp $rootfsaddr $rootfsfile; "                                \
 644         "tftp $loadaddr $kernelfile; "                                  \
 645         "tftp $dtbaddr $dtbfile; "                                      \
 646         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
 647 "ramdisk_size=120000\0"                                                 \
 648 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
 649 "recoveryaddr=0x02F00000\0"                                             \
 650 "recoverybootargs=root=/dev/mtdblock0 rootfstype=cramfs ro\0"           \
 651 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
 652         "mw.l 0xffe0f008 0x00400000\0"                                  \
 653 "rootfsaddr=0x02F00000\0"                                               \
 654 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
 655 "rootpath=/opt/nfsroot\0"                                               \
 656 "spi__boot1=fatload mmc $mmcpart $loadaddr u-boot.bin; "                \
 657         "protect off 0xeC000000 +$filesize; "                           \
 658         "erase 0xEC000000 +$filesize; "                                 \
 659         "cp.b $loadaddr 0xEC000000 $filesize; "                         \
 660         "cmp.b $loadaddr 0xEC000000 $filesize; "                        \
 661         "protect on 0xeC000000 +$filesize\0"                            \
 662 "spi__boot2=fatload mmc $mmcpart $loadaddr u-boot.bin; "                \
 663         "protect off 0xeFF80000 +$filesize; "                           \
 664         "erase 0xEFF80000 +$filesize; "                                 \
 665         "cp.b $loadaddr 0xEFF80000 $filesize; "                         \
 666         "cmp.b $loadaddr 0xEFF80000 $filesize; "                        \
 667         "protect on 0xeFF80000 +$filesize\0"                            \
 668 "spi__bootd=fatload mmc $mmcpart $loadaddr $ubootd; "                   \
 669         "sf probe 0; sf erase 0x8000 +$filesize; "                      \
 670         "sf write $loadaddr 0x8000 $filesize\0"                         \
 671 "spi__cramfs=fatload mmc $mmcpart $loadaddr image.cramfs; "             \
 672         "protect off 0xec0a0000 +$filesize; "                           \
 673         "erase 0xeC0A0000 +$filesize; "                                 \
 674         "cp.b $loadaddr 0xeC0A0000 $filesize; "                         \
 675         "protect on 0xec0a0000 +$filesize\0"                            \
 676 "spi__mbr=fatload mmc $mmcpart $loadaddr $mmbr; "                       \
 677         "sf probe 1; sf erase 0 +$filesize; "                           \
 678         "sf write $loadaddr 0 $filesize\0"                              \
 679 "spi__mbrd=fatload mmc $mmcpart $loadaddr $mbr; "                       \
 680         "sf probe 0; sf erase 0 +$filesize; "                           \
 681         "sf write $loadaddr 0 $filesize\0"                              \
 682 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
 683         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 684         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
 685         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
 686         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 687         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
 688 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
 689 "ubootaddr=0x01000000\0"                                                \
 690 "ubootfile=u-boot.bin\0"                                                \
 691 "ubootd=u-boot4dongle.bin\0"                                            \
 692 "upgrade=run flashworking\0"                                            \
 693 "usb_phy_type=ulpi\0 "                                                  \
 694 "workingaddr=0x02F00000\0"                                              \
 695 "workingbootargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"
 696
 697 #else
 698
 699 #if defined(CONFIG_UCP1020T1)
 700
 701 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 702 "bootcmd=run releasefpga; run norbootworking || run norbootrecovery\0"  \
 703 "bootfile=uImage\0"                                                     \
 704 "consoledev=ttyS0\0"                                                    \
 705 "cramfsfile=image.cramfs\0"                                             \
 706 "dtbaddr=0x00c00000\0"                                                  \
 707 "dtbfile=image.dtb\0"                                                   \
 708 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
 709 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
 710 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
 711 "fileaddr=0x01000000\0"                                                 \
 712 "filesize=0x00080000\0"                                                 \
 713 "flashmbr=sf probe 0; "                                                 \
 714         "tftp $loadaddr $mbr; "                                         \
 715         "sf erase $mbr_offset +$filesize; "                             \
 716         "sf write $loadaddr $mbr_offset $filesize\0"                    \
 717 "flashrecovery=tftp $recoveryaddr $cramfsfile; "                        \
 718         "protect off $nor_recoveryaddr +$filesize; "                    \
 719         "erase $nor_recoveryaddr +$filesize; "                          \
 720         "cp.b $recoveryaddr $nor_recoveryaddr $filesize; "              \
 721         "protect on $nor_recoveryaddr +$filesize\0 "                    \
 722 "flashuboot=tftp $ubootaddr $ubootfile; "                               \
 723         "protect off $nor_ubootaddr +$filesize; "                       \
 724         "erase $nor_ubootaddr +$filesize; "                             \
 725         "cp.b $ubootaddr $nor_ubootaddr $filesize; "                    \
 726         "protect on $nor_ubootaddr +$filesize\0 "                       \
 727 "flashworking=tftp $workingaddr $cramfsfile; "                          \
 728         "protect off $nor_workingaddr +$filesize; "                     \
 729         "erase $nor_workingaddr +$filesize; "                           \
 730         "cp.b $workingaddr $nor_workingaddr $filesize; "                \
 731         "protect on $nor_workingaddr +$filesize\0 "                     \
 732 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
 733 "kerneladdr=0x01100000\0"                                               \
 734 "kernelfile=uImage\0"                                                   \
 735 "loadaddr=0x01000000\0"                                                 \
 736 "mbr=uCP1020.mbr\0"                                                     \
 737 "mbr_offset=0x00000000\0"                                               \
 738 "netdev=eth0\0"                                                         \
 739 "nor_recoveryaddr=0xEC0A0000\0"                                         \
 740 "nor_ubootaddr=0xEFF80000\0"                                            \
 741 "nor_workingaddr=0xECFA0000\0"                                          \
 742 "norbootrecovery=setenv bootargs $recoverybootargs"                     \
 743         " console=$consoledev,$baudrate $othbootargs; "                 \
 744         "run norloadrecovery; "                                         \
 745         "bootm $kerneladdr - $dtbaddr\0"                                \
 746 "norbootworking=setenv bootargs $workingbootargs"                       \
 747         " console=$consoledev,$baudrate $othbootargs; "                 \
 748         "run norloadworking; "                                          \
 749         "bootm $kerneladdr - $dtbaddr\0"                                \
 750 "norloadrecovery=mw.l $kerneladdr 0x0 0x00a00000; "                     \
 751         "setenv cramfsaddr $nor_recoveryaddr; "                         \
 752         "cramfsload $dtbaddr $dtbfile; "                                \
 753         "cramfsload $kerneladdr $kernelfile\0"                          \
 754 "norloadworking=mw.l $kerneladdr 0x0 0x00a00000; "                      \
 755         "setenv cramfsaddr $nor_workingaddr; "                          \
 756         "cramfsload $dtbaddr $dtbfile; "                                \
 757         "cramfsload $kerneladdr $kernelfile\0"                          \
 758 "othbootargs=quiet\0"                                                   \
 759 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
 760         " console=$consoledev,$baudrate $othbootargs; "                 \
 761         "tftp $rootfsaddr $rootfsfile; "                                \
 762         "tftp $loadaddr $kernelfile; "                                  \
 763         "tftp $dtbaddr $dtbfile; "                                      \
 764         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
 765 "ramdisk_size=120000\0"                                                 \
 766 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
 767 "recoveryaddr=0x02F00000\0"                                             \
 768 "recoverybootargs=root=/dev/mtdblock0 rootfstype=cramfs ro\0"           \
 769 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
 770         "mw.l 0xffe0f008 0x00400000\0"                                  \
 771 "rootfsaddr=0x02F00000\0"                                               \
 772 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
 773 "rootpath=/opt/nfsroot\0"                                               \
 774 "silent=1\0"                                                            \
 775 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
 776         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 777         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
 778         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
 779         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 780         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
 781 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
 782 "ubootaddr=0x01000000\0"                                                \
 783 "ubootfile=u-boot.bin\0"                                                \
 784 "upgrade=run flashworking\0"                                            \
 785 "workingaddr=0x02F00000\0"                                              \
 786 "workingbootargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"
 787
 788 #else /* For Arcturus Modules */
 789
 790 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 791 "bootcmd=run norkernel\0"                                               \
 792 "bootfile=uImage\0"                                                     \
 793 "consoledev=ttyS0\0"                                                    \
 794 "dtbaddr=0x00c00000\0"                                                  \
 795 "dtbfile=image.dtb\0"                                                   \
 796 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
 797 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
 798 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
 799 "fileaddr=0x01000000\0"                                                 \
 800 "filesize=0x00080000\0"                                                 \
 801 "flashmbr=sf probe 0; "                                                 \
 802         "tftp $loadaddr $mbr; "                                         \
 803         "sf erase $mbr_offset +$filesize; "                             \
 804         "sf write $loadaddr $mbr_offset $filesize\0"                    \
 805 "flashuboot=tftp $loadaddr $ubootfile; "                                \
 806         "protect off $nor_ubootaddr0 +$filesize; "                      \
 807         "erase $nor_ubootaddr0 +$filesize; "                            \
 808         "cp.b $loadaddr $nor_ubootaddr0 $filesize; "                    \
 809         "protect on $nor_ubootaddr0 +$filesize; "                       \
 810         "protect off $nor_ubootaddr1 +$filesize; "                      \
 811         "erase $nor_ubootaddr1 +$filesize; "                            \
 812         "cp.b $loadaddr $nor_ubootaddr1 $filesize; "                    \
 813         "protect on $nor_ubootaddr1 +$filesize\0 "                      \
 814 "format0=protect off $part0base +$part0size; "                          \
 815         "erase $part0base +$part0size\0"                                \
 816 "format1=protect off $part1base +$part1size; "                          \
 817         "erase $part1base +$part1size\0"                                \
 818 "format2=protect off $part2base +$part2size; "                          \
 819         "erase $part2base +$part2size\0"                                \
 820 "format3=protect off $part3base +$part3size; "                          \
 821         "erase $part3base +$part3size\0"                                \
 822 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
 823 "kerneladdr=0x01100000\0"                                               \
 824 "kernelargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"                 \
 825 "kernelfile=uImage\0"                                                   \
 826 "loadaddr=0x01000000\0"                                                 \
 827 "mbr=uCP1020.mbr\0"                                                     \
 828 "mbr_offset=0x00000000\0"                                               \
 829 "netdev=eth0\0"                                                         \
 830 "nor_ubootaddr0=0xEC000000\0"                                           \
 831 "nor_ubootaddr1=0xEFF80000\0"                                           \
 832 "norkernel=setenv bootargs $kernelargs console=$consoledev,$baudrate; " \
 833         "run norkernelload; "                                           \
 834         "bootm $kerneladdr - $dtbaddr\0"                                \
 835 "norkernelload=mw.l $kerneladdr 0x0 0x00a00000; "                       \
 836         "setenv cramfsaddr $part0base; "                                \
 837         "cramfsload $dtbaddr $dtbfile; "                                \
 838         "cramfsload $kerneladdr $kernelfile\0"                          \
 839 "part0base=0xEC100000\0"                                                \
 840 "part0size=0x00700000\0"                                                \
 841 "part1base=0xEC800000\0"                                                \
 842 "part1size=0x02000000\0"                                                \
 843 "part2base=0xEE800000\0"                                                \
 844 "part2size=0x00800000\0"                                                \
 845 "part3base=0xEF000000\0"                                                \
 846 "part3size=0x00F80000\0"                                                \
 847 "partENVbase=0xEC080000\0"                                              \
 848 "partENVsize=0x00080000\0"                                              \
 849 "program0=tftp part0-000000.bin; "                                      \
 850         "protect off $part0base +$filesize; "                           \
 851         "erase $part0base +$filesize; "                                 \
 852         "cp.b $loadaddr $part0base $filesize; "                         \
 853         "echo Verifying...; "                                           \
 854         "cmp.b $loadaddr $part0base $filesize\0"                        \
 855 "program1=tftp part1-000000.bin; "                                      \
 856         "protect off $part1base +$filesize; "                           \
 857         "erase $part1base +$filesize; "                                 \
 858         "cp.b $loadaddr $part1base $filesize; "                         \
 859         "echo Verifying...; "                                           \
 860         "cmp.b $loadaddr $part1base $filesize\0"                        \
 861 "program2=tftp part2-000000.bin; "                                      \
 862         "protect off $part2base +$filesize; "                           \
 863         "erase $part2base +$filesize; "                                 \
 864         "cp.b $loadaddr $part2base $filesize; "                         \
 865         "echo Verifying...; "                                           \
 866         "cmp.b $loadaddr $part2base $filesize\0"                        \
 867 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
 868         "  console=$consoledev,$baudrate $othbootargs; "                \
 869         "tftp $rootfsaddr $rootfsfile; "                                \
 870         "tftp $loadaddr $kernelfile; "                                  \
 871         "tftp $dtbaddr $dtbfile; "                                      \
 872         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
 873 "ramdisk_size=120000\0"                                                 \
 874 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
 875 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
 876         "mw.l 0xffe0f008 0x00400000\0"                                  \
 877 "rootfsaddr=0x02F00000\0"                                               \
 878 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
 879 "rootpath=/opt/nfsroot\0"                                               \
 880 "spi__mbr=fatload mmc $mmcpart $loadaddr $mmbr; "                       \
 881         "sf probe 0; sf erase 0 +$filesize; "                           \
 882         "sf write $loadaddr 0 $filesize\0"                              \
 883 "spi__boot=fatload mmc $mmcpart $loadaddr u-boot.bin; "                 \
 884         "protect off 0xeC000000 +$filesize; "                           \
 885         "erase 0xEC000000 +$filesize; "                                 \
 886         "cp.b $loadaddr 0xEC000000 $filesize; "                         \
 887         "cmp.b $loadaddr 0xEC000000 $filesize; "                        \
 888         "protect on 0xeC000000 +$filesize\0"                            \
 889 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
 890         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 891         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
 892         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
 893         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 894         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
 895 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
 896 "ubootfile=u-boot.bin\0"                                                \
 897 "upgrade=run flashuboot\0"                                              \
 898 "usb_phy_type=ulpi\0 "                                                  \
 899 "boot_nfs= "                                                            \
 900         "setenv bootargs root=/dev/nfs rw "                             \
 901         "nfsroot=$serverip:$rootpath "                                  \
 902         "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
 903         "console=$consoledev,$baudrate $othbootargs;"                   \
 904         "tftp $loadaddr $bootfile;"                                     \
 905         "tftp $fdtaddr $fdtfile;"                                       \
 906         "bootm $loadaddr - $fdtaddr\0"                                  \
 907 "boot_hd = "                                                            \
 908         "setenv bootargs root=/dev/$bdev rw rootdelay=30 "              \
 909         "console=$consoledev,$baudrate $othbootargs;"                   \
 910         "usb start;"                                                    \
 911         "ext2load usb 0:1 $loadaddr /boot/$bootfile;"                   \
 912         "ext2load usb 0:1 $fdtaddr /boot/$fdtfile;"                     \
 913         "bootm $loadaddr - $fdtaddr\0"                                  \
 914 "boot_usb_fat = "                                                       \
 915         "setenv bootargs root=/dev/ram rw "                             \
 916         "console=$consoledev,$baudrate $othbootargs "                   \
 917         "ramdisk_size=$ramdisk_size;"                                   \
 918         "usb start;"                                                    \
 919         "fatload usb 0:2 $loadaddr $bootfile;"                          \
 920         "fatload usb 0:2 $fdtaddr $fdtfile;"                            \
 921         "fatload usb 0:2 $ramdiskaddr $ramdiskfile;"                    \
 922         "bootm $loadaddr $ramdiskaddr $fdtaddr\0 "                      \
 923 "boot_usb_ext2 = "                                                      \
 924         "setenv bootargs root=/dev/ram rw "                             \
 925         "console=$consoledev,$baudrate $othbootargs "                   \
 926         "ramdisk_size=$ramdisk_size;"                                   \
 927         "usb start;"                                                    \
 928         "ext2load usb 0:4 $loadaddr $bootfile;"                         \
 929         "ext2load usb 0:4 $fdtaddr $fdtfile;"                           \
 930         "ext2load usb 0:4 $ramdiskaddr $ramdiskfile;"                   \
 931         "bootm $loadaddr $ramdiskaddr $fdtaddr\0 "                      \
 932 "boot_nor = "                                                           \
 933         "setenv bootargs root=/dev/$jffs2nor rw "                       \
 934         "console=$consoledev,$baudrate rootfstype=jffs2 $othbootargs;"  \
 935         "bootm $norbootaddr - $norfdtaddr\0 "                           \
 936 "boot_ram = "                                                           \
 937         "setenv bootargs root=/dev/ram rw "                             \
 938         "console=$consoledev,$baudrate $othbootargs "                   \
 939         "ramdisk_size=$ramdisk_size;"                                   \
 940         "tftp $ramdiskaddr $ramdiskfile;"                               \
 941         "tftp $loadaddr $bootfile;"                                     \
 942         "tftp $fdtaddr $fdtfile;"                                       \
 943         "bootm $loadaddr $ramdiskaddr $fdtaddr\0"
 944
 945 #endif
 946 #endif
 947
 948 #endif /* __CONFIG_H */