include/configs/UCP1020.h

   1 /*
   2  * Copyright 2013-2015 Arcturus Networks, Inc.
   3  *           http://www.arcturusnetworks.com/products/ucp1020/
   4  * based on include/configs/p1_p2_rdb_pc.h
   5  * original copyright follows:
   6  * Copyright 2009-2011 Freescale Semiconductor, Inc.
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10
  11 /*
  12  * QorIQ uCP1020-xx boards configuration file
  13  */
  14 #ifndef __CONFIG_H
  15 #define __CONFIG_H
  16
  17 #define CONFIG_FSL_ELBC
  18 #define CONFIG_PCIE1    /* PCIE controller 1 (slot 1) */
  19 #define CONFIG_PCIE2    /* PCIE controller 2 (slot 2) */
  20 #define CONFIG_FSL_PCI_INIT     /* Use common FSL init code */
  21 #define CONFIG_PCI_INDIRECT_BRIDGE      /* indirect PCI bridge support */
  22 #define CONFIG_FSL_PCIE_RESET   /* need PCIe reset errata */
  23 #define CONFIG_SYS_PCI_64BIT    /* enable 64-bit PCI resources */
  24
  25 #if defined(CONFIG_TARTGET_UCP1020T1)
  26
  27 #define CONFIG_UCP1020_REV_1_3
  28
  29 #define CONFIG_BOARDNAME "uCP1020-64EE512-0U1-XR-T1"
  30 #define CONFIG_P1020
  31
  32 #define CONFIG_TSEC_ENET
  33 #define CONFIG_TSEC1
  34 #define CONFIG_TSEC3
  35 #define CONFIG_HAS_ETH0
  36 #define CONFIG_HAS_ETH1
  37 #define CONFIG_ETHADDR          00:19:D3:FF:FF:FF
  38 #define CONFIG_ETH1ADDR         00:19:D3:FF:FF:FE
  39 #define CONFIG_ETH2ADDR         00:19:D3:FF:FF:FD
  40 #define CONFIG_IPADDR           10.80.41.229
  41 #define CONFIG_SERVERIP         10.80.41.227
  42 #define CONFIG_NETMASK          255.255.252.0
  43 #define CONFIG_ETHPRIME         "eTSEC3"
  44
  45 #ifndef CONFIG_SPI_FLASH
  46 #endif
  47 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
  48
  49 #define CONFIG_MMC
  50 #define CONFIG_SYS_L2_SIZE      (256 << 10)
  51
  52 #define CONFIG_LAST_STAGE_INIT
  53
  54 #endif
  55
  56 #if defined(CONFIG_TARGET_UCP1020)
  57
  58 #define CONFIG_UCP1020
  59 #define CONFIG_UCP1020_REV_1_3
  60
  61 #define CONFIG_BOARDNAME_LOCAL "uCP1020-64EEE512-OU1-XR"
  62 #define CONFIG_P1020
  63
  64 #define CONFIG_TSEC_ENET
  65 #define CONFIG_TSEC1
  66 #define CONFIG_TSEC2
  67 #define CONFIG_TSEC3
  68 #define CONFIG_HAS_ETH0
  69 #define CONFIG_HAS_ETH1
  70 #define CONFIG_HAS_ETH2
  71 #define CONFIG_ETHADDR          00:06:3B:FF:FF:FF
  72 #define CONFIG_ETH1ADDR         00:06:3B:FF:FF:FE
  73 #define CONFIG_ETH2ADDR         00:06:3B:FF:FF:FD
  74 #define CONFIG_IPADDR           192.168.1.81
  75 #define CONFIG_IPADDR1          192.168.1.82
  76 #define CONFIG_IPADDR2          192.168.1.83
  77 #define CONFIG_SERVERIP         192.168.1.80
  78 #define CONFIG_GATEWAYIP        102.168.1.1
  79 #define CONFIG_NETMASK          255.255.255.0
  80 #define CONFIG_ETHPRIME         "eTSEC1"
  81
  82 #ifndef CONFIG_SPI_FLASH
  83 #endif
  84 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
  85
  86 #define CONFIG_MMC
  87 #define CONFIG_SYS_L2_SIZE      (256 << 10)
  88
  89 #define CONFIG_LAST_STAGE_INIT
  90
  91 #endif
  92
  93 #ifdef CONFIG_SDCARD
  94 #define CONFIG_RAMBOOT_SDCARD
  95 #define CONFIG_SYS_RAMBOOT
  96 #define CONFIG_SYS_EXTRA_ENV_RELOC
  97 #define CONFIG_SYS_TEXT_BASE            0x11000000
  98 #define CONFIG_RESET_VECTOR_ADDRESS     0x1107fffc
  99 #endif
 100
 101 #ifdef CONFIG_SPIFLASH
 102 #define CONFIG_RAMBOOT_SPIFLASH
 103 #define CONFIG_SYS_RAMBOOT
 104 #define CONFIG_SYS_EXTRA_ENV_RELOC
 105 #define CONFIG_SYS_TEXT_BASE            0x11000000
 106 #define CONFIG_RESET_VECTOR_ADDRESS     0x1107fffc
 107 #endif
 108
 109 #ifndef CONFIG_SYS_TEXT_BASE
 110 #define CONFIG_SYS_TEXT_BASE            0xeff80000
 111 #endif
 112 #define CONFIG_SYS_TEXT_BASE_NOR        0xeff80000
 113
 114 #ifndef CONFIG_RESET_VECTOR_ADDRESS
 115 #define CONFIG_RESET_VECTOR_ADDRESS     0xeffffffc
 116 #endif
 117
 118 #ifndef CONFIG_SYS_MONITOR_BASE
 119 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE    /* start of monitor */
 120 #endif
 121
 122 /* High Level Configuration Options */
 123 #define CONFIG_BOOKE
 124 #define CONFIG_E500
 125 /* #define CONFIG_MPC85xx */
 126
 127 #define CONFIG_MP
 128
 129 #define CONFIG_FSL_LAW
 130
 131 #define CONFIG_ENV_OVERWRITE
 132
 133 #define CONFIG_CMD_SATA
 134 #define CONFIG_SATA_SIL
 135 #define CONFIG_SYS_SATA_MAX_DEVICE      2
 136 #define CONFIG_LIBATA
 137 #define CONFIG_LBA48
 138
 139 #define CONFIG_SYS_CLK_FREQ     66666666
 140 #define CONFIG_DDR_CLK_FREQ     66666666
 141
 142 #define CONFIG_HWCONFIG
 143
 144 #define CONFIG_DTT_ADM1021      1       /* ADM1021 temp sensor support  */
 145 #define CONFIG_SYS_DTT_BUS_NUM  1       /* The I2C bus for DTT          */
 146 #define CONFIG_DTT_SENSORS      { 0, 1 }        /* Sensor index */
 147 /*
 148  * ADM1021/NCT72 temp sensor configuration (see dtt/adm1021.c for details).
 149  * there will be one entry in this array for each two (dummy) sensors in
 150  * CONFIG_DTT_SENSORS.
 151  *
 152  * For uCP1020 module:
 153  * - only one ADM1021/NCT72
 154  * - i2c addr 0x41
 155  * - conversion rate 0x02 = 0.25 conversions/second
 156  * - ALERT output disabled
 157  * - local temp sensor enabled, min set to 0 deg, max set to 85 deg
 158  * - remote temp sensor enabled, min set to 0 deg, max set to 85 deg
 159  */
 160 #define CONFIG_SYS_DTT_ADM1021  { { CONFIG_SYS_I2C_NCT72_ADDR, \
 161                                          0x02, 0, 1, 0, 85, 1, 0, 85} }
 162
 163 #define CONFIG_CMD_DTT
 164
 165 /*
 166  * These can be toggled for performance analysis, otherwise use default.
 167  */
 168 #define CONFIG_L2_CACHE
 169 #define CONFIG_BTB
 170
 171 #define CONFIG_BOARD_EARLY_INIT_F       /* Call board_pre_init */
 172
 173 #define CONFIG_ENABLE_36BIT_PHYS
 174
 175 #define CONFIG_SYS_MEMTEST_START        0x00200000      /* memtest works on */
 176 #define CONFIG_SYS_MEMTEST_END          0x1fffffff
 177 #define CONFIG_PANIC_HANG       /* do not reset board on panic */
 178
 179 #define CONFIG_SYS_CCSRBAR              0xffe00000
 180 #define CONFIG_SYS_CCSRBAR_PHYS_LOW     CONFIG_SYS_CCSRBAR
 181
 182 /* IN case of NAND bootloader relocate CCSRBAR in RAMboot code not in the 4k
 183        SPL code*/
 184 #ifdef CONFIG_SPL_BUILD
 185 #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
 186 #endif
 187
 188 /* DDR Setup */
 189 #define CONFIG_DDR_ECC_ENABLE
 190 #define CONFIG_SYS_FSL_DDR3
 191 #ifndef CONFIG_DDR_ECC_ENABLE
 192 #define CONFIG_SYS_DDR_RAW_TIMING
 193 #define CONFIG_DDR_SPD
 194 #endif
 195 #define CONFIG_SYS_SPD_BUS_NUM 1
 196 #undef CONFIG_FSL_DDR_INTERACTIVE
 197
 198 #define CONFIG_SYS_SDRAM_SIZE_LAW       LAW_SIZE_512M
 199 #define CONFIG_CHIP_SELECTS_PER_CTRL    1
 200 #define CONFIG_SYS_SDRAM_SIZE           (1u << (CONFIG_SYS_SDRAM_SIZE_LAW - 19))
 201 #define CONFIG_SYS_DDR_SDRAM_BASE       0x00000000
 202 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
 203
 204 #define CONFIG_NUM_DDR_CONTROLLERS      1
 205 #define CONFIG_DIMM_SLOTS_PER_CTLR      1
 206
 207 /* Default settings for DDR3 */
 208 #define CONFIG_SYS_DDR_CS0_BNDS         0x0000003f
 209 #define CONFIG_SYS_DDR_CS0_CONFIG       0x80014302
 210 #define CONFIG_SYS_DDR_CS0_CONFIG_2     0x00000000
 211 #define CONFIG_SYS_DDR_CS1_BNDS         0x0040007f
 212 #define CONFIG_SYS_DDR_CS1_CONFIG       0x80014302
 213 #define CONFIG_SYS_DDR_CS1_CONFIG_2     0x00000000
 214
 215 #define CONFIG_SYS_DDR_DATA_INIT        0xdeadbeef
 216 #define CONFIG_SYS_DDR_INIT_ADDR        0x00000000
 217 #define CONFIG_SYS_DDR_INIT_EXT_ADDR    0x00000000
 218 #define CONFIG_SYS_DDR_MODE_CONTROL     0x00000000
 219
 220 #define CONFIG_SYS_DDR_ZQ_CONTROL       0x89080600
 221 #define CONFIG_SYS_DDR_WRLVL_CONTROL    0x8655A608
 222 #define CONFIG_SYS_DDR_SR_CNTR          0x00000000
 223 #define CONFIG_SYS_DDR_RCW_1            0x00000000
 224 #define CONFIG_SYS_DDR_RCW_2            0x00000000
 225 #ifdef CONFIG_DDR_ECC_ENABLE
 226 #define CONFIG_SYS_DDR_CONTROL          0xE70C0000      /* Type = DDR3 & ECC */
 227 #else
 228 #define CONFIG_SYS_DDR_CONTROL          0xC70C0000      /* Type = DDR3 */
 229 #endif
 230 #define CONFIG_SYS_DDR_CONTROL_2        0x04401050
 231 #define CONFIG_SYS_DDR_TIMING_4         0x00220001
 232 #define CONFIG_SYS_DDR_TIMING_5         0x03402400
 233
 234 #define CONFIG_SYS_DDR_TIMING_3         0x00020000
 235 #define CONFIG_SYS_DDR_TIMING_0         0x00330004
 236 #define CONFIG_SYS_DDR_TIMING_1         0x6f6B4846
 237 #define CONFIG_SYS_DDR_TIMING_2         0x0FA8C8CF
 238 #define CONFIG_SYS_DDR_CLK_CTRL         0x03000000
 239 #define CONFIG_SYS_DDR_MODE_1           0x40461520
 240 #define CONFIG_SYS_DDR_MODE_2           0x8000c000
 241 #define CONFIG_SYS_DDR_INTERVAL         0x0C300000
 242
 243 #undef CONFIG_CLOCKS_IN_MHZ
 244
 245 /*
 246  * Memory map
 247  *
 248  * 0x0000_0000 0x7fff_ffff      DDR             Up to 2GB cacheable
 249  * 0x8000_0000 0xdfff_ffff      PCI Express Mem 1G non-cacheable(PCIe * 2)
 250  * 0xec00_0000 0xefff_ffff      NOR flash       Up to 64M non-cacheable CS0/1
 251  * 0xf8f8_0000 0xf8ff_ffff      L2 SRAM         Up to 256K cacheable
 252  *   (early boot only)
 253  * 0xffc0_0000 0xffc3_ffff      PCI IO range    256k non-cacheable
 254  * 0xffd0_0000 0xffd0_3fff      L1 for stack    16K cacheable
 255  * 0xffe0_0000 0xffef_ffff      CCSR            1M non-cacheable
 256  */
 257
 258 /*
 259  * Local Bus Definitions
 260  */
 261 #define CONFIG_SYS_MAX_FLASH_SECT       512     /* 64M */
 262 #define CONFIG_SYS_FLASH_BASE           0xec000000
 263
 264 #define CONFIG_SYS_FLASH_BASE_PHYS      CONFIG_SYS_FLASH_BASE
 265
 266 #define CONFIG_FLASH_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) \
 267         | BR_PS_16 | BR_V)
 268
 269 #define CONFIG_FLASH_OR_PRELIM          0xfc000ff7
 270
 271 #define CONFIG_SYS_FLASH_BANKS_LIST     {CONFIG_SYS_FLASH_BASE_PHYS}
 272 #define CONFIG_SYS_FLASH_QUIET_TEST
 273 #define CONFIG_FLASH_SHOW_PROGRESS      45      /* count down from 45/5: 9..1 */
 274
 275 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* number of banks */
 276
 277 #undef CONFIG_SYS_FLASH_CHECKSUM
 278 #define CONFIG_SYS_FLASH_ERASE_TOUT     60000   /* Flash Erase Timeout (ms) */
 279 #define CONFIG_SYS_FLASH_WRITE_TOUT     500     /* Flash Write Timeout (ms) */
 280
 281 #define CONFIG_FLASH_CFI_DRIVER
 282 #define CONFIG_SYS_FLASH_CFI
 283 #define CONFIG_SYS_FLASH_EMPTY_INFO
 284 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
 285
 286 #define CONFIG_BOARD_EARLY_INIT_R       /* call board_early_init_r function */
 287
 288 #define CONFIG_SYS_INIT_RAM_LOCK
 289 #define CONFIG_SYS_INIT_RAM_ADDR        0xffd00000 /* stack in RAM */
 290 /* Initial L1 address */
 291 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS   CONFIG_SYS_INIT_RAM_ADDR
 292 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0
 293 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR_PHYS
 294 /* Size of used area in RAM */
 295 #define CONFIG_SYS_INIT_RAM_SIZE        0x00004000
 296
 297 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - \
 298                                         GENERATED_GBL_DATA_SIZE)
 299 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 300
 301 #define CONFIG_SYS_MONITOR_LEN  (256 * 1024)/* Reserve 256 kB for Mon */
 302 #define CONFIG_SYS_MALLOC_LEN   (1024 * 1024)/* Reserved for malloc */
 303
 304 #define CONFIG_SYS_PMC_BASE     0xff980000
 305 #define CONFIG_SYS_PMC_BASE_PHYS        CONFIG_SYS_PMC_BASE
 306 #define CONFIG_PMC_BR_PRELIM    (BR_PHYS_ADDR(CONFIG_SYS_PMC_BASE_PHYS) | \
 307                                         BR_PS_8 | BR_V)
 308 #define CONFIG_PMC_OR_PRELIM    (OR_AM_64KB | OR_GPCM_CSNT | OR_GPCM_XACS | \
 309                                  OR_GPCM_SCY | OR_GPCM_TRLX | OR_GPCM_EHTR | \
 310                                  OR_GPCM_EAD)
 311
 312 #define CONFIG_SYS_BR0_PRELIM   CONFIG_FLASH_BR_PRELIM  /* NOR Base Address */
 313 #define CONFIG_SYS_OR0_PRELIM   CONFIG_FLASH_OR_PRELIM  /* NOR Options */
 314 #ifdef CONFIG_NAND_FSL_ELBC
 315 #define CONFIG_SYS_BR1_PRELIM   CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Addr */
 316 #define CONFIG_SYS_OR1_PRELIM   CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
 317 #endif
 318
 319 /* Serial Port - controlled on board with jumper J8
 320  * open - index 2
 321  * shorted - index 1
 322  */
 323 #define CONFIG_CONS_INDEX               1
 324 #undef CONFIG_SERIAL_SOFTWARE_FIFO
 325 #define CONFIG_SYS_NS16550_SERIAL
 326 #define CONFIG_SYS_NS16550_REG_SIZE     1
 327 #define CONFIG_SYS_NS16550_CLK          get_bus_freq(0)
 328 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_INIT_MINIMAL)
 329 #define CONFIG_NS16550_MIN_FUNCTIONS
 330 #endif
 331
 332 #define CONFIG_SYS_BAUDRATE_TABLE       \
 333         {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
 334
 335 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR + 0x4500)
 336 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR + 0x4600)
 337
 338 /* I2C */
 339 #define CONFIG_SYS_I2C
 340 #define CONFIG_SYS_I2C_FSL
 341 #define CONFIG_SYS_FSL_I2C_SPEED        400000
 342 #define CONFIG_SYS_FSL_I2C_SLAVE        0x7F
 343 #define CONFIG_SYS_FSL_I2C_OFFSET       0x3000
 344 #define CONFIG_SYS_FSL_I2C2_SPEED       400000
 345 #define CONFIG_SYS_FSL_I2C2_SLAVE       0x7F
 346 #define CONFIG_SYS_FSL_I2C2_OFFSET      0x3100
 347 #define CONFIG_SYS_I2C_NOPROBES         { {0, 0x29} }
 348 #define CONFIG_SYS_SPD_BUS_NUM          1 /* For rom_loc and flash bank */
 349
 350 #define CONFIG_RTC_DS1337
 351 #define CONFIG_SYS_RTC_DS1337_NOOSC
 352 #define CONFIG_SYS_I2C_RTC_ADDR         0x68
 353 #define CONFIG_SYS_I2C_PCA9557_ADDR     0x18
 354 #define CONFIG_SYS_I2C_NCT72_ADDR       0x4C
 355 #define CONFIG_SYS_I2C_IDT6V49205B      0x69
 356
 357 /*
 358  * eSPI - Enhanced SPI
 359  */
 360 #define CONFIG_HARD_SPI
 361
 362 #define CONFIG_SF_DEFAULT_SPEED         10000000
 363 #define CONFIG_SF_DEFAULT_MODE          SPI_MODE_0
 364
 365 #if defined(CONFIG_PCI)
 366 /*
 367  * General PCI
 368  * Memory space is mapped 1-1, but I/O space must start from 0.
 369  */
 370
 371 /* controller 2, direct to uli, tgtid 2, Base address 9000 */
 372 #define CONFIG_SYS_PCIE2_NAME           "PCIe SLOT CON9"
 373 #define CONFIG_SYS_PCIE2_MEM_VIRT       0xa0000000
 374 #define CONFIG_SYS_PCIE2_MEM_BUS        0xa0000000
 375 #define CONFIG_SYS_PCIE2_MEM_PHYS       0xa0000000
 376 #define CONFIG_SYS_PCIE2_MEM_SIZE       0x20000000      /* 512M */
 377 #define CONFIG_SYS_PCIE2_IO_VIRT        0xffc10000
 378 #define CONFIG_SYS_PCIE2_IO_BUS         0x00000000
 379 #define CONFIG_SYS_PCIE2_IO_PHYS        0xffc10000
 380 #define CONFIG_SYS_PCIE2_IO_SIZE        0x00010000      /* 64k */
 381
 382 /* controller 1, Slot 2, tgtid 1, Base address a000 */
 383 #define CONFIG_SYS_PCIE1_NAME           "PCIe SLOT CON10"
 384 #define CONFIG_SYS_PCIE1_MEM_VIRT       0x80000000
 385 #define CONFIG_SYS_PCIE1_MEM_BUS        0x80000000
 386 #define CONFIG_SYS_PCIE1_MEM_PHYS       0x80000000
 387 #define CONFIG_SYS_PCIE1_MEM_SIZE       0x20000000      /* 512M */
 388 #define CONFIG_SYS_PCIE1_IO_VIRT        0xffc00000
 389 #define CONFIG_SYS_PCIE1_IO_BUS         0x00000000
 390 #define CONFIG_SYS_PCIE1_IO_PHYS        0xffc00000
 391 #define CONFIG_SYS_PCIE1_IO_SIZE        0x00010000      /* 64k */
 392
 393 #define CONFIG_PCI_PNP  /* do pci plug-and-play */
 394 #define CONFIG_CMD_PCI
 395
 396 #define CONFIG_PCI_SCAN_SHOW    /* show pci devices on startup */
 397 #define CONFIG_DOS_PARTITION
 398 #endif /* CONFIG_PCI */
 399
 400 /*
 401  * Environment
 402  */
 403 #ifdef CONFIG_ENV_FIT_UCBOOT
 404
 405 #define CONFIG_ENV_IS_IN_FLASH
 406 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + 0x20000)
 407 #define CONFIG_ENV_SIZE         0x20000
 408 #define CONFIG_ENV_SECT_SIZE    0x20000 /* 128K (one sector) */
 409
 410 #else
 411
 412 #define CONFIG_ENV_SPI_BUS      0
 413 #define CONFIG_ENV_SPI_CS       0
 414 #define CONFIG_ENV_SPI_MAX_HZ   10000000
 415 #define CONFIG_ENV_SPI_MODE     0
 416
 417 #ifdef CONFIG_RAMBOOT_SPIFLASH
 418
 419 #define CONFIG_ENV_IS_IN_SPI_FLASH
 420 #define CONFIG_ENV_SIZE         0x3000          /* 12KB */
 421 #define CONFIG_ENV_OFFSET       0x2000          /* 8KB */
 422 #define CONFIG_ENV_SECT_SIZE    0x1000
 423
 424 #if defined(CONFIG_SYS_REDUNDAND_ENVIRONMENT)
 425 /* Address and size of Redundant Environment Sector     */
 426 #define CONFIG_ENV_OFFSET_REDUND        (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
 427 #define CONFIG_ENV_SIZE_REDUND          CONFIG_ENV_SIZE
 428 #endif
 429
 430 #elif defined(CONFIG_RAMBOOT_SDCARD)
 431 #define CONFIG_ENV_IS_IN_MMC
 432 #define CONFIG_FSL_FIXED_MMC_LOCATION
 433 #define CONFIG_ENV_SIZE         0x2000
 434 #define CONFIG_SYS_MMC_ENV_DEV  0
 435
 436 #elif defined(CONFIG_SYS_RAMBOOT)
 437 #define CONFIG_ENV_IS_NOWHERE   /* Store ENV in memory only */
 438 #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE - 0x1000)
 439 #define CONFIG_ENV_SIZE         0x2000
 440
 441 #else
 442 #define CONFIG_ENV_IS_IN_FLASH
 443 #define CONFIG_ENV_BASE         (CONFIG_SYS_FLASH_BASE)
 444 #define CONFIG_ENV_SECT_SIZE    0x20000 /* 128K (one sector) */
 445 #define CONFIG_ENV_SIZE         CONFIG_ENV_SECT_SIZE
 446 #define CONFIG_ENV_ADDR         (CONFIG_ENV_BASE + 0xC0000)
 447 #if defined(CONFIG_SYS_REDUNDAND_ENVIRONMENT)
 448 /* Address and size of Redundant Environment Sector     */
 449 #define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR + CONFIG_ENV_SIZE)
 450 #define CONFIG_ENV_SIZE_REDUND  CONFIG_ENV_SIZE
 451 #endif
 452
 453 #endif
 454
 455 #endif  /* CONFIG_ENV_FIT_UCBOOT */
 456
 457 #define CONFIG_LOADS_ECHO               /* echo on for serial download */
 458 #define CONFIG_SYS_LOADS_BAUD_CHANGE    /* allow baudrate change */
 459
 460 /*
 461  * Command line configuration.
 462  */
 463 #define CONFIG_CMD_IRQ
 464 #define CONFIG_CMD_DATE
 465 #define CONFIG_CMD_IRQ
 466 #define CONFIG_CMD_REGINFO
 467 #define CONFIG_CMD_ERRATA
 468 #define CONFIG_CMD_CRAMFS
 469
 470 /*
 471  * USB
 472  */
 473 #define CONFIG_HAS_FSL_DR_USB
 474
 475 #if defined(CONFIG_HAS_FSL_DR_USB)
 476 #define CONFIG_USB_EHCI
 477
 478 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
 479
 480 #ifdef CONFIG_USB_EHCI
 481 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 482 #define CONFIG_USB_EHCI_FSL
 483 #endif
 484 #endif
 485
 486 #undef CONFIG_WATCHDOG                  /* watchdog disabled */
 487
 488 #ifdef CONFIG_MMC
 489 #define CONFIG_FSL_ESDHC
 490 #define CONFIG_SYS_FSL_ESDHC_ADDR       CONFIG_SYS_MPC85xx_ESDHC_ADDR
 491 #define CONFIG_MMC_SPI
 492 #define CONFIG_CMD_MMC_SPI
 493 #define CONFIG_GENERIC_MMC
 494 #endif
 495
 496 #if defined(CONFIG_MMC) || defined(CONFIG_USB_EHCI) || defined(CONFIG_FSL_SATA)
 497 #define CONFIG_DOS_PARTITION
 498 #endif
 499
 500 /* Misc Extra Settings */
 501 #undef CONFIG_WATCHDOG  /* watchdog disabled */
 502
 503 /*
 504  * Miscellaneous configurable options
 505  */
 506 #define CONFIG_SYS_LONGHELP                     /* undef to save memory */
 507 #define CONFIG_CMDLINE_EDITING                  /* Command-line editing */
 508 #define CONFIG_SYS_LOAD_ADDR    0x2000000       /* default load address */
 509 #if defined(CONFIG_CMD_KGDB)
 510 #define CONFIG_SYS_CBSIZE       1024            /* Console I/O Buffer Size */
 511 #else
 512 #define CONFIG_SYS_CBSIZE       256             /* Console I/O Buffer Size */
 513 #endif
 514 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 515         /* Print Buffer Size */
 516 #define CONFIG_SYS_MAXARGS      16      /* max number of command args */
 517 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */
 518 #define CONFIG_SYS_HZ           1000    /* decrementer freq: 1ms tick */
 519
 520 /*
 521  * For booting Linux, the board info and command line data
 522  * have to be in the first 64 MB of memory, since this is
 523  * the maximum mapped by the Linux kernel during initialization.
 524  */
 525 #define CONFIG_SYS_BOOTMAPSZ    (64 << 20)      /* Initial Memory for Linux*/
 526 #define CONFIG_SYS_BOOTM_LEN    (64 << 20)      /* Increase max gunzip size */
 527
 528 #if defined(CONFIG_CMD_KGDB)
 529 #define CONFIG_KGDB_BAUDRATE    230400  /* speed to run kgdb serial port */
 530 #define CONFIG_KGDB_SER_INDEX   2       /* which serial port to use */
 531 #endif
 532
 533 /*
 534  * Environment Configuration
 535  */
 536
 537 #if defined(CONFIG_TSEC_ENET)
 538
 539 #if defined(CONFIG_UCP1020_REV_1_2)
 540 #define CONFIG_PHY_MICREL_KSZ9021
 541 #elif defined(CONFIG_UCP1020_REV_1_3)
 542 #define CONFIG_PHY_MICREL_KSZ9031
 543 #else
 544 #error "UCP1020 module revision is not defined !!!"
 545 #endif
 546
 547 #define CONFIG_BOOTP_SERVERIP
 548
 549 #define CONFIG_MII              /* MII PHY management */
 550 #define CONFIG_TSEC1_NAME       "eTSEC1"
 551 #define CONFIG_TSEC2_NAME       "eTSEC2"
 552 #define CONFIG_TSEC3_NAME       "eTSEC3"
 553
 554 #define TSEC1_PHY_ADDR  4
 555 #define TSEC2_PHY_ADDR  0
 556 #define TSEC2_PHY_ADDR_SGMII    0x00
 557 #define TSEC3_PHY_ADDR  6
 558
 559 #define TSEC1_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
 560 #define TSEC2_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
 561 #define TSEC3_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
 562
 563 #define TSEC1_PHYIDX    0
 564 #define TSEC2_PHYIDX    0
 565 #define TSEC3_PHYIDX    0
 566
 567 #define CONFIG_PHY_GIGE 1       /* Include GbE speed/duplex detection */
 568
 569 #endif
 570
 571 #define CONFIG_HOSTNAME         UCP1020
 572 #define CONFIG_ROOTPATH         "/opt/nfsroot"
 573 #define CONFIG_BOOTFILE         "uImage"
 574 #define CONFIG_UBOOTPATH        u-boot.bin /* U-Boot image on TFTP server */
 575
 576 /* default location for tftp and bootm */
 577 #define CONFIG_LOADADDR         1000000
 578
 579 #define CONFIG_BOOTARGS /* the boot command will set bootargs */
 580
 581 #define CONFIG_BAUDRATE 115200
 582
 583 #if defined(CONFIG_DONGLE)
 584
 585 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 586 "bootcmd=run prog_spi_mbrbootcramfs\0"                                  \
 587 "bootfile=uImage\0"                                                     \
 588 "consoledev=ttyS0\0"                                                    \
 589 "cramfsfile=image.cramfs\0"                                             \
 590 "dtbaddr=0x00c00000\0"                                                  \
 591 "dtbfile=image.dtb\0"                                                   \
 592 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
 593 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
 594 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
 595 "fileaddr=0x01000000\0"                                                 \
 596 "filesize=0x00080000\0"                                                 \
 597 "flashmbr=sf probe 0; "                                                 \
 598         "tftp $loadaddr $mbr; "                                         \
 599         "sf erase $mbr_offset +$filesize; "                             \
 600         "sf write $loadaddr $mbr_offset $filesize\0"                    \
 601 "flashrecovery=tftp $recoveryaddr $cramfsfile; "                        \
 602         "protect off $nor_recoveryaddr +$filesize; "                    \
 603         "erase $nor_recoveryaddr +$filesize; "                          \
 604         "cp.b $recoveryaddr $nor_recoveryaddr $filesize; "              \
 605         "protect on $nor_recoveryaddr +$filesize\0 "                    \
 606 "flashuboot=tftp $ubootaddr $ubootfile; "                               \
 607         "protect off $nor_ubootaddr +$filesize; "                       \
 608         "erase $nor_ubootaddr +$filesize; "                             \
 609         "cp.b $ubootaddr $nor_ubootaddr $filesize; "                    \
 610         "protect on $nor_ubootaddr +$filesize\0 "                       \
 611 "flashworking=tftp $workingaddr $cramfsfile; "                          \
 612         "protect off $nor_workingaddr +$filesize; "                     \
 613         "erase $nor_workingaddr +$filesize; "                           \
 614         "cp.b $workingaddr $nor_workingaddr $filesize; "                \
 615         "protect on $nor_workingaddr +$filesize\0 "                     \
 616 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
 617 "kerneladdr=0x01100000\0"                                               \
 618 "kernelfile=uImage\0"                                                   \
 619 "loadaddr=0x01000000\0"                                                 \
 620 "mbr=uCP1020d.mbr\0"                                                    \
 621 "mbr_offset=0x00000000\0"                                               \
 622 "mmbr=uCP1020Quiet.mbr\0"                                               \
 623 "mmcpart=0:2\0"                                                         \
 624 "mmc__mbrd=fatload mmc $mmcpart $loadaddr $mbr; "                       \
 625         "mmc erase 1 1; "                                               \
 626         "mmc write $loadaddr 1 1\0"                                     \
 627 "mmc__uboot=fatload mmc $mmcpart $loadaddr $ubootfile; "                \
 628         "mmc erase 0x40 0x400; "                                        \
 629         "mmc write $loadaddr 0x40 0x400\0"                              \
 630 "netdev=eth0\0"                                                         \
 631 "nor_recoveryaddr=0xEC0A0000\0"                                         \
 632 "nor_ubootaddr=0xEFF80000\0"                                            \
 633 "nor_workingaddr=0xECFA0000\0"                                          \
 634 "norbootrecovery=setenv bootargs $recoverybootargs"                     \
 635         " console=$consoledev,$baudrate $othbootargs; "                 \
 636         "run norloadrecovery; "                                         \
 637         "bootm $kerneladdr - $dtbaddr\0"                                \
 638 "norbootworking=setenv bootargs $workingbootargs"                       \
 639         " console=$consoledev,$baudrate $othbootargs; "                 \
 640         "run norloadworking; "                                          \
 641         "bootm $kerneladdr - $dtbaddr\0"                                \
 642 "norloadrecovery=mw.l $kerneladdr 0x0 0x00a00000; "                     \
 643         "setenv cramfsaddr $nor_recoveryaddr; "                         \
 644         "cramfsload $dtbaddr $dtbfile; "                                \
 645         "cramfsload $kerneladdr $kernelfile\0"                          \
 646 "norloadworking=mw.l $kerneladdr 0x0 0x00a00000; "                      \
 647         "setenv cramfsaddr $nor_workingaddr; "                          \
 648         "cramfsload $dtbaddr $dtbfile; "                                \
 649         "cramfsload $kerneladdr $kernelfile\0"                          \
 650 "prog_spi_mbr=run spi__mbr\0"                                           \
 651 "prog_spi_mbrboot=run spi__mbr; run spi__boot1; run spi__boot2\0"       \
 652 "prog_spi_mbrbootcramfs=run spi__mbr; run spi__boot1; run spi__boot2; " \
 653         "run spi__cramfs\0"                                             \
 654 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
 655         " console=$consoledev,$baudrate $othbootargs; "                 \
 656         "tftp $rootfsaddr $rootfsfile; "                                \
 657         "tftp $loadaddr $kernelfile; "                                  \
 658         "tftp $dtbaddr $dtbfile; "                                      \
 659         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
 660 "ramdisk_size=120000\0"                                                 \
 661 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
 662 "recoveryaddr=0x02F00000\0"                                             \
 663 "recoverybootargs=root=/dev/mtdblock0 rootfstype=cramfs ro\0"           \
 664 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
 665         "mw.l 0xffe0f008 0x00400000\0"                                  \
 666 "rootfsaddr=0x02F00000\0"                                               \
 667 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
 668 "rootpath=/opt/nfsroot\0"                                               \
 669 "spi__boot1=fatload mmc $mmcpart $loadaddr u-boot.bin; "                \
 670         "protect off 0xeC000000 +$filesize; "                           \
 671         "erase 0xEC000000 +$filesize; "                                 \
 672         "cp.b $loadaddr 0xEC000000 $filesize; "                         \
 673         "cmp.b $loadaddr 0xEC000000 $filesize; "                        \
 674         "protect on 0xeC000000 +$filesize\0"                            \
 675 "spi__boot2=fatload mmc $mmcpart $loadaddr u-boot.bin; "                \
 676         "protect off 0xeFF80000 +$filesize; "                           \
 677         "erase 0xEFF80000 +$filesize; "                                 \
 678         "cp.b $loadaddr 0xEFF80000 $filesize; "                         \
 679         "cmp.b $loadaddr 0xEFF80000 $filesize; "                        \
 680         "protect on 0xeFF80000 +$filesize\0"                            \
 681 "spi__bootd=fatload mmc $mmcpart $loadaddr $ubootd; "                   \
 682         "sf probe 0; sf erase 0x8000 +$filesize; "                      \
 683         "sf write $loadaddr 0x8000 $filesize\0"                         \
 684 "spi__cramfs=fatload mmc $mmcpart $loadaddr image.cramfs; "             \
 685         "protect off 0xec0a0000 +$filesize; "                           \
 686         "erase 0xeC0A0000 +$filesize; "                                 \
 687         "cp.b $loadaddr 0xeC0A0000 $filesize; "                         \
 688         "protect on 0xec0a0000 +$filesize\0"                            \
 689 "spi__mbr=fatload mmc $mmcpart $loadaddr $mmbr; "                       \
 690         "sf probe 1; sf erase 0 +$filesize; "                           \
 691         "sf write $loadaddr 0 $filesize\0"                              \
 692 "spi__mbrd=fatload mmc $mmcpart $loadaddr $mbr; "                       \
 693         "sf probe 0; sf erase 0 +$filesize; "                           \
 694         "sf write $loadaddr 0 $filesize\0"                              \
 695 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
 696         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 697         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
 698         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
 699         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 700         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
 701 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
 702 "ubootaddr=0x01000000\0"                                                \
 703 "ubootfile=u-boot.bin\0"                                                \
 704 "ubootd=u-boot4dongle.bin\0"                                            \
 705 "upgrade=run flashworking\0"                                            \
 706 "usb_phy_type=ulpi\0 "                                                  \
 707 "workingaddr=0x02F00000\0"                                              \
 708 "workingbootargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"
 709
 710 #else
 711
 712 #if defined(CONFIG_UCP1020T1)
 713
 714 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 715 "bootcmd=run releasefpga; run norbootworking || run norbootrecovery\0"  \
 716 "bootfile=uImage\0"                                                     \
 717 "consoledev=ttyS0\0"                                                    \
 718 "cramfsfile=image.cramfs\0"                                             \
 719 "dtbaddr=0x00c00000\0"                                                  \
 720 "dtbfile=image.dtb\0"                                                   \
 721 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
 722 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
 723 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
 724 "fileaddr=0x01000000\0"                                                 \
 725 "filesize=0x00080000\0"                                                 \
 726 "flashmbr=sf probe 0; "                                                 \
 727         "tftp $loadaddr $mbr; "                                         \
 728         "sf erase $mbr_offset +$filesize; "                             \
 729         "sf write $loadaddr $mbr_offset $filesize\0"                    \
 730 "flashrecovery=tftp $recoveryaddr $cramfsfile; "                        \
 731         "protect off $nor_recoveryaddr +$filesize; "                    \
 732         "erase $nor_recoveryaddr +$filesize; "                          \
 733         "cp.b $recoveryaddr $nor_recoveryaddr $filesize; "              \
 734         "protect on $nor_recoveryaddr +$filesize\0 "                    \
 735 "flashuboot=tftp $ubootaddr $ubootfile; "                               \
 736         "protect off $nor_ubootaddr +$filesize; "                       \
 737         "erase $nor_ubootaddr +$filesize; "                             \
 738         "cp.b $ubootaddr $nor_ubootaddr $filesize; "                    \
 739         "protect on $nor_ubootaddr +$filesize\0 "                       \
 740 "flashworking=tftp $workingaddr $cramfsfile; "                          \
 741         "protect off $nor_workingaddr +$filesize; "                     \
 742         "erase $nor_workingaddr +$filesize; "                           \
 743         "cp.b $workingaddr $nor_workingaddr $filesize; "                \
 744         "protect on $nor_workingaddr +$filesize\0 "                     \
 745 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
 746 "kerneladdr=0x01100000\0"                                               \
 747 "kernelfile=uImage\0"                                                   \
 748 "loadaddr=0x01000000\0"                                                 \
 749 "mbr=uCP1020.mbr\0"                                                     \
 750 "mbr_offset=0x00000000\0"                                               \
 751 "netdev=eth0\0"                                                         \
 752 "nor_recoveryaddr=0xEC0A0000\0"                                         \
 753 "nor_ubootaddr=0xEFF80000\0"                                            \
 754 "nor_workingaddr=0xECFA0000\0"                                          \
 755 "norbootrecovery=setenv bootargs $recoverybootargs"                     \
 756         " console=$consoledev,$baudrate $othbootargs; "                 \
 757         "run norloadrecovery; "                                         \
 758         "bootm $kerneladdr - $dtbaddr\0"                                \
 759 "norbootworking=setenv bootargs $workingbootargs"                       \
 760         " console=$consoledev,$baudrate $othbootargs; "                 \
 761         "run norloadworking; "                                          \
 762         "bootm $kerneladdr - $dtbaddr\0"                                \
 763 "norloadrecovery=mw.l $kerneladdr 0x0 0x00a00000; "                     \
 764         "setenv cramfsaddr $nor_recoveryaddr; "                         \
 765         "cramfsload $dtbaddr $dtbfile; "                                \
 766         "cramfsload $kerneladdr $kernelfile\0"                          \
 767 "norloadworking=mw.l $kerneladdr 0x0 0x00a00000; "                      \
 768         "setenv cramfsaddr $nor_workingaddr; "                          \
 769         "cramfsload $dtbaddr $dtbfile; "                                \
 770         "cramfsload $kerneladdr $kernelfile\0"                          \
 771 "othbootargs=quiet\0"                                                   \
 772 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
 773         " console=$consoledev,$baudrate $othbootargs; "                 \
 774         "tftp $rootfsaddr $rootfsfile; "                                \
 775         "tftp $loadaddr $kernelfile; "                                  \
 776         "tftp $dtbaddr $dtbfile; "                                      \
 777         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
 778 "ramdisk_size=120000\0"                                                 \
 779 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
 780 "recoveryaddr=0x02F00000\0"                                             \
 781 "recoverybootargs=root=/dev/mtdblock0 rootfstype=cramfs ro\0"           \
 782 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
 783         "mw.l 0xffe0f008 0x00400000\0"                                  \
 784 "rootfsaddr=0x02F00000\0"                                               \
 785 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
 786 "rootpath=/opt/nfsroot\0"                                               \
 787 "silent=1\0"                                                            \
 788 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
 789         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 790         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
 791         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
 792         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 793         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
 794 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
 795 "ubootaddr=0x01000000\0"                                                \
 796 "ubootfile=u-boot.bin\0"                                                \
 797 "upgrade=run flashworking\0"                                            \
 798 "workingaddr=0x02F00000\0"                                              \
 799 "workingbootargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"
 800
 801 #else /* For Arcturus Modules */
 802
 803 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 804 "bootcmd=run norkernel\0"                                               \
 805 "bootfile=uImage\0"                                                     \
 806 "consoledev=ttyS0\0"                                                    \
 807 "dtbaddr=0x00c00000\0"                                                  \
 808 "dtbfile=image.dtb\0"                                                   \
 809 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
 810 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
 811 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
 812 "fileaddr=0x01000000\0"                                                 \
 813 "filesize=0x00080000\0"                                                 \
 814 "flashmbr=sf probe 0; "                                                 \
 815         "tftp $loadaddr $mbr; "                                         \
 816         "sf erase $mbr_offset +$filesize; "                             \
 817         "sf write $loadaddr $mbr_offset $filesize\0"                    \
 818 "flashuboot=tftp $loadaddr $ubootfile; "                                \
 819         "protect off $nor_ubootaddr0 +$filesize; "                      \
 820         "erase $nor_ubootaddr0 +$filesize; "                            \
 821         "cp.b $loadaddr $nor_ubootaddr0 $filesize; "                    \
 822         "protect on $nor_ubootaddr0 +$filesize; "                       \
 823         "protect off $nor_ubootaddr1 +$filesize; "                      \
 824         "erase $nor_ubootaddr1 +$filesize; "                            \
 825         "cp.b $loadaddr $nor_ubootaddr1 $filesize; "                    \
 826         "protect on $nor_ubootaddr1 +$filesize\0 "                      \
 827 "format0=protect off $part0base +$part0size; "                          \
 828         "erase $part0base +$part0size\0"                                \
 829 "format1=protect off $part1base +$part1size; "                          \
 830         "erase $part1base +$part1size\0"                                \
 831 "format2=protect off $part2base +$part2size; "                          \
 832         "erase $part2base +$part2size\0"                                \
 833 "format3=protect off $part3base +$part3size; "                          \
 834         "erase $part3base +$part3size\0"                                \
 835 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
 836 "kerneladdr=0x01100000\0"                                               \
 837 "kernelargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"                 \
 838 "kernelfile=uImage\0"                                                   \
 839 "loadaddr=0x01000000\0"                                                 \
 840 "mbr=uCP1020.mbr\0"                                                     \
 841 "mbr_offset=0x00000000\0"                                               \
 842 "netdev=eth0\0"                                                         \
 843 "nor_ubootaddr0=0xEC000000\0"                                           \
 844 "nor_ubootaddr1=0xEFF80000\0"                                           \
 845 "norkernel=setenv bootargs $kernelargs console=$consoledev,$baudrate; " \
 846         "run norkernelload; "                                           \
 847         "bootm $kerneladdr - $dtbaddr\0"                                \
 848 "norkernelload=mw.l $kerneladdr 0x0 0x00a00000; "                       \
 849         "setenv cramfsaddr $part0base; "                                \
 850         "cramfsload $dtbaddr $dtbfile; "                                \
 851         "cramfsload $kerneladdr $kernelfile\0"                          \
 852 "part0base=0xEC100000\0"                                                \
 853 "part0size=0x00700000\0"                                                \
 854 "part1base=0xEC800000\0"                                                \
 855 "part1size=0x02000000\0"                                                \
 856 "part2base=0xEE800000\0"                                                \
 857 "part2size=0x00800000\0"                                                \
 858 "part3base=0xEF000000\0"                                                \
 859 "part3size=0x00F80000\0"                                                \
 860 "partENVbase=0xEC080000\0"                                              \
 861 "partENVsize=0x00080000\0"                                              \
 862 "program0=tftp part0-000000.bin; "                                      \
 863         "protect off $part0base +$filesize; "                           \
 864         "erase $part0base +$filesize; "                                 \
 865         "cp.b $loadaddr $part0base $filesize; "                         \
 866         "echo Verifying...; "                                           \
 867         "cmp.b $loadaddr $part0base $filesize\0"                        \
 868 "program1=tftp part1-000000.bin; "                                      \
 869         "protect off $part1base +$filesize; "                           \
 870         "erase $part1base +$filesize; "                                 \
 871         "cp.b $loadaddr $part1base $filesize; "                         \
 872         "echo Verifying...; "                                           \
 873         "cmp.b $loadaddr $part1base $filesize\0"                        \
 874 "program2=tftp part2-000000.bin; "                                      \
 875         "protect off $part2base +$filesize; "                           \
 876         "erase $part2base +$filesize; "                                 \
 877         "cp.b $loadaddr $part2base $filesize; "                         \
 878         "echo Verifying...; "                                           \
 879         "cmp.b $loadaddr $part2base $filesize\0"                        \
 880 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
 881         "  console=$consoledev,$baudrate $othbootargs; "                \
 882         "tftp $rootfsaddr $rootfsfile; "                                \
 883         "tftp $loadaddr $kernelfile; "                                  \
 884         "tftp $dtbaddr $dtbfile; "                                      \
 885         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
 886 "ramdisk_size=120000\0"                                                 \
 887 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
 888 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
 889         "mw.l 0xffe0f008 0x00400000\0"                                  \
 890 "rootfsaddr=0x02F00000\0"                                               \
 891 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
 892 "rootpath=/opt/nfsroot\0"                                               \
 893 "spi__mbr=fatload mmc $mmcpart $loadaddr $mmbr; "                       \
 894         "sf probe 0; sf erase 0 +$filesize; "                           \
 895         "sf write $loadaddr 0 $filesize\0"                              \
 896 "spi__boot=fatload mmc $mmcpart $loadaddr u-boot.bin; "                 \
 897         "protect off 0xeC000000 +$filesize; "                           \
 898         "erase 0xEC000000 +$filesize; "                                 \
 899         "cp.b $loadaddr 0xEC000000 $filesize; "                         \
 900         "cmp.b $loadaddr 0xEC000000 $filesize; "                        \
 901         "protect on 0xeC000000 +$filesize\0"                            \
 902 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
 903         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 904         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
 905         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
 906         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 907         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
 908 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
 909 "ubootfile=u-boot.bin\0"                                                \
 910 "upgrade=run flashuboot\0"                                              \
 911 "usb_phy_type=ulpi\0 "                                                  \
 912 "boot_nfs= "                                                            \
 913         "setenv bootargs root=/dev/nfs rw "                             \
 914         "nfsroot=$serverip:$rootpath "                                  \
 915         "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
 916         "console=$consoledev,$baudrate $othbootargs;"                   \
 917         "tftp $loadaddr $bootfile;"                                     \
 918         "tftp $fdtaddr $fdtfile;"                                       \
 919         "bootm $loadaddr - $fdtaddr\0"                                  \
 920 "boot_hd = "                                                            \
 921         "setenv bootargs root=/dev/$bdev rw rootdelay=30 "              \
 922         "console=$consoledev,$baudrate $othbootargs;"                   \
 923         "usb start;"                                                    \
 924         "ext2load usb 0:1 $loadaddr /boot/$bootfile;"                   \
 925         "ext2load usb 0:1 $fdtaddr /boot/$fdtfile;"                     \
 926         "bootm $loadaddr - $fdtaddr\0"                                  \
 927 "boot_usb_fat = "                                                       \
 928         "setenv bootargs root=/dev/ram rw "                             \
 929         "console=$consoledev,$baudrate $othbootargs "                   \
 930         "ramdisk_size=$ramdisk_size;"                                   \
 931         "usb start;"                                                    \
 932         "fatload usb 0:2 $loadaddr $bootfile;"                          \
 933         "fatload usb 0:2 $fdtaddr $fdtfile;"                            \
 934         "fatload usb 0:2 $ramdiskaddr $ramdiskfile;"                    \
 935         "bootm $loadaddr $ramdiskaddr $fdtaddr\0 "                      \
 936 "boot_usb_ext2 = "                                                      \
 937         "setenv bootargs root=/dev/ram rw "                             \
 938         "console=$consoledev,$baudrate $othbootargs "                   \
 939         "ramdisk_size=$ramdisk_size;"                                   \
 940         "usb start;"                                                    \
 941         "ext2load usb 0:4 $loadaddr $bootfile;"                         \
 942         "ext2load usb 0:4 $fdtaddr $fdtfile;"                           \
 943         "ext2load usb 0:4 $ramdiskaddr $ramdiskfile;"                   \
 944         "bootm $loadaddr $ramdiskaddr $fdtaddr\0 "                      \
 945 "boot_nor = "                                                           \
 946         "setenv bootargs root=/dev/$jffs2nor rw "                       \
 947         "console=$consoledev,$baudrate rootfstype=jffs2 $othbootargs;"  \
 948         "bootm $norbootaddr - $norfdtaddr\0 "                           \
 949 "boot_ram = "                                                           \
 950         "setenv bootargs root=/dev/ram rw "                             \
 951         "console=$consoledev,$baudrate $othbootargs "                   \
 952         "ramdisk_size=$ramdisk_size;"                                   \
 953         "tftp $ramdiskaddr $ramdiskfile;"                               \
 954         "tftp $loadaddr $bootfile;"                                     \
 955         "tftp $fdtaddr $fdtfile;"                                       \
 956         "bootm $loadaddr $ramdiskaddr $fdtaddr\0"
 957
 958 #endif
 959 #endif
 960
 961 #endif /* __CONFIG_H */