Merge branch 'master' of git://git.denx.de/u-boot-net
[platform/kernel/u-boot.git] / include / configs / UCP1020.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright 2013-2019 Arcturus Networks, Inc.
4  *           https://www.arcturusnetworks.com/products/ucp1020/
5  * based on include/configs/p1_p2_rdb_pc.h
6  * original copyright follows:
7  * Copyright 2009-2011 Freescale Semiconductor, Inc.
8  */
9
10 /*
11  * QorIQ uCP1020-xx boards configuration file
12  */
13 #ifndef __CONFIG_H
14 #define __CONFIG_H
15
16 /*** Arcturus FirmWare Environment */
17
18 #define MAX_SERIAL_SIZE 15
19 #define MAX_HWADDR_SIZE 17
20
21 #define MAX_FWENV_ADDR  4
22
23 #define FWENV_MMC       1
24 #define FWENV_SPI_FLASH 2
25 #define FWENV_NOR_FLASH 3
26 /*
27  #define FWENV_TYPE    FWENV_MMC
28  #define FWENV_TYPE    FWENV_SPI_FLASH
29 */
30 #define FWENV_TYPE      FWENV_NOR_FLASH
31
32 #if (FWENV_TYPE == FWENV_MMC)
33 #ifndef CONFIG_SYS_MMC_ENV_DEV
34 #define CONFIG_SYS_MMC_ENV_DEV 1
35 #endif
36 #define FWENV_ADDR1 -1
37 #define FWENV_ADDR2 -1
38 #define FWENV_ADDR3 -1
39 #define FWENV_ADDR4 -1
40 #define EMPY_CHAR 0
41 #endif
42
43 #if (FWENV_TYPE == FWENV_SPI_FLASH)
44 #ifndef CONFIG_SF_DEFAULT_SPEED
45 #define CONFIG_SF_DEFAULT_SPEED 1000000
46 #endif
47 #ifndef CONFIG_SF_DEFAULT_MODE
48 #define CONFIG_SF_DEFAULT_MODE  SPI_MODE0
49 #endif
50 #ifndef CONFIG_SF_DEFAULT_CS
51 #define CONFIG_SF_DEFAULT_CS    0
52 #endif
53 #ifndef CONFIG_SF_DEFAULT_BUS
54 #define CONFIG_SF_DEFAULT_BUS   0
55 #endif
56 #define FWENV_ADDR1 (0x200 - sizeof(smac))
57 #define FWENV_ADDR2 (0x400 - sizeof(smac))
58 #define FWENV_ADDR3 (CONFIG_ENV_SECT_SIZE + 0x200 - sizeof(smac))
59 #define FWENV_ADDR4 (CONFIG_ENV_SECT_SIZE + 0x400 - sizeof(smac))
60 #define EMPY_CHAR 0xff
61 #endif
62
63 #if (FWENV_TYPE == FWENV_NOR_FLASH)
64 #define FWENV_ADDR1 0xEC080000
65 #define FWENV_ADDR2 -1
66 #define FWENV_ADDR3 -1
67 #define FWENV_ADDR4 -1
68 #define EMPY_CHAR 0xff
69 #endif
70 /***********************************/
71
72 #define CONFIG_PCIE1    /* PCIE controller 1 (slot 1) */
73 #define CONFIG_PCIE2    /* PCIE controller 2 (slot 2) */
74 #define CONFIG_FSL_PCI_INIT     /* Use common FSL init code */
75 #define CONFIG_PCI_INDIRECT_BRIDGE      /* indirect PCI bridge support */
76 #define CONFIG_SYS_PCI_64BIT    /* enable 64-bit PCI resources */
77
78 #if defined(CONFIG_TARTGET_UCP1020T1)
79
80 #define CONFIG_UCP1020_REV_1_3
81
82 #define CONFIG_BOARDNAME "uCP1020-64EE512-0U1-XR-T1"
83
84 #define CONFIG_TSEC1
85 #define CONFIG_TSEC3
86 #define CONFIG_HAS_ETH0
87 #define CONFIG_HAS_ETH1
88 #define CONFIG_ETHADDR          00:19:D3:FF:FF:FF
89 #define CONFIG_ETH1ADDR         00:19:D3:FF:FF:FE
90 #define CONFIG_ETH2ADDR         00:19:D3:FF:FF:FD
91 #define CONFIG_IPADDR           10.80.41.229
92 #define CONFIG_SERVERIP         10.80.41.227
93 #define CONFIG_NETMASK          255.255.252.0
94 #define CONFIG_ETHPRIME         "eTSEC3"
95
96 #define CONFIG_SYS_L2_SIZE      (256 << 10)
97
98 #endif
99
100 #if defined(CONFIG_TARGET_UCP1020)
101
102 #define CONFIG_UCP1020
103 #define CONFIG_UCP1020_REV_1_3
104
105 #define CONFIG_BOARDNAME_LOCAL "uCP1020-64EEE512-OU1-XR"
106
107 #define CONFIG_TSEC1
108 #define CONFIG_TSEC3
109 #define CONFIG_HAS_ETH0
110 #define CONFIG_HAS_ETH1
111 #define CONFIG_HAS_ETH2
112 #define CONFIG_ETHADDR          00:06:3B:FF:FF:FF
113 #define CONFIG_ETH1ADDR         00:06:3B:FF:FF:FE
114 #define CONFIG_ETH2ADDR         00:06:3B:FF:FF:FD
115 #define CONFIG_IPADDR           192.168.1.81
116 #define CONFIG_IPADDR1          192.168.1.82
117 #define CONFIG_IPADDR2          192.168.1.83
118 #define CONFIG_SERVERIP         192.168.1.80
119 #define CONFIG_GATEWAYIP        102.168.1.1
120 #define CONFIG_NETMASK          255.255.255.0
121 #define CONFIG_ETHPRIME         "eTSEC1"
122
123 #undef CONFIG_SYS_REDUNDAND_ENVIRONMENT
124
125 #define CONFIG_SYS_L2_SIZE      (256 << 10)
126
127 #endif
128
129 #ifdef CONFIG_SDCARD
130 #define CONFIG_RAMBOOT_SDCARD
131 #define CONFIG_SYS_RAMBOOT
132 #define CONFIG_RESET_VECTOR_ADDRESS     0x1107fffc
133 #endif
134
135 #ifdef CONFIG_SPIFLASH
136 #define CONFIG_RAMBOOT_SPIFLASH
137 #define CONFIG_SYS_RAMBOOT
138 #define CONFIG_RESET_VECTOR_ADDRESS     0x1107fffc
139 #endif
140
141 #define CONFIG_SYS_TEXT_BASE_NOR        0xeff80000
142
143 #ifndef CONFIG_RESET_VECTOR_ADDRESS
144 #define CONFIG_RESET_VECTOR_ADDRESS     0xeffffffc
145 #endif
146
147 #ifndef CONFIG_SYS_MONITOR_BASE
148 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE    /* start of monitor */
149 #endif
150
151 #define CONFIG_ENV_OVERWRITE
152
153 #define CONFIG_SYS_SATA_MAX_DEVICE      2
154 #define CONFIG_LBA48
155
156 #define CONFIG_SYS_CLK_FREQ     66666666
157 #define CONFIG_DDR_CLK_FREQ     66666666
158
159 #define CONFIG_HWCONFIG
160
161 /*
162  * These can be toggled for performance analysis, otherwise use default.
163  */
164 #define CONFIG_L2_CACHE
165 #define CONFIG_BTB
166
167 #define CONFIG_ENABLE_36BIT_PHYS
168
169 #define CONFIG_SYS_MEMTEST_START        0x00200000      /* memtest works on */
170 #define CONFIG_SYS_MEMTEST_END          0x1fffffff
171
172 #define CONFIG_SYS_CCSRBAR              0xffe00000
173 #define CONFIG_SYS_CCSRBAR_PHYS_LOW     CONFIG_SYS_CCSRBAR
174
175 /* IN case of NAND bootloader relocate CCSRBAR in RAMboot code not in the 4k
176        SPL code*/
177 #ifdef CONFIG_SPL_BUILD
178 #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
179 #endif
180
181 /* DDR Setup */
182 #define CONFIG_DDR_ECC_ENABLE
183 #ifndef CONFIG_DDR_ECC_ENABLE
184 #define CONFIG_SYS_DDR_RAW_TIMING
185 #define CONFIG_DDR_SPD
186 #endif
187 #define CONFIG_SYS_SPD_BUS_NUM 1
188
189 #define CONFIG_SYS_SDRAM_SIZE_LAW       LAW_SIZE_512M
190 #define CONFIG_CHIP_SELECTS_PER_CTRL    1
191 #define CONFIG_SYS_SDRAM_SIZE           (1u << (CONFIG_SYS_SDRAM_SIZE_LAW - 19))
192 #define CONFIG_SYS_DDR_SDRAM_BASE       0x00000000
193 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
194
195 #define CONFIG_DIMM_SLOTS_PER_CTLR      1
196
197 /* Default settings for DDR3 */
198 #define CONFIG_SYS_DDR_CS0_BNDS         0x0000003f
199 #define CONFIG_SYS_DDR_CS0_CONFIG       0x80014302
200 #define CONFIG_SYS_DDR_CS0_CONFIG_2     0x00000000
201 #define CONFIG_SYS_DDR_CS1_BNDS         0x0040007f
202 #define CONFIG_SYS_DDR_CS1_CONFIG       0x80014302
203 #define CONFIG_SYS_DDR_CS1_CONFIG_2     0x00000000
204
205 #define CONFIG_SYS_DDR_DATA_INIT        0xdeadbeef
206 #define CONFIG_SYS_DDR_INIT_ADDR        0x00000000
207 #define CONFIG_SYS_DDR_INIT_EXT_ADDR    0x00000000
208 #define CONFIG_SYS_DDR_MODE_CONTROL     0x00000000
209
210 #define CONFIG_SYS_DDR_ZQ_CONTROL       0x89080600
211 #define CONFIG_SYS_DDR_WRLVL_CONTROL    0x8655A608
212 #define CONFIG_SYS_DDR_SR_CNTR          0x00000000
213 #define CONFIG_SYS_DDR_RCW_1            0x00000000
214 #define CONFIG_SYS_DDR_RCW_2            0x00000000
215 #ifdef CONFIG_DDR_ECC_ENABLE
216 #define CONFIG_SYS_DDR_CONTROL          0xE70C0000      /* Type = DDR3 & ECC */
217 #else
218 #define CONFIG_SYS_DDR_CONTROL          0xC70C0000      /* Type = DDR3 */
219 #endif
220 #define CONFIG_SYS_DDR_CONTROL_2        0x04401050
221 #define CONFIG_SYS_DDR_TIMING_4         0x00220001
222 #define CONFIG_SYS_DDR_TIMING_5         0x03402400
223
224 #define CONFIG_SYS_DDR_TIMING_3         0x00020000
225 #define CONFIG_SYS_DDR_TIMING_0         0x00330004
226 #define CONFIG_SYS_DDR_TIMING_1         0x6f6B4846
227 #define CONFIG_SYS_DDR_TIMING_2         0x0FA8C8CF
228 #define CONFIG_SYS_DDR_CLK_CTRL         0x03000000
229 #define CONFIG_SYS_DDR_MODE_1           0x40461520
230 #define CONFIG_SYS_DDR_MODE_2           0x8000c000
231 #define CONFIG_SYS_DDR_INTERVAL         0x0C300000
232
233 #undef CONFIG_CLOCKS_IN_MHZ
234
235 /*
236  * Memory map
237  *
238  * 0x0000_0000 0x7fff_ffff      DDR             Up to 2GB cacheable
239  * 0x8000_0000 0xdfff_ffff      PCI Express Mem 1G non-cacheable(PCIe * 2)
240  * 0xec00_0000 0xefff_ffff      NOR flash       Up to 64M non-cacheable CS0/1
241  * 0xf8f8_0000 0xf8ff_ffff      L2 SRAM         Up to 256K cacheable
242  *   (early boot only)
243  * 0xffc0_0000 0xffc3_ffff      PCI IO range    256k non-cacheable
244  * 0xffd0_0000 0xffd0_3fff      L1 for stack    16K cacheable
245  * 0xffe0_0000 0xffef_ffff      CCSR            1M non-cacheable
246  */
247
248 /*
249  * Local Bus Definitions
250  */
251 #define CONFIG_SYS_MAX_FLASH_SECT       512     /* 64M */
252 #define CONFIG_SYS_FLASH_BASE           0xec000000
253
254 #define CONFIG_SYS_FLASH_BASE_PHYS      CONFIG_SYS_FLASH_BASE
255
256 #define CONFIG_FLASH_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) \
257         | BR_PS_16 | BR_V)
258
259 #define CONFIG_FLASH_OR_PRELIM          0xfc000ff7
260
261 #define CONFIG_SYS_FLASH_BANKS_LIST     {CONFIG_SYS_FLASH_BASE_PHYS}
262 #define CONFIG_SYS_FLASH_QUIET_TEST
263 #define CONFIG_FLASH_SHOW_PROGRESS      45      /* count down from 45/5: 9..1 */
264
265 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* number of banks */
266
267 #undef CONFIG_SYS_FLASH_CHECKSUM
268 #define CONFIG_SYS_FLASH_ERASE_TOUT     60000   /* Flash Erase Timeout (ms) */
269 #define CONFIG_SYS_FLASH_WRITE_TOUT     500     /* Flash Write Timeout (ms) */
270
271 #define CONFIG_SYS_FLASH_EMPTY_INFO
272
273 #define CONFIG_SYS_INIT_RAM_LOCK
274 #define CONFIG_SYS_INIT_RAM_ADDR        0xffd00000 /* stack in RAM */
275 /* Initial L1 address */
276 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS   CONFIG_SYS_INIT_RAM_ADDR
277 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0
278 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR_PHYS
279 /* Size of used area in RAM */
280 #define CONFIG_SYS_INIT_RAM_SIZE        0x00004000
281
282 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - \
283                                         GENERATED_GBL_DATA_SIZE)
284 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
285
286 #define CONFIG_SYS_MONITOR_LEN  (256 * 1024)/* Reserve 256 kB for Mon */
287 #define CONFIG_SYS_MALLOC_LEN   (1024 * 1024)/* Reserved for malloc */
288
289 #define CONFIG_SYS_PMC_BASE     0xff980000
290 #define CONFIG_SYS_PMC_BASE_PHYS        CONFIG_SYS_PMC_BASE
291 #define CONFIG_PMC_BR_PRELIM    (BR_PHYS_ADDR(CONFIG_SYS_PMC_BASE_PHYS) | \
292                                         BR_PS_8 | BR_V)
293 #define CONFIG_PMC_OR_PRELIM    (OR_AM_64KB | OR_GPCM_CSNT | OR_GPCM_XACS | \
294                                  OR_GPCM_SCY | OR_GPCM_TRLX | OR_GPCM_EHTR | \
295                                  OR_GPCM_EAD)
296
297 #define CONFIG_SYS_BR0_PRELIM   CONFIG_FLASH_BR_PRELIM  /* NOR Base Address */
298 #define CONFIG_SYS_OR0_PRELIM   CONFIG_FLASH_OR_PRELIM  /* NOR Options */
299 #ifdef CONFIG_NAND_FSL_ELBC
300 #define CONFIG_SYS_BR1_PRELIM   CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Addr */
301 #define CONFIG_SYS_OR1_PRELIM   CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
302 #endif
303
304 /* Serial Port - controlled on board with jumper J8
305  * open - index 2
306  * shorted - index 1
307  */
308 #undef CONFIG_SERIAL_SOFTWARE_FIFO
309 #define CONFIG_SYS_NS16550_SERIAL
310 #define CONFIG_SYS_NS16550_REG_SIZE     1
311 #define CONFIG_SYS_NS16550_CLK          get_bus_freq(0)
312 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_INIT_MINIMAL)
313 #define CONFIG_NS16550_MIN_FUNCTIONS
314 #endif
315
316 #define CONFIG_SYS_BAUDRATE_TABLE       \
317         {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
318
319 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR + 0x4500)
320 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR + 0x4600)
321
322 /* I2C */
323 #define CONFIG_SYS_I2C
324 #define CONFIG_SYS_I2C_FSL
325 #define CONFIG_SYS_FSL_I2C_SPEED        400000
326 #define CONFIG_SYS_FSL_I2C_SLAVE        0x7F
327 #define CONFIG_SYS_FSL_I2C_OFFSET       0x3000
328 #define CONFIG_SYS_FSL_I2C2_SPEED       400000
329 #define CONFIG_SYS_FSL_I2C2_SLAVE       0x7F
330 #define CONFIG_SYS_FSL_I2C2_OFFSET      0x3100
331 #define CONFIG_SYS_I2C_NOPROBES         { {0, 0x29} }
332 #define CONFIG_SYS_SPD_BUS_NUM          1 /* For rom_loc and flash bank */
333
334 #define CONFIG_RTC_DS1337
335 #define CONFIG_RTC_DS1337_NOOSC
336 #define CONFIG_SYS_I2C_RTC_ADDR         0x68
337 #define CONFIG_SYS_I2C_PCA9557_ADDR     0x18
338 #define CONFIG_SYS_I2C_NCT72_ADDR       0x4C
339 #define CONFIG_SYS_I2C_IDT6V49205B      0x69
340
341 #if defined(CONFIG_PCI)
342 /*
343  * General PCI
344  * Memory space is mapped 1-1, but I/O space must start from 0.
345  */
346
347 /* controller 2, direct to uli, tgtid 2, Base address 9000 */
348 #define CONFIG_SYS_PCIE2_NAME           "PCIe SLOT CON9"
349 #define CONFIG_SYS_PCIE2_MEM_VIRT       0xa0000000
350 #define CONFIG_SYS_PCIE2_MEM_BUS        0xa0000000
351 #define CONFIG_SYS_PCIE2_MEM_PHYS       0xa0000000
352 #define CONFIG_SYS_PCIE2_MEM_SIZE       0x20000000      /* 512M */
353 #define CONFIG_SYS_PCIE2_IO_VIRT        0xffc10000
354 #define CONFIG_SYS_PCIE2_IO_BUS         0x00000000
355 #define CONFIG_SYS_PCIE2_IO_PHYS        0xffc10000
356 #define CONFIG_SYS_PCIE2_IO_SIZE        0x00010000      /* 64k */
357
358 /* controller 1, Slot 2, tgtid 1, Base address a000 */
359 #define CONFIG_SYS_PCIE1_NAME           "PCIe SLOT CON10"
360 #define CONFIG_SYS_PCIE1_MEM_VIRT       0x80000000
361 #define CONFIG_SYS_PCIE1_MEM_BUS        0x80000000
362 #define CONFIG_SYS_PCIE1_MEM_PHYS       0x80000000
363 #define CONFIG_SYS_PCIE1_MEM_SIZE       0x20000000      /* 512M */
364 #define CONFIG_SYS_PCIE1_IO_VIRT        0xffc00000
365 #define CONFIG_SYS_PCIE1_IO_BUS         0x00000000
366 #define CONFIG_SYS_PCIE1_IO_PHYS        0xffc00000
367 #define CONFIG_SYS_PCIE1_IO_SIZE        0x00010000      /* 64k */
368
369 #define CONFIG_PCI_SCAN_SHOW    /* show pci devices on startup */
370 #endif /* CONFIG_PCI */
371
372 /*
373  * Environment
374  */
375 #ifdef CONFIG_ENV_FIT_UCBOOT
376
377 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + 0x20000)
378 #define CONFIG_ENV_SIZE         0x20000
379 #define CONFIG_ENV_SECT_SIZE    0x20000 /* 128K (one sector) */
380
381 #else
382
383
384 #ifdef CONFIG_RAMBOOT_SPIFLASH
385
386 #define CONFIG_ENV_SIZE         0x3000          /* 12KB */
387 #define CONFIG_ENV_OFFSET       0x2000          /* 8KB */
388 #define CONFIG_ENV_SECT_SIZE    0x1000
389
390 #if defined(CONFIG_SYS_REDUNDAND_ENVIRONMENT)
391 /* Address and size of Redundant Environment Sector     */
392 #define CONFIG_ENV_OFFSET_REDUND        (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
393 #define CONFIG_ENV_SIZE_REDUND          CONFIG_ENV_SIZE
394 #endif
395
396 #elif defined(CONFIG_RAMBOOT_SDCARD)
397 #define CONFIG_FSL_FIXED_MMC_LOCATION
398 #define CONFIG_ENV_SIZE         0x2000
399 #define CONFIG_SYS_MMC_ENV_DEV  0
400
401 #elif defined(CONFIG_SYS_RAMBOOT)
402 #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE - 0x1000)
403 #define CONFIG_ENV_SIZE         0x2000
404
405 #else
406 #define CONFIG_ENV_BASE         (CONFIG_SYS_FLASH_BASE)
407 #define CONFIG_ENV_SECT_SIZE    0x20000 /* 128K (one sector) */
408 #define CONFIG_ENV_SIZE         CONFIG_ENV_SECT_SIZE
409 #define CONFIG_ENV_ADDR         (CONFIG_ENV_BASE + 0xC0000)
410 #if defined(CONFIG_SYS_REDUNDAND_ENVIRONMENT)
411 /* Address and size of Redundant Environment Sector     */
412 #define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR + CONFIG_ENV_SIZE)
413 #define CONFIG_ENV_SIZE_REDUND  CONFIG_ENV_SIZE
414 #endif
415
416 #endif
417
418 #endif  /* CONFIG_ENV_FIT_UCBOOT */
419
420 #define CONFIG_LOADS_ECHO               /* echo on for serial download */
421 #define CONFIG_SYS_LOADS_BAUD_CHANGE    /* allow baudrate change */
422
423 /*
424  * USB
425  */
426 #define CONFIG_HAS_FSL_DR_USB
427
428 #if defined(CONFIG_HAS_FSL_DR_USB)
429 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
430
431 #ifdef CONFIG_USB_EHCI_HCD
432 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
433 #define CONFIG_USB_EHCI_FSL
434 #endif
435 #endif
436
437 #undef CONFIG_WATCHDOG                  /* watchdog disabled */
438
439 #ifdef CONFIG_MMC
440 #define CONFIG_SYS_FSL_ESDHC_ADDR       CONFIG_SYS_MPC85xx_ESDHC_ADDR
441 #endif
442
443 /* Misc Extra Settings */
444 #undef CONFIG_WATCHDOG  /* watchdog disabled */
445
446 /*
447  * Miscellaneous configurable options
448  */
449 #define CONFIG_SYS_LOAD_ADDR    0x2000000       /* default load address */
450 #define CONFIG_SYS_HZ           1000    /* decrementer freq: 1ms tick */
451
452 /*
453  * For booting Linux, the board info and command line data
454  * have to be in the first 64 MB of memory, since this is
455  * the maximum mapped by the Linux kernel during initialization.
456  */
457 #define CONFIG_SYS_BOOTMAPSZ    (64 << 20)      /* Initial Memory for Linux*/
458 #define CONFIG_SYS_BOOTM_LEN    (64 << 20)      /* Increase max gunzip size */
459
460 #if defined(CONFIG_CMD_KGDB)
461 #define CONFIG_KGDB_BAUDRATE    230400  /* speed to run kgdb serial port */
462 #define CONFIG_KGDB_SER_INDEX   2       /* which serial port to use */
463 #endif
464
465 /*
466  * Environment Configuration
467  */
468
469 #if defined(CONFIG_TSEC_ENET)
470
471 #if defined(CONFIG_UCP1020_REV_1_2) || defined(CONFIG_UCP1020_REV_1_3)
472 #else
473 #error "UCP1020 module revision is not defined !!!"
474 #endif
475
476 #define CONFIG_BOOTP_SERVERIP
477
478 #define CONFIG_TSEC1_NAME       "eTSEC1"
479 #define CONFIG_TSEC2_NAME       "eTSEC2"
480 #define CONFIG_TSEC3_NAME       "eTSEC3"
481
482 #define TSEC1_PHY_ADDR  4
483 #define TSEC2_PHY_ADDR  0
484 #define TSEC2_PHY_ADDR_SGMII    0x00
485 #define TSEC3_PHY_ADDR  6
486
487 #define TSEC1_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
488 #define TSEC2_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
489 #define TSEC3_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
490
491 #define TSEC1_PHYIDX    0
492 #define TSEC2_PHYIDX    0
493 #define TSEC3_PHYIDX    0
494
495 #endif
496
497 #define CONFIG_HOSTNAME         "UCP1020"
498 #define CONFIG_ROOTPATH         "/opt/nfsroot"
499 #define CONFIG_BOOTFILE         "uImage"
500 #define CONFIG_UBOOTPATH        u-boot.bin /* U-Boot image on TFTP server */
501
502 /* default location for tftp and bootm */
503 #define CONFIG_LOADADDR         1000000
504
505 #if defined(CONFIG_DONGLE)
506
507 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
508 "bootcmd=run prog_spi_mbrbootcramfs\0"                                  \
509 "bootfile=uImage\0"                                                     \
510 "consoledev=ttyS0\0"                                                    \
511 "cramfsfile=image.cramfs\0"                                             \
512 "dtbaddr=0x00c00000\0"                                                  \
513 "dtbfile=image.dtb\0"                                                   \
514 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
515 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
516 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
517 "fileaddr=0x01000000\0"                                                 \
518 "filesize=0x00080000\0"                                                 \
519 "flashmbr=sf probe 0; "                                                 \
520         "tftp $loadaddr $mbr; "                                         \
521         "sf erase $mbr_offset +$filesize; "                             \
522         "sf write $loadaddr $mbr_offset $filesize\0"                    \
523 "flashrecovery=tftp $recoveryaddr $cramfsfile; "                        \
524         "protect off $nor_recoveryaddr +$filesize; "                    \
525         "erase $nor_recoveryaddr +$filesize; "                          \
526         "cp.b $recoveryaddr $nor_recoveryaddr $filesize; "              \
527         "protect on $nor_recoveryaddr +$filesize\0 "                    \
528 "flashuboot=tftp $ubootaddr $ubootfile; "                               \
529         "protect off $nor_ubootaddr +$filesize; "                       \
530         "erase $nor_ubootaddr +$filesize; "                             \
531         "cp.b $ubootaddr $nor_ubootaddr $filesize; "                    \
532         "protect on $nor_ubootaddr +$filesize\0 "                       \
533 "flashworking=tftp $workingaddr $cramfsfile; "                          \
534         "protect off $nor_workingaddr +$filesize; "                     \
535         "erase $nor_workingaddr +$filesize; "                           \
536         "cp.b $workingaddr $nor_workingaddr $filesize; "                \
537         "protect on $nor_workingaddr +$filesize\0 "                     \
538 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
539 "kerneladdr=0x01100000\0"                                               \
540 "kernelfile=uImage\0"                                                   \
541 "loadaddr=0x01000000\0"                                                 \
542 "mbr=uCP1020d.mbr\0"                                                    \
543 "mbr_offset=0x00000000\0"                                               \
544 "mmbr=uCP1020Quiet.mbr\0"                                               \
545 "mmcpart=0:2\0"                                                         \
546 "mmc__mbrd=fatload mmc $mmcpart $loadaddr $mbr; "                       \
547         "mmc erase 1 1; "                                               \
548         "mmc write $loadaddr 1 1\0"                                     \
549 "mmc__uboot=fatload mmc $mmcpart $loadaddr $ubootfile; "                \
550         "mmc erase 0x40 0x400; "                                        \
551         "mmc write $loadaddr 0x40 0x400\0"                              \
552 "netdev=eth0\0"                                                         \
553 "nor_recoveryaddr=0xEC0A0000\0"                                         \
554 "nor_ubootaddr=0xEFF80000\0"                                            \
555 "nor_workingaddr=0xECFA0000\0"                                          \
556 "norbootrecovery=setenv bootargs $recoverybootargs"                     \
557         " console=$consoledev,$baudrate $othbootargs; "                 \
558         "run norloadrecovery; "                                         \
559         "bootm $kerneladdr - $dtbaddr\0"                                \
560 "norbootworking=setenv bootargs $workingbootargs"                       \
561         " console=$consoledev,$baudrate $othbootargs; "                 \
562         "run norloadworking; "                                          \
563         "bootm $kerneladdr - $dtbaddr\0"                                \
564 "norloadrecovery=mw.l $kerneladdr 0x0 0x00a00000; "                     \
565         "setenv cramfsaddr $nor_recoveryaddr; "                         \
566         "cramfsload $dtbaddr $dtbfile; "                                \
567         "cramfsload $kerneladdr $kernelfile\0"                          \
568 "norloadworking=mw.l $kerneladdr 0x0 0x00a00000; "                      \
569         "setenv cramfsaddr $nor_workingaddr; "                          \
570         "cramfsload $dtbaddr $dtbfile; "                                \
571         "cramfsload $kerneladdr $kernelfile\0"                          \
572 "prog_spi_mbr=run spi__mbr\0"                                           \
573 "prog_spi_mbrboot=run spi__mbr; run spi__boot1; run spi__boot2\0"       \
574 "prog_spi_mbrbootcramfs=run spi__mbr; run spi__boot1; run spi__boot2; " \
575         "run spi__cramfs\0"                                             \
576 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
577         " console=$consoledev,$baudrate $othbootargs; "                 \
578         "tftp $rootfsaddr $rootfsfile; "                                \
579         "tftp $loadaddr $kernelfile; "                                  \
580         "tftp $dtbaddr $dtbfile; "                                      \
581         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
582 "ramdisk_size=120000\0"                                                 \
583 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
584 "recoveryaddr=0x02F00000\0"                                             \
585 "recoverybootargs=root=/dev/mtdblock0 rootfstype=cramfs ro\0"           \
586 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
587         "mw.l 0xffe0f008 0x00400000\0"                                  \
588 "rootfsaddr=0x02F00000\0"                                               \
589 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
590 "rootpath=/opt/nfsroot\0"                                               \
591 "spi__boot1=fatload mmc $mmcpart $loadaddr u-boot.bin; "                \
592         "protect off 0xeC000000 +$filesize; "                           \
593         "erase 0xEC000000 +$filesize; "                                 \
594         "cp.b $loadaddr 0xEC000000 $filesize; "                         \
595         "cmp.b $loadaddr 0xEC000000 $filesize; "                        \
596         "protect on 0xeC000000 +$filesize\0"                            \
597 "spi__boot2=fatload mmc $mmcpart $loadaddr u-boot.bin; "                \
598         "protect off 0xeFF80000 +$filesize; "                           \
599         "erase 0xEFF80000 +$filesize; "                                 \
600         "cp.b $loadaddr 0xEFF80000 $filesize; "                         \
601         "cmp.b $loadaddr 0xEFF80000 $filesize; "                        \
602         "protect on 0xeFF80000 +$filesize\0"                            \
603 "spi__bootd=fatload mmc $mmcpart $loadaddr $ubootd; "                   \
604         "sf probe 0; sf erase 0x8000 +$filesize; "                      \
605         "sf write $loadaddr 0x8000 $filesize\0"                         \
606 "spi__cramfs=fatload mmc $mmcpart $loadaddr image.cramfs; "             \
607         "protect off 0xec0a0000 +$filesize; "                           \
608         "erase 0xeC0A0000 +$filesize; "                                 \
609         "cp.b $loadaddr 0xeC0A0000 $filesize; "                         \
610         "protect on 0xec0a0000 +$filesize\0"                            \
611 "spi__mbr=fatload mmc $mmcpart $loadaddr $mmbr; "                       \
612         "sf probe 1; sf erase 0 +$filesize; "                           \
613         "sf write $loadaddr 0 $filesize\0"                              \
614 "spi__mbrd=fatload mmc $mmcpart $loadaddr $mbr; "                       \
615         "sf probe 0; sf erase 0 +$filesize; "                           \
616         "sf write $loadaddr 0 $filesize\0"                              \
617 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
618         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
619         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
620         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
621         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
622         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
623 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
624 "ubootaddr=0x01000000\0"                                                \
625 "ubootfile=u-boot.bin\0"                                                \
626 "ubootd=u-boot4dongle.bin\0"                                            \
627 "upgrade=run flashworking\0"                                            \
628 "usb_phy_type=ulpi\0 "                                                  \
629 "workingaddr=0x02F00000\0"                                              \
630 "workingbootargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"
631
632 #else
633
634 #if defined(CONFIG_UCP1020T1)
635
636 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
637 "bootcmd=run releasefpga; run norbootworking || run norbootrecovery\0"  \
638 "bootfile=uImage\0"                                                     \
639 "consoledev=ttyS0\0"                                                    \
640 "cramfsfile=image.cramfs\0"                                             \
641 "dtbaddr=0x00c00000\0"                                                  \
642 "dtbfile=image.dtb\0"                                                   \
643 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
644 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
645 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
646 "fileaddr=0x01000000\0"                                                 \
647 "filesize=0x00080000\0"                                                 \
648 "flashmbr=sf probe 0; "                                                 \
649         "tftp $loadaddr $mbr; "                                         \
650         "sf erase $mbr_offset +$filesize; "                             \
651         "sf write $loadaddr $mbr_offset $filesize\0"                    \
652 "flashrecovery=tftp $recoveryaddr $cramfsfile; "                        \
653         "protect off $nor_recoveryaddr +$filesize; "                    \
654         "erase $nor_recoveryaddr +$filesize; "                          \
655         "cp.b $recoveryaddr $nor_recoveryaddr $filesize; "              \
656         "protect on $nor_recoveryaddr +$filesize\0 "                    \
657 "flashuboot=tftp $ubootaddr $ubootfile; "                               \
658         "protect off $nor_ubootaddr +$filesize; "                       \
659         "erase $nor_ubootaddr +$filesize; "                             \
660         "cp.b $ubootaddr $nor_ubootaddr $filesize; "                    \
661         "protect on $nor_ubootaddr +$filesize\0 "                       \
662 "flashworking=tftp $workingaddr $cramfsfile; "                          \
663         "protect off $nor_workingaddr +$filesize; "                     \
664         "erase $nor_workingaddr +$filesize; "                           \
665         "cp.b $workingaddr $nor_workingaddr $filesize; "                \
666         "protect on $nor_workingaddr +$filesize\0 "                     \
667 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
668 "kerneladdr=0x01100000\0"                                               \
669 "kernelfile=uImage\0"                                                   \
670 "loadaddr=0x01000000\0"                                                 \
671 "mbr=uCP1020.mbr\0"                                                     \
672 "mbr_offset=0x00000000\0"                                               \
673 "netdev=eth0\0"                                                         \
674 "nor_recoveryaddr=0xEC0A0000\0"                                         \
675 "nor_ubootaddr=0xEFF80000\0"                                            \
676 "nor_workingaddr=0xECFA0000\0"                                          \
677 "norbootrecovery=setenv bootargs $recoverybootargs"                     \
678         " console=$consoledev,$baudrate $othbootargs; "                 \
679         "run norloadrecovery; "                                         \
680         "bootm $kerneladdr - $dtbaddr\0"                                \
681 "norbootworking=setenv bootargs $workingbootargs"                       \
682         " console=$consoledev,$baudrate $othbootargs; "                 \
683         "run norloadworking; "                                          \
684         "bootm $kerneladdr - $dtbaddr\0"                                \
685 "norloadrecovery=mw.l $kerneladdr 0x0 0x00a00000; "                     \
686         "setenv cramfsaddr $nor_recoveryaddr; "                         \
687         "cramfsload $dtbaddr $dtbfile; "                                \
688         "cramfsload $kerneladdr $kernelfile\0"                          \
689 "norloadworking=mw.l $kerneladdr 0x0 0x00a00000; "                      \
690         "setenv cramfsaddr $nor_workingaddr; "                          \
691         "cramfsload $dtbaddr $dtbfile; "                                \
692         "cramfsload $kerneladdr $kernelfile\0"                          \
693 "othbootargs=quiet\0"                                                   \
694 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
695         " console=$consoledev,$baudrate $othbootargs; "                 \
696         "tftp $rootfsaddr $rootfsfile; "                                \
697         "tftp $loadaddr $kernelfile; "                                  \
698         "tftp $dtbaddr $dtbfile; "                                      \
699         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
700 "ramdisk_size=120000\0"                                                 \
701 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
702 "recoveryaddr=0x02F00000\0"                                             \
703 "recoverybootargs=root=/dev/mtdblock0 rootfstype=cramfs ro\0"           \
704 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
705         "mw.l 0xffe0f008 0x00400000\0"                                  \
706 "rootfsaddr=0x02F00000\0"                                               \
707 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
708 "rootpath=/opt/nfsroot\0"                                               \
709 "silent=1\0"                                                            \
710 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
711         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
712         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
713         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
714         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
715         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
716 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
717 "ubootaddr=0x01000000\0"                                                \
718 "ubootfile=u-boot.bin\0"                                                \
719 "upgrade=run flashworking\0"                                            \
720 "workingaddr=0x02F00000\0"                                              \
721 "workingbootargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"
722
723 #else /* For Arcturus Modules */
724
725 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
726 "bootcmd=run norkernel\0"                                               \
727 "bootfile=uImage\0"                                                     \
728 "consoledev=ttyS0\0"                                                    \
729 "dtbaddr=0x00c00000\0"                                                  \
730 "dtbfile=image.dtb\0"                                                   \
731 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
732 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
733 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
734 "fileaddr=0x01000000\0"                                                 \
735 "filesize=0x00080000\0"                                                 \
736 "flashmbr=sf probe 0; "                                                 \
737         "tftp $loadaddr $mbr; "                                         \
738         "sf erase $mbr_offset +$filesize; "                             \
739         "sf write $loadaddr $mbr_offset $filesize\0"                    \
740 "flashuboot=tftp $loadaddr $ubootfile; "                                \
741         "protect off $nor_ubootaddr0 +$filesize; "                      \
742         "erase $nor_ubootaddr0 +$filesize; "                            \
743         "cp.b $loadaddr $nor_ubootaddr0 $filesize; "                    \
744         "protect on $nor_ubootaddr0 +$filesize; "                       \
745         "protect off $nor_ubootaddr1 +$filesize; "                      \
746         "erase $nor_ubootaddr1 +$filesize; "                            \
747         "cp.b $loadaddr $nor_ubootaddr1 $filesize; "                    \
748         "protect on $nor_ubootaddr1 +$filesize\0 "                      \
749 "format0=protect off $part0base +$part0size; "                          \
750         "erase $part0base +$part0size\0"                                \
751 "format1=protect off $part1base +$part1size; "                          \
752         "erase $part1base +$part1size\0"                                \
753 "format2=protect off $part2base +$part2size; "                          \
754         "erase $part2base +$part2size\0"                                \
755 "format3=protect off $part3base +$part3size; "                          \
756         "erase $part3base +$part3size\0"                                \
757 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
758 "kerneladdr=0x01100000\0"                                               \
759 "kernelargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"                 \
760 "kernelfile=uImage\0"                                                   \
761 "loadaddr=0x01000000\0"                                                 \
762 "mbr=uCP1020.mbr\0"                                                     \
763 "mbr_offset=0x00000000\0"                                               \
764 "netdev=eth0\0"                                                         \
765 "nor_ubootaddr0=0xEC000000\0"                                           \
766 "nor_ubootaddr1=0xEFF80000\0"                                           \
767 "norkernel=setenv bootargs $kernelargs console=$consoledev,$baudrate; " \
768         "run norkernelload; "                                           \
769         "bootm $kerneladdr - $dtbaddr\0"                                \
770 "norkernelload=mw.l $kerneladdr 0x0 0x00a00000; "                       \
771         "setenv cramfsaddr $part0base; "                                \
772         "cramfsload $dtbaddr $dtbfile; "                                \
773         "cramfsload $kerneladdr $kernelfile\0"                          \
774 "part0base=0xEC100000\0"                                                \
775 "part0size=0x00700000\0"                                                \
776 "part1base=0xEC800000\0"                                                \
777 "part1size=0x02000000\0"                                                \
778 "part2base=0xEE800000\0"                                                \
779 "part2size=0x00800000\0"                                                \
780 "part3base=0xEF000000\0"                                                \
781 "part3size=0x00F80000\0"                                                \
782 "partENVbase=0xEC080000\0"                                              \
783 "partENVsize=0x00080000\0"                                              \
784 "program0=tftp part0-000000.bin; "                                      \
785         "protect off $part0base +$filesize; "                           \
786         "erase $part0base +$filesize; "                                 \
787         "cp.b $loadaddr $part0base $filesize; "                         \
788         "echo Verifying...; "                                           \
789         "cmp.b $loadaddr $part0base $filesize\0"                        \
790 "program1=tftp part1-000000.bin; "                                      \
791         "protect off $part1base +$filesize; "                           \
792         "erase $part1base +$filesize; "                                 \
793         "cp.b $loadaddr $part1base $filesize; "                         \
794         "echo Verifying...; "                                           \
795         "cmp.b $loadaddr $part1base $filesize\0"                        \
796 "program2=tftp part2-000000.bin; "                                      \
797         "protect off $part2base +$filesize; "                           \
798         "erase $part2base +$filesize; "                                 \
799         "cp.b $loadaddr $part2base $filesize; "                         \
800         "echo Verifying...; "                                           \
801         "cmp.b $loadaddr $part2base $filesize\0"                        \
802 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
803         "  console=$consoledev,$baudrate $othbootargs; "                \
804         "tftp $rootfsaddr $rootfsfile; "                                \
805         "tftp $loadaddr $kernelfile; "                                  \
806         "tftp $dtbaddr $dtbfile; "                                      \
807         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
808 "ramdisk_size=120000\0"                                                 \
809 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
810 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
811         "mw.l 0xffe0f008 0x00400000\0"                                  \
812 "rootfsaddr=0x02F00000\0"                                               \
813 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
814 "rootpath=/opt/nfsroot\0"                                               \
815 "spi__mbr=fatload mmc $mmcpart $loadaddr $mmbr; "                       \
816         "sf probe 0; sf erase 0 +$filesize; "                           \
817         "sf write $loadaddr 0 $filesize\0"                              \
818 "spi__boot=fatload mmc $mmcpart $loadaddr u-boot.bin; "                 \
819         "protect off 0xeC000000 +$filesize; "                           \
820         "erase 0xEC000000 +$filesize; "                                 \
821         "cp.b $loadaddr 0xEC000000 $filesize; "                         \
822         "cmp.b $loadaddr 0xEC000000 $filesize; "                        \
823         "protect on 0xeC000000 +$filesize\0"                            \
824 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
825         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
826         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
827         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
828         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
829         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
830 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
831 "ubootfile=u-boot.bin\0"                                                \
832 "upgrade=run flashuboot\0"                                              \
833 "usb_phy_type=ulpi\0 "                                                  \
834 "boot_nfs= "                                                            \
835         "setenv bootargs root=/dev/nfs rw "                             \
836         "nfsroot=$serverip:$rootpath "                                  \
837         "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
838         "console=$consoledev,$baudrate $othbootargs;"                   \
839         "tftp $loadaddr $bootfile;"                                     \
840         "tftp $fdtaddr $fdtfile;"                                       \
841         "bootm $loadaddr - $fdtaddr\0"                                  \
842 "boot_hd = "                                                            \
843         "setenv bootargs root=/dev/$bdev rw rootdelay=30 "              \
844         "console=$consoledev,$baudrate $othbootargs;"                   \
845         "usb start;"                                                    \
846         "ext2load usb 0:1 $loadaddr /boot/$bootfile;"                   \
847         "ext2load usb 0:1 $fdtaddr /boot/$fdtfile;"                     \
848         "bootm $loadaddr - $fdtaddr\0"                                  \
849 "boot_usb_fat = "                                                       \
850         "setenv bootargs root=/dev/ram rw "                             \
851         "console=$consoledev,$baudrate $othbootargs "                   \
852         "ramdisk_size=$ramdisk_size;"                                   \
853         "usb start;"                                                    \
854         "fatload usb 0:2 $loadaddr $bootfile;"                          \
855         "fatload usb 0:2 $fdtaddr $fdtfile;"                            \
856         "fatload usb 0:2 $ramdiskaddr $ramdiskfile;"                    \
857         "bootm $loadaddr $ramdiskaddr $fdtaddr\0 "                      \
858 "boot_usb_ext2 = "                                                      \
859         "setenv bootargs root=/dev/ram rw "                             \
860         "console=$consoledev,$baudrate $othbootargs "                   \
861         "ramdisk_size=$ramdisk_size;"                                   \
862         "usb start;"                                                    \
863         "ext2load usb 0:4 $loadaddr $bootfile;"                         \
864         "ext2load usb 0:4 $fdtaddr $fdtfile;"                           \
865         "ext2load usb 0:4 $ramdiskaddr $ramdiskfile;"                   \
866         "bootm $loadaddr $ramdiskaddr $fdtaddr\0 "                      \
867 "boot_nor = "                                                           \
868         "setenv bootargs root=/dev/$jffs2nor rw "                       \
869         "console=$consoledev,$baudrate rootfstype=jffs2 $othbootargs;"  \
870         "bootm $norbootaddr - $norfdtaddr\0 "                           \
871 "boot_ram = "                                                           \
872         "setenv bootargs root=/dev/ram rw "                             \
873         "console=$consoledev,$baudrate $othbootargs "                   \
874         "ramdisk_size=$ramdisk_size;"                                   \
875         "tftp $ramdiskaddr $ramdiskfile;"                               \
876         "tftp $loadaddr $bootfile;"                                     \
877         "tftp $fdtaddr $fdtfile;"                                       \
878         "bootm $loadaddr $ramdiskaddr $fdtaddr\0"
879
880 #endif
881 #endif
882
883 #endif /* __CONFIG_H */