include/configs/UCP1020.h

   1 /*
   2  * Copyright 2013-2015 Arcturus Networks, Inc.
   3  *           http://www.arcturusnetworks.com/products/ucp1020/
   4  * based on include/configs/p1_p2_rdb_pc.h
   5  * original copyright follows:
   6  * Copyright 2009-2011 Freescale Semiconductor, Inc.
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10
  11 /*
  12  * QorIQ uCP1020-xx boards configuration file
  13  */
  14 #ifndef __CONFIG_H
  15 #define __CONFIG_H
  16
  17 #define CONFIG_FSL_ELBC
  18 #define CONFIG_PCI
  19 #define CONFIG_PCIE1    /* PCIE controller 1 (slot 1) */
  20 #define CONFIG_PCIE2    /* PCIE controller 2 (slot 2) */
  21 #define CONFIG_FSL_PCI_INIT     /* Use common FSL init code */
  22 #define CONFIG_PCI_INDIRECT_BRIDGE      /* indirect PCI bridge support */
  23 #define CONFIG_FSL_PCIE_RESET   /* need PCIe reset errata */
  24 #define CONFIG_SYS_PCI_64BIT    /* enable 64-bit PCI resources */
  25
  26 #if defined(CONFIG_TARTGET_UCP1020T1)
  27
  28 #define CONFIG_UCP1020_REV_1_3
  29
  30 #define CONFIG_BOARDNAME "uCP1020-64EE512-0U1-XR-T1"
  31 #define CONFIG_P1020
  32
  33 #define CONFIG_TSEC_ENET
  34 #define CONFIG_TSEC1
  35 #define CONFIG_TSEC3
  36 #define CONFIG_HAS_ETH0
  37 #define CONFIG_HAS_ETH1
  38 #define CONFIG_ETHADDR          00:19:D3:FF:FF:FF
  39 #define CONFIG_ETH1ADDR         00:19:D3:FF:FF:FE
  40 #define CONFIG_ETH2ADDR         00:19:D3:FF:FF:FD
  41 #define CONFIG_IPADDR           10.80.41.229
  42 #define CONFIG_SERVERIP         10.80.41.227
  43 #define CONFIG_NETMASK          255.255.252.0
  44 #define CONFIG_ETHPRIME         "eTSEC3"
  45
  46 #ifndef CONFIG_SPI_FLASH
  47 #endif
  48 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
  49
  50 #define CONFIG_MMC
  51 #define CONFIG_SYS_L2_SIZE      (256 << 10)
  52
  53 #define CONFIG_LAST_STAGE_INIT
  54
  55 #endif
  56
  57 #if defined(CONFIG_TARGET_UCP1020)
  58
  59 #define CONFIG_UCP1020
  60 #define CONFIG_UCP1020_REV_1_3
  61
  62 #define CONFIG_BOARDNAME_LOCAL "uCP1020-64EEE512-OU1-XR"
  63 #define CONFIG_P1020
  64
  65 #define CONFIG_TSEC_ENET
  66 #define CONFIG_TSEC1
  67 #define CONFIG_TSEC2
  68 #define CONFIG_TSEC3
  69 #define CONFIG_HAS_ETH0
  70 #define CONFIG_HAS_ETH1
  71 #define CONFIG_HAS_ETH2
  72 #define CONFIG_ETHADDR          00:06:3B:FF:FF:FF
  73 #define CONFIG_ETH1ADDR         00:06:3B:FF:FF:FE
  74 #define CONFIG_ETH2ADDR         00:06:3B:FF:FF:FD
  75 #define CONFIG_IPADDR           192.168.1.81
  76 #define CONFIG_IPADDR1          192.168.1.82
  77 #define CONFIG_IPADDR2          192.168.1.83
  78 #define CONFIG_SERVERIP         192.168.1.80
  79 #define CONFIG_GATEWAYIP        102.168.1.1
  80 #define CONFIG_NETMASK          255.255.255.0
  81 #define CONFIG_ETHPRIME         "eTSEC1"
  82
  83 #ifndef CONFIG_SPI_FLASH
  84 #endif
  85 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
  86
  87 #define CONFIG_MMC
  88 #define CONFIG_SYS_L2_SIZE      (256 << 10)
  89
  90 #define CONFIG_LAST_STAGE_INIT
  91
  92 #endif
  93
  94 #ifdef CONFIG_SDCARD
  95 #define CONFIG_RAMBOOT_SDCARD
  96 #define CONFIG_SYS_RAMBOOT
  97 #define CONFIG_SYS_EXTRA_ENV_RELOC
  98 #define CONFIG_SYS_TEXT_BASE            0x11000000
  99 #define CONFIG_RESET_VECTOR_ADDRESS     0x1107fffc
 100 #endif
 101
 102 #ifdef CONFIG_SPIFLASH
 103 #define CONFIG_RAMBOOT_SPIFLASH
 104 #define CONFIG_SYS_RAMBOOT
 105 #define CONFIG_SYS_EXTRA_ENV_RELOC
 106 #define CONFIG_SYS_TEXT_BASE            0x11000000
 107 #define CONFIG_RESET_VECTOR_ADDRESS     0x1107fffc
 108 #endif
 109
 110 #ifndef CONFIG_SYS_TEXT_BASE
 111 #define CONFIG_SYS_TEXT_BASE            0xeff80000
 112 #endif
 113 #define CONFIG_SYS_TEXT_BASE_NOR        0xeff80000
 114
 115 #ifndef CONFIG_RESET_VECTOR_ADDRESS
 116 #define CONFIG_RESET_VECTOR_ADDRESS     0xeffffffc
 117 #endif
 118
 119 #ifndef CONFIG_SYS_MONITOR_BASE
 120 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE    /* start of monitor */
 121 #endif
 122
 123 /* High Level Configuration Options */
 124 #define CONFIG_BOOKE
 125 #define CONFIG_E500
 126 /* #define CONFIG_MPC85xx */
 127
 128 #define CONFIG_MP
 129
 130 #define CONFIG_FSL_LAW
 131
 132 #define CONFIG_ENV_OVERWRITE
 133
 134 #define CONFIG_CMD_SATA
 135 #define CONFIG_SATA_SIL
 136 #define CONFIG_SYS_SATA_MAX_DEVICE      2
 137 #define CONFIG_LIBATA
 138 #define CONFIG_LBA48
 139
 140 #define CONFIG_SYS_CLK_FREQ     66666666
 141 #define CONFIG_DDR_CLK_FREQ     66666666
 142
 143 #define CONFIG_HWCONFIG
 144
 145 #define CONFIG_DTT_ADM1021      1       /* ADM1021 temp sensor support  */
 146 #define CONFIG_SYS_DTT_BUS_NUM  1       /* The I2C bus for DTT          */
 147 #define CONFIG_DTT_SENSORS      { 0, 1 }        /* Sensor index */
 148 /*
 149  * ADM1021/NCT72 temp sensor configuration (see dtt/adm1021.c for details).
 150  * there will be one entry in this array for each two (dummy) sensors in
 151  * CONFIG_DTT_SENSORS.
 152  *
 153  * For uCP1020 module:
 154  * - only one ADM1021/NCT72
 155  * - i2c addr 0x41
 156  * - conversion rate 0x02 = 0.25 conversions/second
 157  * - ALERT output disabled
 158  * - local temp sensor enabled, min set to 0 deg, max set to 85 deg
 159  * - remote temp sensor enabled, min set to 0 deg, max set to 85 deg
 160  */
 161 #define CONFIG_SYS_DTT_ADM1021  { { CONFIG_SYS_I2C_NCT72_ADDR, \
 162                                          0x02, 0, 1, 0, 85, 1, 0, 85} }
 163
 164 #define CONFIG_CMD_DTT
 165
 166 /*
 167  * These can be toggled for performance analysis, otherwise use default.
 168  */
 169 #define CONFIG_L2_CACHE
 170 #define CONFIG_BTB
 171
 172 #define CONFIG_BOARD_EARLY_INIT_F       /* Call board_pre_init */
 173
 174 #define CONFIG_ENABLE_36BIT_PHYS
 175
 176 #define CONFIG_SYS_MEMTEST_START        0x00200000      /* memtest works on */
 177 #define CONFIG_SYS_MEMTEST_END          0x1fffffff
 178 #define CONFIG_PANIC_HANG       /* do not reset board on panic */
 179
 180 #define CONFIG_SYS_CCSRBAR              0xffe00000
 181 #define CONFIG_SYS_CCSRBAR_PHYS_LOW     CONFIG_SYS_CCSRBAR
 182
 183 /* IN case of NAND bootloader relocate CCSRBAR in RAMboot code not in the 4k
 184        SPL code*/
 185 #ifdef CONFIG_SPL_BUILD
 186 #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
 187 #endif
 188
 189 /* DDR Setup */
 190 #define CONFIG_DDR_ECC_ENABLE
 191 #define CONFIG_SYS_FSL_DDR3
 192 #ifndef CONFIG_DDR_ECC_ENABLE
 193 #define CONFIG_SYS_DDR_RAW_TIMING
 194 #define CONFIG_DDR_SPD
 195 #endif
 196 #define CONFIG_SYS_SPD_BUS_NUM 1
 197 #undef CONFIG_FSL_DDR_INTERACTIVE
 198
 199 #define CONFIG_SYS_SDRAM_SIZE_LAW       LAW_SIZE_512M
 200 #define CONFIG_CHIP_SELECTS_PER_CTRL    1
 201 #define CONFIG_SYS_SDRAM_SIZE           (1u << (CONFIG_SYS_SDRAM_SIZE_LAW - 19))
 202 #define CONFIG_SYS_DDR_SDRAM_BASE       0x00000000
 203 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
 204
 205 #define CONFIG_NUM_DDR_CONTROLLERS      1
 206 #define CONFIG_DIMM_SLOTS_PER_CTLR      1
 207
 208 /* Default settings for DDR3 */
 209 #define CONFIG_SYS_DDR_CS0_BNDS         0x0000003f
 210 #define CONFIG_SYS_DDR_CS0_CONFIG       0x80014302
 211 #define CONFIG_SYS_DDR_CS0_CONFIG_2     0x00000000
 212 #define CONFIG_SYS_DDR_CS1_BNDS         0x0040007f
 213 #define CONFIG_SYS_DDR_CS1_CONFIG       0x80014302
 214 #define CONFIG_SYS_DDR_CS1_CONFIG_2     0x00000000
 215
 216 #define CONFIG_SYS_DDR_DATA_INIT        0xdeadbeef
 217 #define CONFIG_SYS_DDR_INIT_ADDR        0x00000000
 218 #define CONFIG_SYS_DDR_INIT_EXT_ADDR    0x00000000
 219 #define CONFIG_SYS_DDR_MODE_CONTROL     0x00000000
 220
 221 #define CONFIG_SYS_DDR_ZQ_CONTROL       0x89080600
 222 #define CONFIG_SYS_DDR_WRLVL_CONTROL    0x8655A608
 223 #define CONFIG_SYS_DDR_SR_CNTR          0x00000000
 224 #define CONFIG_SYS_DDR_RCW_1            0x00000000
 225 #define CONFIG_SYS_DDR_RCW_2            0x00000000
 226 #ifdef CONFIG_DDR_ECC_ENABLE
 227 #define CONFIG_SYS_DDR_CONTROL          0xE70C0000      /* Type = DDR3 & ECC */
 228 #else
 229 #define CONFIG_SYS_DDR_CONTROL          0xC70C0000      /* Type = DDR3 */
 230 #endif
 231 #define CONFIG_SYS_DDR_CONTROL_2        0x04401050
 232 #define CONFIG_SYS_DDR_TIMING_4         0x00220001
 233 #define CONFIG_SYS_DDR_TIMING_5         0x03402400
 234
 235 #define CONFIG_SYS_DDR_TIMING_3         0x00020000
 236 #define CONFIG_SYS_DDR_TIMING_0         0x00330004
 237 #define CONFIG_SYS_DDR_TIMING_1         0x6f6B4846
 238 #define CONFIG_SYS_DDR_TIMING_2         0x0FA8C8CF
 239 #define CONFIG_SYS_DDR_CLK_CTRL         0x03000000
 240 #define CONFIG_SYS_DDR_MODE_1           0x40461520
 241 #define CONFIG_SYS_DDR_MODE_2           0x8000c000
 242 #define CONFIG_SYS_DDR_INTERVAL         0x0C300000
 243
 244 #undef CONFIG_CLOCKS_IN_MHZ
 245
 246 /*
 247  * Memory map
 248  *
 249  * 0x0000_0000 0x7fff_ffff      DDR             Up to 2GB cacheable
 250  * 0x8000_0000 0xdfff_ffff      PCI Express Mem 1G non-cacheable(PCIe * 2)
 251  * 0xec00_0000 0xefff_ffff      NOR flash       Up to 64M non-cacheable CS0/1
 252  * 0xf8f8_0000 0xf8ff_ffff      L2 SRAM         Up to 256K cacheable
 253  *   (early boot only)
 254  * 0xffc0_0000 0xffc3_ffff      PCI IO range    256k non-cacheable
 255  * 0xffd0_0000 0xffd0_3fff      L1 for stack    16K cacheable
 256  * 0xffe0_0000 0xffef_ffff      CCSR            1M non-cacheable
 257  */
 258
 259 /*
 260  * Local Bus Definitions
 261  */
 262 #define CONFIG_SYS_MAX_FLASH_SECT       512     /* 64M */
 263 #define CONFIG_SYS_FLASH_BASE           0xec000000
 264
 265 #define CONFIG_SYS_FLASH_BASE_PHYS      CONFIG_SYS_FLASH_BASE
 266
 267 #define CONFIG_FLASH_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) \
 268         | BR_PS_16 | BR_V)
 269
 270 #define CONFIG_FLASH_OR_PRELIM          0xfc000ff7
 271
 272 #define CONFIG_SYS_FLASH_BANKS_LIST     {CONFIG_SYS_FLASH_BASE_PHYS}
 273 #define CONFIG_SYS_FLASH_QUIET_TEST
 274 #define CONFIG_FLASH_SHOW_PROGRESS      45      /* count down from 45/5: 9..1 */
 275
 276 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* number of banks */
 277
 278 #undef CONFIG_SYS_FLASH_CHECKSUM
 279 #define CONFIG_SYS_FLASH_ERASE_TOUT     60000   /* Flash Erase Timeout (ms) */
 280 #define CONFIG_SYS_FLASH_WRITE_TOUT     500     /* Flash Write Timeout (ms) */
 281
 282 #define CONFIG_FLASH_CFI_DRIVER
 283 #define CONFIG_SYS_FLASH_CFI
 284 #define CONFIG_SYS_FLASH_EMPTY_INFO
 285 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
 286
 287 #define CONFIG_BOARD_EARLY_INIT_R       /* call board_early_init_r function */
 288
 289 #define CONFIG_SYS_INIT_RAM_LOCK
 290 #define CONFIG_SYS_INIT_RAM_ADDR        0xffd00000 /* stack in RAM */
 291 /* Initial L1 address */
 292 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS   CONFIG_SYS_INIT_RAM_ADDR
 293 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0
 294 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR_PHYS
 295 /* Size of used area in RAM */
 296 #define CONFIG_SYS_INIT_RAM_SIZE        0x00004000
 297
 298 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - \
 299                                         GENERATED_GBL_DATA_SIZE)
 300 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 301
 302 #define CONFIG_SYS_MONITOR_LEN  (256 * 1024)/* Reserve 256 kB for Mon */
 303 #define CONFIG_SYS_MALLOC_LEN   (1024 * 1024)/* Reserved for malloc */
 304
 305 #define CONFIG_SYS_PMC_BASE     0xff980000
 306 #define CONFIG_SYS_PMC_BASE_PHYS        CONFIG_SYS_PMC_BASE
 307 #define CONFIG_PMC_BR_PRELIM    (BR_PHYS_ADDR(CONFIG_SYS_PMC_BASE_PHYS) | \
 308                                         BR_PS_8 | BR_V)
 309 #define CONFIG_PMC_OR_PRELIM    (OR_AM_64KB | OR_GPCM_CSNT | OR_GPCM_XACS | \
 310                                  OR_GPCM_SCY | OR_GPCM_TRLX | OR_GPCM_EHTR | \
 311                                  OR_GPCM_EAD)
 312
 313 #define CONFIG_SYS_BR0_PRELIM   CONFIG_FLASH_BR_PRELIM  /* NOR Base Address */
 314 #define CONFIG_SYS_OR0_PRELIM   CONFIG_FLASH_OR_PRELIM  /* NOR Options */
 315 #ifdef CONFIG_NAND_FSL_ELBC
 316 #define CONFIG_SYS_BR1_PRELIM   CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Addr */
 317 #define CONFIG_SYS_OR1_PRELIM   CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
 318 #endif
 319
 320 /* Serial Port - controlled on board with jumper J8
 321  * open - index 2
 322  * shorted - index 1
 323  */
 324 #define CONFIG_CONS_INDEX               1
 325 #undef CONFIG_SERIAL_SOFTWARE_FIFO
 326 #define CONFIG_SYS_NS16550_SERIAL
 327 #define CONFIG_SYS_NS16550_REG_SIZE     1
 328 #define CONFIG_SYS_NS16550_CLK          get_bus_freq(0)
 329 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_INIT_MINIMAL)
 330 #define CONFIG_NS16550_MIN_FUNCTIONS
 331 #endif
 332
 333 #define CONFIG_SYS_BAUDRATE_TABLE       \
 334         {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
 335
 336 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR + 0x4500)
 337 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR + 0x4600)
 338
 339 /* I2C */
 340 #define CONFIG_SYS_I2C
 341 #define CONFIG_SYS_I2C_FSL
 342 #define CONFIG_SYS_FSL_I2C_SPEED        400000
 343 #define CONFIG_SYS_FSL_I2C_SLAVE        0x7F
 344 #define CONFIG_SYS_FSL_I2C_OFFSET       0x3000
 345 #define CONFIG_SYS_FSL_I2C2_SPEED       400000
 346 #define CONFIG_SYS_FSL_I2C2_SLAVE       0x7F
 347 #define CONFIG_SYS_FSL_I2C2_OFFSET      0x3100
 348 #define CONFIG_SYS_I2C_NOPROBES         { {0, 0x29} }
 349 #define CONFIG_SYS_SPD_BUS_NUM          1 /* For rom_loc and flash bank */
 350
 351 #define CONFIG_RTC_DS1337
 352 #define CONFIG_SYS_RTC_DS1337_NOOSC
 353 #define CONFIG_SYS_I2C_RTC_ADDR         0x68
 354 #define CONFIG_SYS_I2C_PCA9557_ADDR     0x18
 355 #define CONFIG_SYS_I2C_NCT72_ADDR       0x4C
 356 #define CONFIG_SYS_I2C_IDT6V49205B      0x69
 357
 358 /*
 359  * eSPI - Enhanced SPI
 360  */
 361 #define CONFIG_HARD_SPI
 362
 363 #define CONFIG_SF_DEFAULT_SPEED         10000000
 364 #define CONFIG_SF_DEFAULT_MODE          SPI_MODE_0
 365
 366 #if defined(CONFIG_PCI)
 367 /*
 368  * General PCI
 369  * Memory space is mapped 1-1, but I/O space must start from 0.
 370  */
 371
 372 /* controller 2, direct to uli, tgtid 2, Base address 9000 */
 373 #define CONFIG_SYS_PCIE2_NAME           "PCIe SLOT CON9"
 374 #define CONFIG_SYS_PCIE2_MEM_VIRT       0xa0000000
 375 #define CONFIG_SYS_PCIE2_MEM_BUS        0xa0000000
 376 #define CONFIG_SYS_PCIE2_MEM_PHYS       0xa0000000
 377 #define CONFIG_SYS_PCIE2_MEM_SIZE       0x20000000      /* 512M */
 378 #define CONFIG_SYS_PCIE2_IO_VIRT        0xffc10000
 379 #define CONFIG_SYS_PCIE2_IO_BUS         0x00000000
 380 #define CONFIG_SYS_PCIE2_IO_PHYS        0xffc10000
 381 #define CONFIG_SYS_PCIE2_IO_SIZE        0x00010000      /* 64k */
 382
 383 /* controller 1, Slot 2, tgtid 1, Base address a000 */
 384 #define CONFIG_SYS_PCIE1_NAME           "PCIe SLOT CON10"
 385 #define CONFIG_SYS_PCIE1_MEM_VIRT       0x80000000
 386 #define CONFIG_SYS_PCIE1_MEM_BUS        0x80000000
 387 #define CONFIG_SYS_PCIE1_MEM_PHYS       0x80000000
 388 #define CONFIG_SYS_PCIE1_MEM_SIZE       0x20000000      /* 512M */
 389 #define CONFIG_SYS_PCIE1_IO_VIRT        0xffc00000
 390 #define CONFIG_SYS_PCIE1_IO_BUS         0x00000000
 391 #define CONFIG_SYS_PCIE1_IO_PHYS        0xffc00000
 392 #define CONFIG_SYS_PCIE1_IO_SIZE        0x00010000      /* 64k */
 393
 394 #define CONFIG_PCI_PNP  /* do pci plug-and-play */
 395 #define CONFIG_CMD_PCI
 396
 397 #define CONFIG_PCI_SCAN_SHOW    /* show pci devices on startup */
 398 #define CONFIG_DOS_PARTITION
 399 #endif /* CONFIG_PCI */
 400
 401 /*
 402  * Environment
 403  */
 404 #ifdef CONFIG_ENV_FIT_UCBOOT
 405
 406 #define CONFIG_ENV_IS_IN_FLASH
 407 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + 0x20000)
 408 #define CONFIG_ENV_SIZE         0x20000
 409 #define CONFIG_ENV_SECT_SIZE    0x20000 /* 128K (one sector) */
 410
 411 #else
 412
 413 #define CONFIG_ENV_SPI_BUS      0
 414 #define CONFIG_ENV_SPI_CS       0
 415 #define CONFIG_ENV_SPI_MAX_HZ   10000000
 416 #define CONFIG_ENV_SPI_MODE     0
 417
 418 #ifdef CONFIG_RAMBOOT_SPIFLASH
 419
 420 #define CONFIG_ENV_IS_IN_SPI_FLASH
 421 #define CONFIG_ENV_SIZE         0x3000          /* 12KB */
 422 #define CONFIG_ENV_OFFSET       0x2000          /* 8KB */
 423 #define CONFIG_ENV_SECT_SIZE    0x1000
 424
 425 #if defined(CONFIG_SYS_REDUNDAND_ENVIRONMENT)
 426 /* Address and size of Redundant Environment Sector     */
 427 #define CONFIG_ENV_OFFSET_REDUND        (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
 428 #define CONFIG_ENV_SIZE_REDUND          CONFIG_ENV_SIZE
 429 #endif
 430
 431 #elif defined(CONFIG_RAMBOOT_SDCARD)
 432 #define CONFIG_ENV_IS_IN_MMC
 433 #define CONFIG_FSL_FIXED_MMC_LOCATION
 434 #define CONFIG_ENV_SIZE         0x2000
 435 #define CONFIG_SYS_MMC_ENV_DEV  0
 436
 437 #elif defined(CONFIG_SYS_RAMBOOT)
 438 #define CONFIG_ENV_IS_NOWHERE   /* Store ENV in memory only */
 439 #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE - 0x1000)
 440 #define CONFIG_ENV_SIZE         0x2000
 441
 442 #else
 443 #define CONFIG_ENV_IS_IN_FLASH
 444 #define CONFIG_ENV_BASE         (CONFIG_SYS_FLASH_BASE)
 445 #define CONFIG_ENV_SECT_SIZE    0x20000 /* 128K (one sector) */
 446 #define CONFIG_ENV_SIZE         CONFIG_ENV_SECT_SIZE
 447 #define CONFIG_ENV_ADDR         (CONFIG_ENV_BASE + 0xC0000)
 448 #if defined(CONFIG_SYS_REDUNDAND_ENVIRONMENT)
 449 /* Address and size of Redundant Environment Sector     */
 450 #define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR + CONFIG_ENV_SIZE)
 451 #define CONFIG_ENV_SIZE_REDUND  CONFIG_ENV_SIZE
 452 #endif
 453
 454 #endif
 455
 456 #endif  /* CONFIG_ENV_FIT_UCBOOT */
 457
 458 #define CONFIG_LOADS_ECHO               /* echo on for serial download */
 459 #define CONFIG_SYS_LOADS_BAUD_CHANGE    /* allow baudrate change */
 460
 461 /*
 462  * Command line configuration.
 463  */
 464 #define CONFIG_CMD_IRQ
 465 #define CONFIG_CMD_DATE
 466 #define CONFIG_CMD_IRQ
 467 #define CONFIG_CMD_REGINFO
 468 #define CONFIG_CMD_ERRATA
 469 #define CONFIG_CMD_CRAMFS
 470
 471 /*
 472  * USB
 473  */
 474 #define CONFIG_HAS_FSL_DR_USB
 475
 476 #if defined(CONFIG_HAS_FSL_DR_USB)
 477 #define CONFIG_USB_EHCI
 478
 479 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
 480
 481 #ifdef CONFIG_USB_EHCI
 482 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 483 #define CONFIG_USB_EHCI_FSL
 484 #endif
 485 #endif
 486
 487 #undef CONFIG_WATCHDOG                  /* watchdog disabled */
 488
 489 #ifdef CONFIG_MMC
 490 #define CONFIG_FSL_ESDHC
 491 #define CONFIG_SYS_FSL_ESDHC_ADDR       CONFIG_SYS_MPC85xx_ESDHC_ADDR
 492 #define CONFIG_MMC_SPI
 493 #define CONFIG_CMD_MMC_SPI
 494 #define CONFIG_GENERIC_MMC
 495 #endif
 496
 497 #if defined(CONFIG_MMC) || defined(CONFIG_USB_EHCI) || defined(CONFIG_FSL_SATA)
 498 #define CONFIG_DOS_PARTITION
 499 #endif
 500
 501 /* Misc Extra Settings */
 502 #undef CONFIG_WATCHDOG  /* watchdog disabled */
 503
 504 /*
 505  * Miscellaneous configurable options
 506  */
 507 #define CONFIG_SYS_LONGHELP                     /* undef to save memory */
 508 #define CONFIG_CMDLINE_EDITING                  /* Command-line editing */
 509 #define CONFIG_SYS_LOAD_ADDR    0x2000000       /* default load address */
 510 #if defined(CONFIG_CMD_KGDB)
 511 #define CONFIG_SYS_CBSIZE       1024            /* Console I/O Buffer Size */
 512 #else
 513 #define CONFIG_SYS_CBSIZE       256             /* Console I/O Buffer Size */
 514 #endif
 515 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 516         /* Print Buffer Size */
 517 #define CONFIG_SYS_MAXARGS      16      /* max number of command args */
 518 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */
 519 #define CONFIG_SYS_HZ           1000    /* decrementer freq: 1ms tick */
 520
 521 /*
 522  * For booting Linux, the board info and command line data
 523  * have to be in the first 64 MB of memory, since this is
 524  * the maximum mapped by the Linux kernel during initialization.
 525  */
 526 #define CONFIG_SYS_BOOTMAPSZ    (64 << 20)      /* Initial Memory for Linux*/
 527 #define CONFIG_SYS_BOOTM_LEN    (64 << 20)      /* Increase max gunzip size */
 528
 529 #if defined(CONFIG_CMD_KGDB)
 530 #define CONFIG_KGDB_BAUDRATE    230400  /* speed to run kgdb serial port */
 531 #define CONFIG_KGDB_SER_INDEX   2       /* which serial port to use */
 532 #endif
 533
 534 /*
 535  * Environment Configuration
 536  */
 537
 538 #if defined(CONFIG_TSEC_ENET)
 539
 540 #if defined(CONFIG_UCP1020_REV_1_2)
 541 #define CONFIG_PHY_MICREL_KSZ9021
 542 #elif defined(CONFIG_UCP1020_REV_1_3)
 543 #define CONFIG_PHY_MICREL_KSZ9031
 544 #else
 545 #error "UCP1020 module revision is not defined !!!"
 546 #endif
 547
 548 #define CONFIG_BOOTP_SERVERIP
 549
 550 #define CONFIG_MII              /* MII PHY management */
 551 #define CONFIG_TSEC1_NAME       "eTSEC1"
 552 #define CONFIG_TSEC2_NAME       "eTSEC2"
 553 #define CONFIG_TSEC3_NAME       "eTSEC3"
 554
 555 #define TSEC1_PHY_ADDR  4
 556 #define TSEC2_PHY_ADDR  0
 557 #define TSEC2_PHY_ADDR_SGMII    0x00
 558 #define TSEC3_PHY_ADDR  6
 559
 560 #define TSEC1_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
 561 #define TSEC2_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
 562 #define TSEC3_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
 563
 564 #define TSEC1_PHYIDX    0
 565 #define TSEC2_PHYIDX    0
 566 #define TSEC3_PHYIDX    0
 567
 568 #define CONFIG_PHY_GIGE 1       /* Include GbE speed/duplex detection */
 569
 570 #endif
 571
 572 #define CONFIG_HOSTNAME         UCP1020
 573 #define CONFIG_ROOTPATH         "/opt/nfsroot"
 574 #define CONFIG_BOOTFILE         "uImage"
 575 #define CONFIG_UBOOTPATH        u-boot.bin /* U-Boot image on TFTP server */
 576
 577 /* default location for tftp and bootm */
 578 #define CONFIG_LOADADDR         1000000
 579
 580 #define CONFIG_BOOTARGS /* the boot command will set bootargs */
 581
 582 #define CONFIG_BAUDRATE 115200
 583
 584 #if defined(CONFIG_DONGLE)
 585
 586 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 587 "bootcmd=run prog_spi_mbrbootcramfs\0"                                  \
 588 "bootfile=uImage\0"                                                     \
 589 "consoledev=ttyS0\0"                                                    \
 590 "cramfsfile=image.cramfs\0"                                             \
 591 "dtbaddr=0x00c00000\0"                                                  \
 592 "dtbfile=image.dtb\0"                                                   \
 593 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
 594 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
 595 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
 596 "fileaddr=0x01000000\0"                                                 \
 597 "filesize=0x00080000\0"                                                 \
 598 "flashmbr=sf probe 0; "                                                 \
 599         "tftp $loadaddr $mbr; "                                         \
 600         "sf erase $mbr_offset +$filesize; "                             \
 601         "sf write $loadaddr $mbr_offset $filesize\0"                    \
 602 "flashrecovery=tftp $recoveryaddr $cramfsfile; "                        \
 603         "protect off $nor_recoveryaddr +$filesize; "                    \
 604         "erase $nor_recoveryaddr +$filesize; "                          \
 605         "cp.b $recoveryaddr $nor_recoveryaddr $filesize; "              \
 606         "protect on $nor_recoveryaddr +$filesize\0 "                    \
 607 "flashuboot=tftp $ubootaddr $ubootfile; "                               \
 608         "protect off $nor_ubootaddr +$filesize; "                       \
 609         "erase $nor_ubootaddr +$filesize; "                             \
 610         "cp.b $ubootaddr $nor_ubootaddr $filesize; "                    \
 611         "protect on $nor_ubootaddr +$filesize\0 "                       \
 612 "flashworking=tftp $workingaddr $cramfsfile; "                          \
 613         "protect off $nor_workingaddr +$filesize; "                     \
 614         "erase $nor_workingaddr +$filesize; "                           \
 615         "cp.b $workingaddr $nor_workingaddr $filesize; "                \
 616         "protect on $nor_workingaddr +$filesize\0 "                     \
 617 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
 618 "kerneladdr=0x01100000\0"                                               \
 619 "kernelfile=uImage\0"                                                   \
 620 "loadaddr=0x01000000\0"                                                 \
 621 "mbr=uCP1020d.mbr\0"                                                    \
 622 "mbr_offset=0x00000000\0"                                               \
 623 "mmbr=uCP1020Quiet.mbr\0"                                               \
 624 "mmcpart=0:2\0"                                                         \
 625 "mmc__mbrd=fatload mmc $mmcpart $loadaddr $mbr; "                       \
 626         "mmc erase 1 1; "                                               \
 627         "mmc write $loadaddr 1 1\0"                                     \
 628 "mmc__uboot=fatload mmc $mmcpart $loadaddr $ubootfile; "                \
 629         "mmc erase 0x40 0x400; "                                        \
 630         "mmc write $loadaddr 0x40 0x400\0"                              \
 631 "netdev=eth0\0"                                                         \
 632 "nor_recoveryaddr=0xEC0A0000\0"                                         \
 633 "nor_ubootaddr=0xEFF80000\0"                                            \
 634 "nor_workingaddr=0xECFA0000\0"                                          \
 635 "norbootrecovery=setenv bootargs $recoverybootargs"                     \
 636         " console=$consoledev,$baudrate $othbootargs; "                 \
 637         "run norloadrecovery; "                                         \
 638         "bootm $kerneladdr - $dtbaddr\0"                                \
 639 "norbootworking=setenv bootargs $workingbootargs"                       \
 640         " console=$consoledev,$baudrate $othbootargs; "                 \
 641         "run norloadworking; "                                          \
 642         "bootm $kerneladdr - $dtbaddr\0"                                \
 643 "norloadrecovery=mw.l $kerneladdr 0x0 0x00a00000; "                     \
 644         "setenv cramfsaddr $nor_recoveryaddr; "                         \
 645         "cramfsload $dtbaddr $dtbfile; "                                \
 646         "cramfsload $kerneladdr $kernelfile\0"                          \
 647 "norloadworking=mw.l $kerneladdr 0x0 0x00a00000; "                      \
 648         "setenv cramfsaddr $nor_workingaddr; "                          \
 649         "cramfsload $dtbaddr $dtbfile; "                                \
 650         "cramfsload $kerneladdr $kernelfile\0"                          \
 651 "prog_spi_mbr=run spi__mbr\0"                                           \
 652 "prog_spi_mbrboot=run spi__mbr; run spi__boot1; run spi__boot2\0"       \
 653 "prog_spi_mbrbootcramfs=run spi__mbr; run spi__boot1; run spi__boot2; " \
 654         "run spi__cramfs\0"                                             \
 655 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
 656         " console=$consoledev,$baudrate $othbootargs; "                 \
 657         "tftp $rootfsaddr $rootfsfile; "                                \
 658         "tftp $loadaddr $kernelfile; "                                  \
 659         "tftp $dtbaddr $dtbfile; "                                      \
 660         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
 661 "ramdisk_size=120000\0"                                                 \
 662 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
 663 "recoveryaddr=0x02F00000\0"                                             \
 664 "recoverybootargs=root=/dev/mtdblock0 rootfstype=cramfs ro\0"           \
 665 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
 666         "mw.l 0xffe0f008 0x00400000\0"                                  \
 667 "rootfsaddr=0x02F00000\0"                                               \
 668 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
 669 "rootpath=/opt/nfsroot\0"                                               \
 670 "spi__boot1=fatload mmc $mmcpart $loadaddr u-boot.bin; "                \
 671         "protect off 0xeC000000 +$filesize; "                           \
 672         "erase 0xEC000000 +$filesize; "                                 \
 673         "cp.b $loadaddr 0xEC000000 $filesize; "                         \
 674         "cmp.b $loadaddr 0xEC000000 $filesize; "                        \
 675         "protect on 0xeC000000 +$filesize\0"                            \
 676 "spi__boot2=fatload mmc $mmcpart $loadaddr u-boot.bin; "                \
 677         "protect off 0xeFF80000 +$filesize; "                           \
 678         "erase 0xEFF80000 +$filesize; "                                 \
 679         "cp.b $loadaddr 0xEFF80000 $filesize; "                         \
 680         "cmp.b $loadaddr 0xEFF80000 $filesize; "                        \
 681         "protect on 0xeFF80000 +$filesize\0"                            \
 682 "spi__bootd=fatload mmc $mmcpart $loadaddr $ubootd; "                   \
 683         "sf probe 0; sf erase 0x8000 +$filesize; "                      \
 684         "sf write $loadaddr 0x8000 $filesize\0"                         \
 685 "spi__cramfs=fatload mmc $mmcpart $loadaddr image.cramfs; "             \
 686         "protect off 0xec0a0000 +$filesize; "                           \
 687         "erase 0xeC0A0000 +$filesize; "                                 \
 688         "cp.b $loadaddr 0xeC0A0000 $filesize; "                         \
 689         "protect on 0xec0a0000 +$filesize\0"                            \
 690 "spi__mbr=fatload mmc $mmcpart $loadaddr $mmbr; "                       \
 691         "sf probe 1; sf erase 0 +$filesize; "                           \
 692         "sf write $loadaddr 0 $filesize\0"                              \
 693 "spi__mbrd=fatload mmc $mmcpart $loadaddr $mbr; "                       \
 694         "sf probe 0; sf erase 0 +$filesize; "                           \
 695         "sf write $loadaddr 0 $filesize\0"                              \
 696 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
 697         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 698         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
 699         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
 700         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 701         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
 702 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
 703 "ubootaddr=0x01000000\0"                                                \
 704 "ubootfile=u-boot.bin\0"                                                \
 705 "ubootd=u-boot4dongle.bin\0"                                            \
 706 "upgrade=run flashworking\0"                                            \
 707 "usb_phy_type=ulpi\0 "                                                  \
 708 "workingaddr=0x02F00000\0"                                              \
 709 "workingbootargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"
 710
 711 #else
 712
 713 #if defined(CONFIG_UCP1020T1)
 714
 715 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 716 "bootcmd=run releasefpga; run norbootworking || run norbootrecovery\0"  \
 717 "bootfile=uImage\0"                                                     \
 718 "consoledev=ttyS0\0"                                                    \
 719 "cramfsfile=image.cramfs\0"                                             \
 720 "dtbaddr=0x00c00000\0"                                                  \
 721 "dtbfile=image.dtb\0"                                                   \
 722 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
 723 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
 724 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
 725 "fileaddr=0x01000000\0"                                                 \
 726 "filesize=0x00080000\0"                                                 \
 727 "flashmbr=sf probe 0; "                                                 \
 728         "tftp $loadaddr $mbr; "                                         \
 729         "sf erase $mbr_offset +$filesize; "                             \
 730         "sf write $loadaddr $mbr_offset $filesize\0"                    \
 731 "flashrecovery=tftp $recoveryaddr $cramfsfile; "                        \
 732         "protect off $nor_recoveryaddr +$filesize; "                    \
 733         "erase $nor_recoveryaddr +$filesize; "                          \
 734         "cp.b $recoveryaddr $nor_recoveryaddr $filesize; "              \
 735         "protect on $nor_recoveryaddr +$filesize\0 "                    \
 736 "flashuboot=tftp $ubootaddr $ubootfile; "                               \
 737         "protect off $nor_ubootaddr +$filesize; "                       \
 738         "erase $nor_ubootaddr +$filesize; "                             \
 739         "cp.b $ubootaddr $nor_ubootaddr $filesize; "                    \
 740         "protect on $nor_ubootaddr +$filesize\0 "                       \
 741 "flashworking=tftp $workingaddr $cramfsfile; "                          \
 742         "protect off $nor_workingaddr +$filesize; "                     \
 743         "erase $nor_workingaddr +$filesize; "                           \
 744         "cp.b $workingaddr $nor_workingaddr $filesize; "                \
 745         "protect on $nor_workingaddr +$filesize\0 "                     \
 746 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
 747 "kerneladdr=0x01100000\0"                                               \
 748 "kernelfile=uImage\0"                                                   \
 749 "loadaddr=0x01000000\0"                                                 \
 750 "mbr=uCP1020.mbr\0"                                                     \
 751 "mbr_offset=0x00000000\0"                                               \
 752 "netdev=eth0\0"                                                         \
 753 "nor_recoveryaddr=0xEC0A0000\0"                                         \
 754 "nor_ubootaddr=0xEFF80000\0"                                            \
 755 "nor_workingaddr=0xECFA0000\0"                                          \
 756 "norbootrecovery=setenv bootargs $recoverybootargs"                     \
 757         " console=$consoledev,$baudrate $othbootargs; "                 \
 758         "run norloadrecovery; "                                         \
 759         "bootm $kerneladdr - $dtbaddr\0"                                \
 760 "norbootworking=setenv bootargs $workingbootargs"                       \
 761         " console=$consoledev,$baudrate $othbootargs; "                 \
 762         "run norloadworking; "                                          \
 763         "bootm $kerneladdr - $dtbaddr\0"                                \
 764 "norloadrecovery=mw.l $kerneladdr 0x0 0x00a00000; "                     \
 765         "setenv cramfsaddr $nor_recoveryaddr; "                         \
 766         "cramfsload $dtbaddr $dtbfile; "                                \
 767         "cramfsload $kerneladdr $kernelfile\0"                          \
 768 "norloadworking=mw.l $kerneladdr 0x0 0x00a00000; "                      \
 769         "setenv cramfsaddr $nor_workingaddr; "                          \
 770         "cramfsload $dtbaddr $dtbfile; "                                \
 771         "cramfsload $kerneladdr $kernelfile\0"                          \
 772 "othbootargs=quiet\0"                                                   \
 773 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
 774         " console=$consoledev,$baudrate $othbootargs; "                 \
 775         "tftp $rootfsaddr $rootfsfile; "                                \
 776         "tftp $loadaddr $kernelfile; "                                  \
 777         "tftp $dtbaddr $dtbfile; "                                      \
 778         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
 779 "ramdisk_size=120000\0"                                                 \
 780 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
 781 "recoveryaddr=0x02F00000\0"                                             \
 782 "recoverybootargs=root=/dev/mtdblock0 rootfstype=cramfs ro\0"           \
 783 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
 784         "mw.l 0xffe0f008 0x00400000\0"                                  \
 785 "rootfsaddr=0x02F00000\0"                                               \
 786 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
 787 "rootpath=/opt/nfsroot\0"                                               \
 788 "silent=1\0"                                                            \
 789 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
 790         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 791         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
 792         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
 793         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 794         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
 795 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
 796 "ubootaddr=0x01000000\0"                                                \
 797 "ubootfile=u-boot.bin\0"                                                \
 798 "upgrade=run flashworking\0"                                            \
 799 "workingaddr=0x02F00000\0"                                              \
 800 "workingbootargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"
 801
 802 #else /* For Arcturus Modules */
 803
 804 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 805 "bootcmd=run norkernel\0"                                               \
 806 "bootfile=uImage\0"                                                     \
 807 "consoledev=ttyS0\0"                                                    \
 808 "dtbaddr=0x00c00000\0"                                                  \
 809 "dtbfile=image.dtb\0"                                                   \
 810 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
 811 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
 812 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
 813 "fileaddr=0x01000000\0"                                                 \
 814 "filesize=0x00080000\0"                                                 \
 815 "flashmbr=sf probe 0; "                                                 \
 816         "tftp $loadaddr $mbr; "                                         \
 817         "sf erase $mbr_offset +$filesize; "                             \
 818         "sf write $loadaddr $mbr_offset $filesize\0"                    \
 819 "flashuboot=tftp $loadaddr $ubootfile; "                                \
 820         "protect off $nor_ubootaddr0 +$filesize; "                      \
 821         "erase $nor_ubootaddr0 +$filesize; "                            \
 822         "cp.b $loadaddr $nor_ubootaddr0 $filesize; "                    \
 823         "protect on $nor_ubootaddr0 +$filesize; "                       \
 824         "protect off $nor_ubootaddr1 +$filesize; "                      \
 825         "erase $nor_ubootaddr1 +$filesize; "                            \
 826         "cp.b $loadaddr $nor_ubootaddr1 $filesize; "                    \
 827         "protect on $nor_ubootaddr1 +$filesize\0 "                      \
 828 "format0=protect off $part0base +$part0size; "                          \
 829         "erase $part0base +$part0size\0"                                \
 830 "format1=protect off $part1base +$part1size; "                          \
 831         "erase $part1base +$part1size\0"                                \
 832 "format2=protect off $part2base +$part2size; "                          \
 833         "erase $part2base +$part2size\0"                                \
 834 "format3=protect off $part3base +$part3size; "                          \
 835         "erase $part3base +$part3size\0"                                \
 836 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
 837 "kerneladdr=0x01100000\0"                                               \
 838 "kernelargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"                 \
 839 "kernelfile=uImage\0"                                                   \
 840 "loadaddr=0x01000000\0"                                                 \
 841 "mbr=uCP1020.mbr\0"                                                     \
 842 "mbr_offset=0x00000000\0"                                               \
 843 "netdev=eth0\0"                                                         \
 844 "nor_ubootaddr0=0xEC000000\0"                                           \
 845 "nor_ubootaddr1=0xEFF80000\0"                                           \
 846 "norkernel=setenv bootargs $kernelargs console=$consoledev,$baudrate; " \
 847         "run norkernelload; "                                           \
 848         "bootm $kerneladdr - $dtbaddr\0"                                \
 849 "norkernelload=mw.l $kerneladdr 0x0 0x00a00000; "                       \
 850         "setenv cramfsaddr $part0base; "                                \
 851         "cramfsload $dtbaddr $dtbfile; "                                \
 852         "cramfsload $kerneladdr $kernelfile\0"                          \
 853 "part0base=0xEC100000\0"                                                \
 854 "part0size=0x00700000\0"                                                \
 855 "part1base=0xEC800000\0"                                                \
 856 "part1size=0x02000000\0"                                                \
 857 "part2base=0xEE800000\0"                                                \
 858 "part2size=0x00800000\0"                                                \
 859 "part3base=0xEF000000\0"                                                \
 860 "part3size=0x00F80000\0"                                                \
 861 "partENVbase=0xEC080000\0"                                              \
 862 "partENVsize=0x00080000\0"                                              \
 863 "program0=tftp part0-000000.bin; "                                      \
 864         "protect off $part0base +$filesize; "                           \
 865         "erase $part0base +$filesize; "                                 \
 866         "cp.b $loadaddr $part0base $filesize; "                         \
 867         "echo Verifying...; "                                           \
 868         "cmp.b $loadaddr $part0base $filesize\0"                        \
 869 "program1=tftp part1-000000.bin; "                                      \
 870         "protect off $part1base +$filesize; "                           \
 871         "erase $part1base +$filesize; "                                 \
 872         "cp.b $loadaddr $part1base $filesize; "                         \
 873         "echo Verifying...; "                                           \
 874         "cmp.b $loadaddr $part1base $filesize\0"                        \
 875 "program2=tftp part2-000000.bin; "                                      \
 876         "protect off $part2base +$filesize; "                           \
 877         "erase $part2base +$filesize; "                                 \
 878         "cp.b $loadaddr $part2base $filesize; "                         \
 879         "echo Verifying...; "                                           \
 880         "cmp.b $loadaddr $part2base $filesize\0"                        \
 881 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
 882         "  console=$consoledev,$baudrate $othbootargs; "                \
 883         "tftp $rootfsaddr $rootfsfile; "                                \
 884         "tftp $loadaddr $kernelfile; "                                  \
 885         "tftp $dtbaddr $dtbfile; "                                      \
 886         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
 887 "ramdisk_size=120000\0"                                                 \
 888 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
 889 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
 890         "mw.l 0xffe0f008 0x00400000\0"                                  \
 891 "rootfsaddr=0x02F00000\0"                                               \
 892 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
 893 "rootpath=/opt/nfsroot\0"                                               \
 894 "spi__mbr=fatload mmc $mmcpart $loadaddr $mmbr; "                       \
 895         "sf probe 0; sf erase 0 +$filesize; "                           \
 896         "sf write $loadaddr 0 $filesize\0"                              \
 897 "spi__boot=fatload mmc $mmcpart $loadaddr u-boot.bin; "                 \
 898         "protect off 0xeC000000 +$filesize; "                           \
 899         "erase 0xEC000000 +$filesize; "                                 \
 900         "cp.b $loadaddr 0xEC000000 $filesize; "                         \
 901         "cmp.b $loadaddr 0xEC000000 $filesize; "                        \
 902         "protect on 0xeC000000 +$filesize\0"                            \
 903 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
 904         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 905         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
 906         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
 907         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 908         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
 909 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
 910 "ubootfile=u-boot.bin\0"                                                \
 911 "upgrade=run flashuboot\0"                                              \
 912 "usb_phy_type=ulpi\0 "                                                  \
 913 "boot_nfs= "                                                            \
 914         "setenv bootargs root=/dev/nfs rw "                             \
 915         "nfsroot=$serverip:$rootpath "                                  \
 916         "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
 917         "console=$consoledev,$baudrate $othbootargs;"                   \
 918         "tftp $loadaddr $bootfile;"                                     \
 919         "tftp $fdtaddr $fdtfile;"                                       \
 920         "bootm $loadaddr - $fdtaddr\0"                                  \
 921 "boot_hd = "                                                            \
 922         "setenv bootargs root=/dev/$bdev rw rootdelay=30 "              \
 923         "console=$consoledev,$baudrate $othbootargs;"                   \
 924         "usb start;"                                                    \
 925         "ext2load usb 0:1 $loadaddr /boot/$bootfile;"                   \
 926         "ext2load usb 0:1 $fdtaddr /boot/$fdtfile;"                     \
 927         "bootm $loadaddr - $fdtaddr\0"                                  \
 928 "boot_usb_fat = "                                                       \
 929         "setenv bootargs root=/dev/ram rw "                             \
 930         "console=$consoledev,$baudrate $othbootargs "                   \
 931         "ramdisk_size=$ramdisk_size;"                                   \
 932         "usb start;"                                                    \
 933         "fatload usb 0:2 $loadaddr $bootfile;"                          \
 934         "fatload usb 0:2 $fdtaddr $fdtfile;"                            \
 935         "fatload usb 0:2 $ramdiskaddr $ramdiskfile;"                    \
 936         "bootm $loadaddr $ramdiskaddr $fdtaddr\0 "                      \
 937 "boot_usb_ext2 = "                                                      \
 938         "setenv bootargs root=/dev/ram rw "                             \
 939         "console=$consoledev,$baudrate $othbootargs "                   \
 940         "ramdisk_size=$ramdisk_size;"                                   \
 941         "usb start;"                                                    \
 942         "ext2load usb 0:4 $loadaddr $bootfile;"                         \
 943         "ext2load usb 0:4 $fdtaddr $fdtfile;"                           \
 944         "ext2load usb 0:4 $ramdiskaddr $ramdiskfile;"                   \
 945         "bootm $loadaddr $ramdiskaddr $fdtaddr\0 "                      \
 946 "boot_nor = "                                                           \
 947         "setenv bootargs root=/dev/$jffs2nor rw "                       \
 948         "console=$consoledev,$baudrate rootfstype=jffs2 $othbootargs;"  \
 949         "bootm $norbootaddr - $norfdtaddr\0 "                           \
 950 "boot_ram = "                                                           \
 951         "setenv bootargs root=/dev/ram rw "                             \
 952         "console=$consoledev,$baudrate $othbootargs "                   \
 953         "ramdisk_size=$ramdisk_size;"                                   \
 954         "tftp $ramdiskaddr $ramdiskfile;"                               \
 955         "tftp $loadaddr $bootfile;"                                     \
 956         "tftp $fdtaddr $fdtfile;"                                       \
 957         "bootm $loadaddr $ramdiskaddr $fdtaddr\0"
 958
 959 #endif
 960 #endif
 961
 962 #endif /* __CONFIG_H */