include/configs/UCP1020.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright 2013-2015 Arcturus Networks, Inc.
   4  *           http://www.arcturusnetworks.com/products/ucp1020/
   5  * based on include/configs/p1_p2_rdb_pc.h
   6  * original copyright follows:
   7  * Copyright 2009-2011 Freescale Semiconductor, Inc.
   8  */
   9
  10 /*
  11  * QorIQ uCP1020-xx boards configuration file
  12  */
  13 #ifndef __CONFIG_H
  14 #define __CONFIG_H
  15
  16 #define CONFIG_PCIE1    /* PCIE controller 1 (slot 1) */
  17 #define CONFIG_PCIE2    /* PCIE controller 2 (slot 2) */
  18 #define CONFIG_FSL_PCI_INIT     /* Use common FSL init code */
  19 #define CONFIG_PCI_INDIRECT_BRIDGE      /* indirect PCI bridge support */
  20 #define CONFIG_FSL_PCIE_RESET   /* need PCIe reset errata */
  21 #define CONFIG_SYS_PCI_64BIT    /* enable 64-bit PCI resources */
  22
  23 #if defined(CONFIG_TARTGET_UCP1020T1)
  24
  25 #define CONFIG_UCP1020_REV_1_3
  26
  27 #define CONFIG_BOARDNAME "uCP1020-64EE512-0U1-XR-T1"
  28
  29 #define CONFIG_TSEC1
  30 #define CONFIG_TSEC3
  31 #define CONFIG_HAS_ETH0
  32 #define CONFIG_HAS_ETH1
  33 #define CONFIG_ETHADDR          00:19:D3:FF:FF:FF
  34 #define CONFIG_ETH1ADDR         00:19:D3:FF:FF:FE
  35 #define CONFIG_ETH2ADDR         00:19:D3:FF:FF:FD
  36 #define CONFIG_IPADDR           10.80.41.229
  37 #define CONFIG_SERVERIP         10.80.41.227
  38 #define CONFIG_NETMASK          255.255.252.0
  39 #define CONFIG_ETHPRIME         "eTSEC3"
  40
  41 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
  42
  43 #define CONFIG_SYS_L2_SIZE      (256 << 10)
  44
  45 #endif
  46
  47 #if defined(CONFIG_TARGET_UCP1020)
  48
  49 #define CONFIG_UCP1020
  50 #define CONFIG_UCP1020_REV_1_3
  51
  52 #define CONFIG_BOARDNAME_LOCAL "uCP1020-64EEE512-OU1-XR"
  53
  54 #define CONFIG_TSEC1
  55 #define CONFIG_TSEC2
  56 #define CONFIG_TSEC3
  57 #define CONFIG_HAS_ETH0
  58 #define CONFIG_HAS_ETH1
  59 #define CONFIG_HAS_ETH2
  60 #define CONFIG_ETHADDR          00:06:3B:FF:FF:FF
  61 #define CONFIG_ETH1ADDR         00:06:3B:FF:FF:FE
  62 #define CONFIG_ETH2ADDR         00:06:3B:FF:FF:FD
  63 #define CONFIG_IPADDR           192.168.1.81
  64 #define CONFIG_IPADDR1          192.168.1.82
  65 #define CONFIG_IPADDR2          192.168.1.83
  66 #define CONFIG_SERVERIP         192.168.1.80
  67 #define CONFIG_GATEWAYIP        102.168.1.1
  68 #define CONFIG_NETMASK          255.255.255.0
  69 #define CONFIG_ETHPRIME         "eTSEC1"
  70
  71 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
  72
  73 #define CONFIG_SYS_L2_SIZE      (256 << 10)
  74
  75 #endif
  76
  77 #ifdef CONFIG_SDCARD
  78 #define CONFIG_RAMBOOT_SDCARD
  79 #define CONFIG_SYS_RAMBOOT
  80 #define CONFIG_RESET_VECTOR_ADDRESS     0x1107fffc
  81 #endif
  82
  83 #ifdef CONFIG_SPIFLASH
  84 #define CONFIG_RAMBOOT_SPIFLASH
  85 #define CONFIG_SYS_RAMBOOT
  86 #define CONFIG_RESET_VECTOR_ADDRESS     0x1107fffc
  87 #endif
  88
  89 #define CONFIG_SYS_TEXT_BASE_NOR        0xeff80000
  90
  91 #ifndef CONFIG_RESET_VECTOR_ADDRESS
  92 #define CONFIG_RESET_VECTOR_ADDRESS     0xeffffffc
  93 #endif
  94
  95 #ifndef CONFIG_SYS_MONITOR_BASE
  96 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE    /* start of monitor */
  97 #endif
  98
  99 #define CONFIG_ENV_OVERWRITE
 100
 101 #define CONFIG_SYS_SATA_MAX_DEVICE      2
 102 #define CONFIG_LBA48
 103
 104 #define CONFIG_SYS_CLK_FREQ     66666666
 105 #define CONFIG_DDR_CLK_FREQ     66666666
 106
 107 #define CONFIG_HWCONFIG
 108
 109 /*
 110  * These can be toggled for performance analysis, otherwise use default.
 111  */
 112 #define CONFIG_L2_CACHE
 113 #define CONFIG_BTB
 114
 115 #define CONFIG_ENABLE_36BIT_PHYS
 116
 117 #define CONFIG_SYS_MEMTEST_START        0x00200000      /* memtest works on */
 118 #define CONFIG_SYS_MEMTEST_END          0x1fffffff
 119
 120 #define CONFIG_SYS_CCSRBAR              0xffe00000
 121 #define CONFIG_SYS_CCSRBAR_PHYS_LOW     CONFIG_SYS_CCSRBAR
 122
 123 /* IN case of NAND bootloader relocate CCSRBAR in RAMboot code not in the 4k
 124        SPL code*/
 125 #ifdef CONFIG_SPL_BUILD
 126 #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
 127 #endif
 128
 129 /* DDR Setup */
 130 #define CONFIG_DDR_ECC_ENABLE
 131 #ifndef CONFIG_DDR_ECC_ENABLE
 132 #define CONFIG_SYS_DDR_RAW_TIMING
 133 #define CONFIG_DDR_SPD
 134 #endif
 135 #define CONFIG_SYS_SPD_BUS_NUM 1
 136 #undef CONFIG_FSL_DDR_INTERACTIVE
 137
 138 #define CONFIG_SYS_SDRAM_SIZE_LAW       LAW_SIZE_512M
 139 #define CONFIG_CHIP_SELECTS_PER_CTRL    1
 140 #define CONFIG_SYS_SDRAM_SIZE           (1u << (CONFIG_SYS_SDRAM_SIZE_LAW - 19))
 141 #define CONFIG_SYS_DDR_SDRAM_BASE       0x00000000
 142 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
 143
 144 #define CONFIG_DIMM_SLOTS_PER_CTLR      1
 145
 146 /* Default settings for DDR3 */
 147 #define CONFIG_SYS_DDR_CS0_BNDS         0x0000003f
 148 #define CONFIG_SYS_DDR_CS0_CONFIG       0x80014302
 149 #define CONFIG_SYS_DDR_CS0_CONFIG_2     0x00000000
 150 #define CONFIG_SYS_DDR_CS1_BNDS         0x0040007f
 151 #define CONFIG_SYS_DDR_CS1_CONFIG       0x80014302
 152 #define CONFIG_SYS_DDR_CS1_CONFIG_2     0x00000000
 153
 154 #define CONFIG_SYS_DDR_DATA_INIT        0xdeadbeef
 155 #define CONFIG_SYS_DDR_INIT_ADDR        0x00000000
 156 #define CONFIG_SYS_DDR_INIT_EXT_ADDR    0x00000000
 157 #define CONFIG_SYS_DDR_MODE_CONTROL     0x00000000
 158
 159 #define CONFIG_SYS_DDR_ZQ_CONTROL       0x89080600
 160 #define CONFIG_SYS_DDR_WRLVL_CONTROL    0x8655A608
 161 #define CONFIG_SYS_DDR_SR_CNTR          0x00000000
 162 #define CONFIG_SYS_DDR_RCW_1            0x00000000
 163 #define CONFIG_SYS_DDR_RCW_2            0x00000000
 164 #ifdef CONFIG_DDR_ECC_ENABLE
 165 #define CONFIG_SYS_DDR_CONTROL          0xE70C0000      /* Type = DDR3 & ECC */
 166 #else
 167 #define CONFIG_SYS_DDR_CONTROL          0xC70C0000      /* Type = DDR3 */
 168 #endif
 169 #define CONFIG_SYS_DDR_CONTROL_2        0x04401050
 170 #define CONFIG_SYS_DDR_TIMING_4         0x00220001
 171 #define CONFIG_SYS_DDR_TIMING_5         0x03402400
 172
 173 #define CONFIG_SYS_DDR_TIMING_3         0x00020000
 174 #define CONFIG_SYS_DDR_TIMING_0         0x00330004
 175 #define CONFIG_SYS_DDR_TIMING_1         0x6f6B4846
 176 #define CONFIG_SYS_DDR_TIMING_2         0x0FA8C8CF
 177 #define CONFIG_SYS_DDR_CLK_CTRL         0x03000000
 178 #define CONFIG_SYS_DDR_MODE_1           0x40461520
 179 #define CONFIG_SYS_DDR_MODE_2           0x8000c000
 180 #define CONFIG_SYS_DDR_INTERVAL         0x0C300000
 181
 182 #undef CONFIG_CLOCKS_IN_MHZ
 183
 184 /*
 185  * Memory map
 186  *
 187  * 0x0000_0000 0x7fff_ffff      DDR             Up to 2GB cacheable
 188  * 0x8000_0000 0xdfff_ffff      PCI Express Mem 1G non-cacheable(PCIe * 2)
 189  * 0xec00_0000 0xefff_ffff      NOR flash       Up to 64M non-cacheable CS0/1
 190  * 0xf8f8_0000 0xf8ff_ffff      L2 SRAM         Up to 256K cacheable
 191  *   (early boot only)
 192  * 0xffc0_0000 0xffc3_ffff      PCI IO range    256k non-cacheable
 193  * 0xffd0_0000 0xffd0_3fff      L1 for stack    16K cacheable
 194  * 0xffe0_0000 0xffef_ffff      CCSR            1M non-cacheable
 195  */
 196
 197 /*
 198  * Local Bus Definitions
 199  */
 200 #define CONFIG_SYS_MAX_FLASH_SECT       512     /* 64M */
 201 #define CONFIG_SYS_FLASH_BASE           0xec000000
 202
 203 #define CONFIG_SYS_FLASH_BASE_PHYS      CONFIG_SYS_FLASH_BASE
 204
 205 #define CONFIG_FLASH_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) \
 206         | BR_PS_16 | BR_V)
 207
 208 #define CONFIG_FLASH_OR_PRELIM          0xfc000ff7
 209
 210 #define CONFIG_SYS_FLASH_BANKS_LIST     {CONFIG_SYS_FLASH_BASE_PHYS}
 211 #define CONFIG_SYS_FLASH_QUIET_TEST
 212 #define CONFIG_FLASH_SHOW_PROGRESS      45      /* count down from 45/5: 9..1 */
 213
 214 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* number of banks */
 215
 216 #undef CONFIG_SYS_FLASH_CHECKSUM
 217 #define CONFIG_SYS_FLASH_ERASE_TOUT     60000   /* Flash Erase Timeout (ms) */
 218 #define CONFIG_SYS_FLASH_WRITE_TOUT     500     /* Flash Write Timeout (ms) */
 219
 220 #define CONFIG_FLASH_CFI_DRIVER
 221 #define CONFIG_SYS_FLASH_CFI
 222 #define CONFIG_SYS_FLASH_EMPTY_INFO
 223 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
 224
 225 #define CONFIG_SYS_INIT_RAM_LOCK
 226 #define CONFIG_SYS_INIT_RAM_ADDR        0xffd00000 /* stack in RAM */
 227 /* Initial L1 address */
 228 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS   CONFIG_SYS_INIT_RAM_ADDR
 229 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0
 230 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR_PHYS
 231 /* Size of used area in RAM */
 232 #define CONFIG_SYS_INIT_RAM_SIZE        0x00004000
 233
 234 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - \
 235                                         GENERATED_GBL_DATA_SIZE)
 236 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 237
 238 #define CONFIG_SYS_MONITOR_LEN  (256 * 1024)/* Reserve 256 kB for Mon */
 239 #define CONFIG_SYS_MALLOC_LEN   (1024 * 1024)/* Reserved for malloc */
 240
 241 #define CONFIG_SYS_PMC_BASE     0xff980000
 242 #define CONFIG_SYS_PMC_BASE_PHYS        CONFIG_SYS_PMC_BASE
 243 #define CONFIG_PMC_BR_PRELIM    (BR_PHYS_ADDR(CONFIG_SYS_PMC_BASE_PHYS) | \
 244                                         BR_PS_8 | BR_V)
 245 #define CONFIG_PMC_OR_PRELIM    (OR_AM_64KB | OR_GPCM_CSNT | OR_GPCM_XACS | \
 246                                  OR_GPCM_SCY | OR_GPCM_TRLX | OR_GPCM_EHTR | \
 247                                  OR_GPCM_EAD)
 248
 249 #define CONFIG_SYS_BR0_PRELIM   CONFIG_FLASH_BR_PRELIM  /* NOR Base Address */
 250 #define CONFIG_SYS_OR0_PRELIM   CONFIG_FLASH_OR_PRELIM  /* NOR Options */
 251 #ifdef CONFIG_NAND_FSL_ELBC
 252 #define CONFIG_SYS_BR1_PRELIM   CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Addr */
 253 #define CONFIG_SYS_OR1_PRELIM   CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
 254 #endif
 255
 256 /* Serial Port - controlled on board with jumper J8
 257  * open - index 2
 258  * shorted - index 1
 259  */
 260 #undef CONFIG_SERIAL_SOFTWARE_FIFO
 261 #define CONFIG_SYS_NS16550_SERIAL
 262 #define CONFIG_SYS_NS16550_REG_SIZE     1
 263 #define CONFIG_SYS_NS16550_CLK          get_bus_freq(0)
 264 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_INIT_MINIMAL)
 265 #define CONFIG_NS16550_MIN_FUNCTIONS
 266 #endif
 267
 268 #define CONFIG_SYS_BAUDRATE_TABLE       \
 269         {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
 270
 271 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR + 0x4500)
 272 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR + 0x4600)
 273
 274 /* I2C */
 275 #define CONFIG_SYS_I2C
 276 #define CONFIG_SYS_I2C_FSL
 277 #define CONFIG_SYS_FSL_I2C_SPEED        400000
 278 #define CONFIG_SYS_FSL_I2C_SLAVE        0x7F
 279 #define CONFIG_SYS_FSL_I2C_OFFSET       0x3000
 280 #define CONFIG_SYS_FSL_I2C2_SPEED       400000
 281 #define CONFIG_SYS_FSL_I2C2_SLAVE       0x7F
 282 #define CONFIG_SYS_FSL_I2C2_OFFSET      0x3100
 283 #define CONFIG_SYS_I2C_NOPROBES         { {0, 0x29} }
 284 #define CONFIG_SYS_SPD_BUS_NUM          1 /* For rom_loc and flash bank */
 285
 286 #define CONFIG_RTC_DS1337
 287 #define CONFIG_RTC_DS1337_NOOSC
 288 #define CONFIG_SYS_I2C_RTC_ADDR         0x68
 289 #define CONFIG_SYS_I2C_PCA9557_ADDR     0x18
 290 #define CONFIG_SYS_I2C_NCT72_ADDR       0x4C
 291 #define CONFIG_SYS_I2C_IDT6V49205B      0x69
 292
 293 /*
 294  * eSPI - Enhanced SPI
 295  */
 296 #define CONFIG_HARD_SPI
 297
 298 #define CONFIG_SF_DEFAULT_SPEED         10000000
 299 #define CONFIG_SF_DEFAULT_MODE          SPI_MODE_0
 300
 301 #if defined(CONFIG_PCI)
 302 /*
 303  * General PCI
 304  * Memory space is mapped 1-1, but I/O space must start from 0.
 305  */
 306
 307 /* controller 2, direct to uli, tgtid 2, Base address 9000 */
 308 #define CONFIG_SYS_PCIE2_NAME           "PCIe SLOT CON9"
 309 #define CONFIG_SYS_PCIE2_MEM_VIRT       0xa0000000
 310 #define CONFIG_SYS_PCIE2_MEM_BUS        0xa0000000
 311 #define CONFIG_SYS_PCIE2_MEM_PHYS       0xa0000000
 312 #define CONFIG_SYS_PCIE2_MEM_SIZE       0x20000000      /* 512M */
 313 #define CONFIG_SYS_PCIE2_IO_VIRT        0xffc10000
 314 #define CONFIG_SYS_PCIE2_IO_BUS         0x00000000
 315 #define CONFIG_SYS_PCIE2_IO_PHYS        0xffc10000
 316 #define CONFIG_SYS_PCIE2_IO_SIZE        0x00010000      /* 64k */
 317
 318 /* controller 1, Slot 2, tgtid 1, Base address a000 */
 319 #define CONFIG_SYS_PCIE1_NAME           "PCIe SLOT CON10"
 320 #define CONFIG_SYS_PCIE1_MEM_VIRT       0x80000000
 321 #define CONFIG_SYS_PCIE1_MEM_BUS        0x80000000
 322 #define CONFIG_SYS_PCIE1_MEM_PHYS       0x80000000
 323 #define CONFIG_SYS_PCIE1_MEM_SIZE       0x20000000      /* 512M */
 324 #define CONFIG_SYS_PCIE1_IO_VIRT        0xffc00000
 325 #define CONFIG_SYS_PCIE1_IO_BUS         0x00000000
 326 #define CONFIG_SYS_PCIE1_IO_PHYS        0xffc00000
 327 #define CONFIG_SYS_PCIE1_IO_SIZE        0x00010000      /* 64k */
 328
 329 #define CONFIG_PCI_SCAN_SHOW    /* show pci devices on startup */
 330 #endif /* CONFIG_PCI */
 331
 332 /*
 333  * Environment
 334  */
 335 #ifdef CONFIG_ENV_FIT_UCBOOT
 336
 337 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + 0x20000)
 338 #define CONFIG_ENV_SIZE         0x20000
 339 #define CONFIG_ENV_SECT_SIZE    0x20000 /* 128K (one sector) */
 340
 341 #else
 342
 343 #define CONFIG_ENV_SPI_BUS      0
 344 #define CONFIG_ENV_SPI_CS       0
 345 #define CONFIG_ENV_SPI_MAX_HZ   10000000
 346 #define CONFIG_ENV_SPI_MODE     0
 347
 348 #ifdef CONFIG_RAMBOOT_SPIFLASH
 349
 350 #define CONFIG_ENV_SIZE         0x3000          /* 12KB */
 351 #define CONFIG_ENV_OFFSET       0x2000          /* 8KB */
 352 #define CONFIG_ENV_SECT_SIZE    0x1000
 353
 354 #if defined(CONFIG_SYS_REDUNDAND_ENVIRONMENT)
 355 /* Address and size of Redundant Environment Sector     */
 356 #define CONFIG_ENV_OFFSET_REDUND        (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
 357 #define CONFIG_ENV_SIZE_REDUND          CONFIG_ENV_SIZE
 358 #endif
 359
 360 #elif defined(CONFIG_RAMBOOT_SDCARD)
 361 #define CONFIG_FSL_FIXED_MMC_LOCATION
 362 #define CONFIG_ENV_SIZE         0x2000
 363 #define CONFIG_SYS_MMC_ENV_DEV  0
 364
 365 #elif defined(CONFIG_SYS_RAMBOOT)
 366 #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE - 0x1000)
 367 #define CONFIG_ENV_SIZE         0x2000
 368
 369 #else
 370 #define CONFIG_ENV_BASE         (CONFIG_SYS_FLASH_BASE)
 371 #define CONFIG_ENV_SECT_SIZE    0x20000 /* 128K (one sector) */
 372 #define CONFIG_ENV_SIZE         CONFIG_ENV_SECT_SIZE
 373 #define CONFIG_ENV_ADDR         (CONFIG_ENV_BASE + 0xC0000)
 374 #if defined(CONFIG_SYS_REDUNDAND_ENVIRONMENT)
 375 /* Address and size of Redundant Environment Sector     */
 376 #define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR + CONFIG_ENV_SIZE)
 377 #define CONFIG_ENV_SIZE_REDUND  CONFIG_ENV_SIZE
 378 #endif
 379
 380 #endif
 381
 382 #endif  /* CONFIG_ENV_FIT_UCBOOT */
 383
 384 #define CONFIG_LOADS_ECHO               /* echo on for serial download */
 385 #define CONFIG_SYS_LOADS_BAUD_CHANGE    /* allow baudrate change */
 386
 387 /*
 388  * USB
 389  */
 390 #define CONFIG_HAS_FSL_DR_USB
 391
 392 #if defined(CONFIG_HAS_FSL_DR_USB)
 393 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
 394
 395 #ifdef CONFIG_USB_EHCI_HCD
 396 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 397 #define CONFIG_USB_EHCI_FSL
 398 #endif
 399 #endif
 400
 401 #undef CONFIG_WATCHDOG                  /* watchdog disabled */
 402
 403 #ifdef CONFIG_MMC
 404 #define CONFIG_SYS_FSL_ESDHC_ADDR       CONFIG_SYS_MPC85xx_ESDHC_ADDR
 405 #define CONFIG_MMC_SPI
 406 #endif
 407
 408 /* Misc Extra Settings */
 409 #undef CONFIG_WATCHDOG  /* watchdog disabled */
 410
 411 /*
 412  * Miscellaneous configurable options
 413  */
 414 #define CONFIG_SYS_LOAD_ADDR    0x2000000       /* default load address */
 415 #define CONFIG_SYS_HZ           1000    /* decrementer freq: 1ms tick */
 416
 417 /*
 418  * For booting Linux, the board info and command line data
 419  * have to be in the first 64 MB of memory, since this is
 420  * the maximum mapped by the Linux kernel during initialization.
 421  */
 422 #define CONFIG_SYS_BOOTMAPSZ    (64 << 20)      /* Initial Memory for Linux*/
 423 #define CONFIG_SYS_BOOTM_LEN    (64 << 20)      /* Increase max gunzip size */
 424
 425 #if defined(CONFIG_CMD_KGDB)
 426 #define CONFIG_KGDB_BAUDRATE    230400  /* speed to run kgdb serial port */
 427 #define CONFIG_KGDB_SER_INDEX   2       /* which serial port to use */
 428 #endif
 429
 430 /*
 431  * Environment Configuration
 432  */
 433
 434 #if defined(CONFIG_TSEC_ENET)
 435
 436 #if defined(CONFIG_UCP1020_REV_1_2) || defined(CONFIG_UCP1020_REV_1_3)
 437 #else
 438 #error "UCP1020 module revision is not defined !!!"
 439 #endif
 440
 441 #define CONFIG_BOOTP_SERVERIP
 442
 443 #define CONFIG_TSEC1_NAME       "eTSEC1"
 444 #define CONFIG_TSEC2_NAME       "eTSEC2"
 445 #define CONFIG_TSEC3_NAME       "eTSEC3"
 446
 447 #define TSEC1_PHY_ADDR  4
 448 #define TSEC2_PHY_ADDR  0
 449 #define TSEC2_PHY_ADDR_SGMII    0x00
 450 #define TSEC3_PHY_ADDR  6
 451
 452 #define TSEC1_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
 453 #define TSEC2_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
 454 #define TSEC3_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
 455
 456 #define TSEC1_PHYIDX    0
 457 #define TSEC2_PHYIDX    0
 458 #define TSEC3_PHYIDX    0
 459
 460 #endif
 461
 462 #define CONFIG_HOSTNAME         "UCP1020"
 463 #define CONFIG_ROOTPATH         "/opt/nfsroot"
 464 #define CONFIG_BOOTFILE         "uImage"
 465 #define CONFIG_UBOOTPATH        u-boot.bin /* U-Boot image on TFTP server */
 466
 467 /* default location for tftp and bootm */
 468 #define CONFIG_LOADADDR         1000000
 469
 470 #if defined(CONFIG_DONGLE)
 471
 472 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 473 "bootcmd=run prog_spi_mbrbootcramfs\0"                                  \
 474 "bootfile=uImage\0"                                                     \
 475 "consoledev=ttyS0\0"                                                    \
 476 "cramfsfile=image.cramfs\0"                                             \
 477 "dtbaddr=0x00c00000\0"                                                  \
 478 "dtbfile=image.dtb\0"                                                   \
 479 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
 480 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
 481 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
 482 "fileaddr=0x01000000\0"                                                 \
 483 "filesize=0x00080000\0"                                                 \
 484 "flashmbr=sf probe 0; "                                                 \
 485         "tftp $loadaddr $mbr; "                                         \
 486         "sf erase $mbr_offset +$filesize; "                             \
 487         "sf write $loadaddr $mbr_offset $filesize\0"                    \
 488 "flashrecovery=tftp $recoveryaddr $cramfsfile; "                        \
 489         "protect off $nor_recoveryaddr +$filesize; "                    \
 490         "erase $nor_recoveryaddr +$filesize; "                          \
 491         "cp.b $recoveryaddr $nor_recoveryaddr $filesize; "              \
 492         "protect on $nor_recoveryaddr +$filesize\0 "                    \
 493 "flashuboot=tftp $ubootaddr $ubootfile; "                               \
 494         "protect off $nor_ubootaddr +$filesize; "                       \
 495         "erase $nor_ubootaddr +$filesize; "                             \
 496         "cp.b $ubootaddr $nor_ubootaddr $filesize; "                    \
 497         "protect on $nor_ubootaddr +$filesize\0 "                       \
 498 "flashworking=tftp $workingaddr $cramfsfile; "                          \
 499         "protect off $nor_workingaddr +$filesize; "                     \
 500         "erase $nor_workingaddr +$filesize; "                           \
 501         "cp.b $workingaddr $nor_workingaddr $filesize; "                \
 502         "protect on $nor_workingaddr +$filesize\0 "                     \
 503 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
 504 "kerneladdr=0x01100000\0"                                               \
 505 "kernelfile=uImage\0"                                                   \
 506 "loadaddr=0x01000000\0"                                                 \
 507 "mbr=uCP1020d.mbr\0"                                                    \
 508 "mbr_offset=0x00000000\0"                                               \
 509 "mmbr=uCP1020Quiet.mbr\0"                                               \
 510 "mmcpart=0:2\0"                                                         \
 511 "mmc__mbrd=fatload mmc $mmcpart $loadaddr $mbr; "                       \
 512         "mmc erase 1 1; "                                               \
 513         "mmc write $loadaddr 1 1\0"                                     \
 514 "mmc__uboot=fatload mmc $mmcpart $loadaddr $ubootfile; "                \
 515         "mmc erase 0x40 0x400; "                                        \
 516         "mmc write $loadaddr 0x40 0x400\0"                              \
 517 "netdev=eth0\0"                                                         \
 518 "nor_recoveryaddr=0xEC0A0000\0"                                         \
 519 "nor_ubootaddr=0xEFF80000\0"                                            \
 520 "nor_workingaddr=0xECFA0000\0"                                          \
 521 "norbootrecovery=setenv bootargs $recoverybootargs"                     \
 522         " console=$consoledev,$baudrate $othbootargs; "                 \
 523         "run norloadrecovery; "                                         \
 524         "bootm $kerneladdr - $dtbaddr\0"                                \
 525 "norbootworking=setenv bootargs $workingbootargs"                       \
 526         " console=$consoledev,$baudrate $othbootargs; "                 \
 527         "run norloadworking; "                                          \
 528         "bootm $kerneladdr - $dtbaddr\0"                                \
 529 "norloadrecovery=mw.l $kerneladdr 0x0 0x00a00000; "                     \
 530         "setenv cramfsaddr $nor_recoveryaddr; "                         \
 531         "cramfsload $dtbaddr $dtbfile; "                                \
 532         "cramfsload $kerneladdr $kernelfile\0"                          \
 533 "norloadworking=mw.l $kerneladdr 0x0 0x00a00000; "                      \
 534         "setenv cramfsaddr $nor_workingaddr; "                          \
 535         "cramfsload $dtbaddr $dtbfile; "                                \
 536         "cramfsload $kerneladdr $kernelfile\0"                          \
 537 "prog_spi_mbr=run spi__mbr\0"                                           \
 538 "prog_spi_mbrboot=run spi__mbr; run spi__boot1; run spi__boot2\0"       \
 539 "prog_spi_mbrbootcramfs=run spi__mbr; run spi__boot1; run spi__boot2; " \
 540         "run spi__cramfs\0"                                             \
 541 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
 542         " console=$consoledev,$baudrate $othbootargs; "                 \
 543         "tftp $rootfsaddr $rootfsfile; "                                \
 544         "tftp $loadaddr $kernelfile; "                                  \
 545         "tftp $dtbaddr $dtbfile; "                                      \
 546         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
 547 "ramdisk_size=120000\0"                                                 \
 548 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
 549 "recoveryaddr=0x02F00000\0"                                             \
 550 "recoverybootargs=root=/dev/mtdblock0 rootfstype=cramfs ro\0"           \
 551 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
 552         "mw.l 0xffe0f008 0x00400000\0"                                  \
 553 "rootfsaddr=0x02F00000\0"                                               \
 554 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
 555 "rootpath=/opt/nfsroot\0"                                               \
 556 "spi__boot1=fatload mmc $mmcpart $loadaddr u-boot.bin; "                \
 557         "protect off 0xeC000000 +$filesize; "                           \
 558         "erase 0xEC000000 +$filesize; "                                 \
 559         "cp.b $loadaddr 0xEC000000 $filesize; "                         \
 560         "cmp.b $loadaddr 0xEC000000 $filesize; "                        \
 561         "protect on 0xeC000000 +$filesize\0"                            \
 562 "spi__boot2=fatload mmc $mmcpart $loadaddr u-boot.bin; "                \
 563         "protect off 0xeFF80000 +$filesize; "                           \
 564         "erase 0xEFF80000 +$filesize; "                                 \
 565         "cp.b $loadaddr 0xEFF80000 $filesize; "                         \
 566         "cmp.b $loadaddr 0xEFF80000 $filesize; "                        \
 567         "protect on 0xeFF80000 +$filesize\0"                            \
 568 "spi__bootd=fatload mmc $mmcpart $loadaddr $ubootd; "                   \
 569         "sf probe 0; sf erase 0x8000 +$filesize; "                      \
 570         "sf write $loadaddr 0x8000 $filesize\0"                         \
 571 "spi__cramfs=fatload mmc $mmcpart $loadaddr image.cramfs; "             \
 572         "protect off 0xec0a0000 +$filesize; "                           \
 573         "erase 0xeC0A0000 +$filesize; "                                 \
 574         "cp.b $loadaddr 0xeC0A0000 $filesize; "                         \
 575         "protect on 0xec0a0000 +$filesize\0"                            \
 576 "spi__mbr=fatload mmc $mmcpart $loadaddr $mmbr; "                       \
 577         "sf probe 1; sf erase 0 +$filesize; "                           \
 578         "sf write $loadaddr 0 $filesize\0"                              \
 579 "spi__mbrd=fatload mmc $mmcpart $loadaddr $mbr; "                       \
 580         "sf probe 0; sf erase 0 +$filesize; "                           \
 581         "sf write $loadaddr 0 $filesize\0"                              \
 582 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
 583         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 584         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
 585         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
 586         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 587         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
 588 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
 589 "ubootaddr=0x01000000\0"                                                \
 590 "ubootfile=u-boot.bin\0"                                                \
 591 "ubootd=u-boot4dongle.bin\0"                                            \
 592 "upgrade=run flashworking\0"                                            \
 593 "usb_phy_type=ulpi\0 "                                                  \
 594 "workingaddr=0x02F00000\0"                                              \
 595 "workingbootargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"
 596
 597 #else
 598
 599 #if defined(CONFIG_UCP1020T1)
 600
 601 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 602 "bootcmd=run releasefpga; run norbootworking || run norbootrecovery\0"  \
 603 "bootfile=uImage\0"                                                     \
 604 "consoledev=ttyS0\0"                                                    \
 605 "cramfsfile=image.cramfs\0"                                             \
 606 "dtbaddr=0x00c00000\0"                                                  \
 607 "dtbfile=image.dtb\0"                                                   \
 608 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
 609 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
 610 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
 611 "fileaddr=0x01000000\0"                                                 \
 612 "filesize=0x00080000\0"                                                 \
 613 "flashmbr=sf probe 0; "                                                 \
 614         "tftp $loadaddr $mbr; "                                         \
 615         "sf erase $mbr_offset +$filesize; "                             \
 616         "sf write $loadaddr $mbr_offset $filesize\0"                    \
 617 "flashrecovery=tftp $recoveryaddr $cramfsfile; "                        \
 618         "protect off $nor_recoveryaddr +$filesize; "                    \
 619         "erase $nor_recoveryaddr +$filesize; "                          \
 620         "cp.b $recoveryaddr $nor_recoveryaddr $filesize; "              \
 621         "protect on $nor_recoveryaddr +$filesize\0 "                    \
 622 "flashuboot=tftp $ubootaddr $ubootfile; "                               \
 623         "protect off $nor_ubootaddr +$filesize; "                       \
 624         "erase $nor_ubootaddr +$filesize; "                             \
 625         "cp.b $ubootaddr $nor_ubootaddr $filesize; "                    \
 626         "protect on $nor_ubootaddr +$filesize\0 "                       \
 627 "flashworking=tftp $workingaddr $cramfsfile; "                          \
 628         "protect off $nor_workingaddr +$filesize; "                     \
 629         "erase $nor_workingaddr +$filesize; "                           \
 630         "cp.b $workingaddr $nor_workingaddr $filesize; "                \
 631         "protect on $nor_workingaddr +$filesize\0 "                     \
 632 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
 633 "kerneladdr=0x01100000\0"                                               \
 634 "kernelfile=uImage\0"                                                   \
 635 "loadaddr=0x01000000\0"                                                 \
 636 "mbr=uCP1020.mbr\0"                                                     \
 637 "mbr_offset=0x00000000\0"                                               \
 638 "netdev=eth0\0"                                                         \
 639 "nor_recoveryaddr=0xEC0A0000\0"                                         \
 640 "nor_ubootaddr=0xEFF80000\0"                                            \
 641 "nor_workingaddr=0xECFA0000\0"                                          \
 642 "norbootrecovery=setenv bootargs $recoverybootargs"                     \
 643         " console=$consoledev,$baudrate $othbootargs; "                 \
 644         "run norloadrecovery; "                                         \
 645         "bootm $kerneladdr - $dtbaddr\0"                                \
 646 "norbootworking=setenv bootargs $workingbootargs"                       \
 647         " console=$consoledev,$baudrate $othbootargs; "                 \
 648         "run norloadworking; "                                          \
 649         "bootm $kerneladdr - $dtbaddr\0"                                \
 650 "norloadrecovery=mw.l $kerneladdr 0x0 0x00a00000; "                     \
 651         "setenv cramfsaddr $nor_recoveryaddr; "                         \
 652         "cramfsload $dtbaddr $dtbfile; "                                \
 653         "cramfsload $kerneladdr $kernelfile\0"                          \
 654 "norloadworking=mw.l $kerneladdr 0x0 0x00a00000; "                      \
 655         "setenv cramfsaddr $nor_workingaddr; "                          \
 656         "cramfsload $dtbaddr $dtbfile; "                                \
 657         "cramfsload $kerneladdr $kernelfile\0"                          \
 658 "othbootargs=quiet\0"                                                   \
 659 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
 660         " console=$consoledev,$baudrate $othbootargs; "                 \
 661         "tftp $rootfsaddr $rootfsfile; "                                \
 662         "tftp $loadaddr $kernelfile; "                                  \
 663         "tftp $dtbaddr $dtbfile; "                                      \
 664         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
 665 "ramdisk_size=120000\0"                                                 \
 666 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
 667 "recoveryaddr=0x02F00000\0"                                             \
 668 "recoverybootargs=root=/dev/mtdblock0 rootfstype=cramfs ro\0"           \
 669 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
 670         "mw.l 0xffe0f008 0x00400000\0"                                  \
 671 "rootfsaddr=0x02F00000\0"                                               \
 672 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
 673 "rootpath=/opt/nfsroot\0"                                               \
 674 "silent=1\0"                                                            \
 675 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
 676         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 677         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
 678         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
 679         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 680         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
 681 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
 682 "ubootaddr=0x01000000\0"                                                \
 683 "ubootfile=u-boot.bin\0"                                                \
 684 "upgrade=run flashworking\0"                                            \
 685 "workingaddr=0x02F00000\0"                                              \
 686 "workingbootargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"
 687
 688 #else /* For Arcturus Modules */
 689
 690 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 691 "bootcmd=run norkernel\0"                                               \
 692 "bootfile=uImage\0"                                                     \
 693 "consoledev=ttyS0\0"                                                    \
 694 "dtbaddr=0x00c00000\0"                                                  \
 695 "dtbfile=image.dtb\0"                                                   \
 696 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
 697 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
 698 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
 699 "fileaddr=0x01000000\0"                                                 \
 700 "filesize=0x00080000\0"                                                 \
 701 "flashmbr=sf probe 0; "                                                 \
 702         "tftp $loadaddr $mbr; "                                         \
 703         "sf erase $mbr_offset +$filesize; "                             \
 704         "sf write $loadaddr $mbr_offset $filesize\0"                    \
 705 "flashuboot=tftp $loadaddr $ubootfile; "                                \
 706         "protect off $nor_ubootaddr0 +$filesize; "                      \
 707         "erase $nor_ubootaddr0 +$filesize; "                            \
 708         "cp.b $loadaddr $nor_ubootaddr0 $filesize; "                    \
 709         "protect on $nor_ubootaddr0 +$filesize; "                       \
 710         "protect off $nor_ubootaddr1 +$filesize; "                      \
 711         "erase $nor_ubootaddr1 +$filesize; "                            \
 712         "cp.b $loadaddr $nor_ubootaddr1 $filesize; "                    \
 713         "protect on $nor_ubootaddr1 +$filesize\0 "                      \
 714 "format0=protect off $part0base +$part0size; "                          \
 715         "erase $part0base +$part0size\0"                                \
 716 "format1=protect off $part1base +$part1size; "                          \
 717         "erase $part1base +$part1size\0"                                \
 718 "format2=protect off $part2base +$part2size; "                          \
 719         "erase $part2base +$part2size\0"                                \
 720 "format3=protect off $part3base +$part3size; "                          \
 721         "erase $part3base +$part3size\0"                                \
 722 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
 723 "kerneladdr=0x01100000\0"                                               \
 724 "kernelargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"                 \
 725 "kernelfile=uImage\0"                                                   \
 726 "loadaddr=0x01000000\0"                                                 \
 727 "mbr=uCP1020.mbr\0"                                                     \
 728 "mbr_offset=0x00000000\0"                                               \
 729 "netdev=eth0\0"                                                         \
 730 "nor_ubootaddr0=0xEC000000\0"                                           \
 731 "nor_ubootaddr1=0xEFF80000\0"                                           \
 732 "norkernel=setenv bootargs $kernelargs console=$consoledev,$baudrate; " \
 733         "run norkernelload; "                                           \
 734         "bootm $kerneladdr - $dtbaddr\0"                                \
 735 "norkernelload=mw.l $kerneladdr 0x0 0x00a00000; "                       \
 736         "setenv cramfsaddr $part0base; "                                \
 737         "cramfsload $dtbaddr $dtbfile; "                                \
 738         "cramfsload $kerneladdr $kernelfile\0"                          \
 739 "part0base=0xEC100000\0"                                                \
 740 "part0size=0x00700000\0"                                                \
 741 "part1base=0xEC800000\0"                                                \
 742 "part1size=0x02000000\0"                                                \
 743 "part2base=0xEE800000\0"                                                \
 744 "part2size=0x00800000\0"                                                \
 745 "part3base=0xEF000000\0"                                                \
 746 "part3size=0x00F80000\0"                                                \
 747 "partENVbase=0xEC080000\0"                                              \
 748 "partENVsize=0x00080000\0"                                              \
 749 "program0=tftp part0-000000.bin; "                                      \
 750         "protect off $part0base +$filesize; "                           \
 751         "erase $part0base +$filesize; "                                 \
 752         "cp.b $loadaddr $part0base $filesize; "                         \
 753         "echo Verifying...; "                                           \
 754         "cmp.b $loadaddr $part0base $filesize\0"                        \
 755 "program1=tftp part1-000000.bin; "                                      \
 756         "protect off $part1base +$filesize; "                           \
 757         "erase $part1base +$filesize; "                                 \
 758         "cp.b $loadaddr $part1base $filesize; "                         \
 759         "echo Verifying...; "                                           \
 760         "cmp.b $loadaddr $part1base $filesize\0"                        \
 761 "program2=tftp part2-000000.bin; "                                      \
 762         "protect off $part2base +$filesize; "                           \
 763         "erase $part2base +$filesize; "                                 \
 764         "cp.b $loadaddr $part2base $filesize; "                         \
 765         "echo Verifying...; "                                           \
 766         "cmp.b $loadaddr $part2base $filesize\0"                        \
 767 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
 768         "  console=$consoledev,$baudrate $othbootargs; "                \
 769         "tftp $rootfsaddr $rootfsfile; "                                \
 770         "tftp $loadaddr $kernelfile; "                                  \
 771         "tftp $dtbaddr $dtbfile; "                                      \
 772         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
 773 "ramdisk_size=120000\0"                                                 \
 774 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
 775 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
 776         "mw.l 0xffe0f008 0x00400000\0"                                  \
 777 "rootfsaddr=0x02F00000\0"                                               \
 778 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
 779 "rootpath=/opt/nfsroot\0"                                               \
 780 "spi__mbr=fatload mmc $mmcpart $loadaddr $mmbr; "                       \
 781         "sf probe 0; sf erase 0 +$filesize; "                           \
 782         "sf write $loadaddr 0 $filesize\0"                              \
 783 "spi__boot=fatload mmc $mmcpart $loadaddr u-boot.bin; "                 \
 784         "protect off 0xeC000000 +$filesize; "                           \
 785         "erase 0xEC000000 +$filesize; "                                 \
 786         "cp.b $loadaddr 0xEC000000 $filesize; "                         \
 787         "cmp.b $loadaddr 0xEC000000 $filesize; "                        \
 788         "protect on 0xeC000000 +$filesize\0"                            \
 789 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
 790         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 791         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
 792         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
 793         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 794         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
 795 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
 796 "ubootfile=u-boot.bin\0"                                                \
 797 "upgrade=run flashuboot\0"                                              \
 798 "usb_phy_type=ulpi\0 "                                                  \
 799 "boot_nfs= "                                                            \
 800         "setenv bootargs root=/dev/nfs rw "                             \
 801         "nfsroot=$serverip:$rootpath "                                  \
 802         "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
 803         "console=$consoledev,$baudrate $othbootargs;"                   \
 804         "tftp $loadaddr $bootfile;"                                     \
 805         "tftp $fdtaddr $fdtfile;"                                       \
 806         "bootm $loadaddr - $fdtaddr\0"                                  \
 807 "boot_hd = "                                                            \
 808         "setenv bootargs root=/dev/$bdev rw rootdelay=30 "              \
 809         "console=$consoledev,$baudrate $othbootargs;"                   \
 810         "usb start;"                                                    \
 811         "ext2load usb 0:1 $loadaddr /boot/$bootfile;"                   \
 812         "ext2load usb 0:1 $fdtaddr /boot/$fdtfile;"                     \
 813         "bootm $loadaddr - $fdtaddr\0"                                  \
 814 "boot_usb_fat = "                                                       \
 815         "setenv bootargs root=/dev/ram rw "                             \
 816         "console=$consoledev,$baudrate $othbootargs "                   \
 817         "ramdisk_size=$ramdisk_size;"                                   \
 818         "usb start;"                                                    \
 819         "fatload usb 0:2 $loadaddr $bootfile;"                          \
 820         "fatload usb 0:2 $fdtaddr $fdtfile;"                            \
 821         "fatload usb 0:2 $ramdiskaddr $ramdiskfile;"                    \
 822         "bootm $loadaddr $ramdiskaddr $fdtaddr\0 "                      \
 823 "boot_usb_ext2 = "                                                      \
 824         "setenv bootargs root=/dev/ram rw "                             \
 825         "console=$consoledev,$baudrate $othbootargs "                   \
 826         "ramdisk_size=$ramdisk_size;"                                   \
 827         "usb start;"                                                    \
 828         "ext2load usb 0:4 $loadaddr $bootfile;"                         \
 829         "ext2load usb 0:4 $fdtaddr $fdtfile;"                           \
 830         "ext2load usb 0:4 $ramdiskaddr $ramdiskfile;"                   \
 831         "bootm $loadaddr $ramdiskaddr $fdtaddr\0 "                      \
 832 "boot_nor = "                                                           \
 833         "setenv bootargs root=/dev/$jffs2nor rw "                       \
 834         "console=$consoledev,$baudrate rootfstype=jffs2 $othbootargs;"  \
 835         "bootm $norbootaddr - $norfdtaddr\0 "                           \
 836 "boot_ram = "                                                           \
 837         "setenv bootargs root=/dev/ram rw "                             \
 838         "console=$consoledev,$baudrate $othbootargs "                   \
 839         "ramdisk_size=$ramdisk_size;"                                   \
 840         "tftp $ramdiskaddr $ramdiskfile;"                               \
 841         "tftp $loadaddr $bootfile;"                                     \
 842         "tftp $fdtaddr $fdtfile;"                                       \
 843         "bootm $loadaddr $ramdiskaddr $fdtaddr\0"
 844
 845 #endif
 846 #endif
 847
 848 #endif /* __CONFIG_H */