include/configs/UCP1020.h

   1 /*
   2  * Copyright 2013-2015 Arcturus Networks, Inc.
   3  *           http://www.arcturusnetworks.com/products/ucp1020/
   4  * based on include/configs/p1_p2_rdb_pc.h
   5  * original copyright follows:
   6  * Copyright 2009-2011 Freescale Semiconductor, Inc.
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10
  11 /*
  12  * QorIQ uCP1020-xx boards configuration file
  13  */
  14 #ifndef __CONFIG_H
  15 #define __CONFIG_H
  16
  17 #define CONFIG_PCIE1    /* PCIE controller 1 (slot 1) */
  18 #define CONFIG_PCIE2    /* PCIE controller 2 (slot 2) */
  19 #define CONFIG_FSL_PCI_INIT     /* Use common FSL init code */
  20 #define CONFIG_PCI_INDIRECT_BRIDGE      /* indirect PCI bridge support */
  21 #define CONFIG_FSL_PCIE_RESET   /* need PCIe reset errata */
  22 #define CONFIG_SYS_PCI_64BIT    /* enable 64-bit PCI resources */
  23
  24 #if defined(CONFIG_TARTGET_UCP1020T1)
  25
  26 #define CONFIG_UCP1020_REV_1_3
  27
  28 #define CONFIG_BOARDNAME "uCP1020-64EE512-0U1-XR-T1"
  29
  30 #define CONFIG_TSEC_ENET
  31 #define CONFIG_TSEC1
  32 #define CONFIG_TSEC3
  33 #define CONFIG_HAS_ETH0
  34 #define CONFIG_HAS_ETH1
  35 #define CONFIG_ETHADDR          00:19:D3:FF:FF:FF
  36 #define CONFIG_ETH1ADDR         00:19:D3:FF:FF:FE
  37 #define CONFIG_ETH2ADDR         00:19:D3:FF:FF:FD
  38 #define CONFIG_IPADDR           10.80.41.229
  39 #define CONFIG_SERVERIP         10.80.41.227
  40 #define CONFIG_NETMASK          255.255.252.0
  41 #define CONFIG_ETHPRIME         "eTSEC3"
  42
  43 #ifndef CONFIG_SPI_FLASH
  44 #endif
  45 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
  46
  47 #define CONFIG_SYS_L2_SIZE      (256 << 10)
  48
  49 #endif
  50
  51 #if defined(CONFIG_TARGET_UCP1020)
  52
  53 #define CONFIG_UCP1020
  54 #define CONFIG_UCP1020_REV_1_3
  55
  56 #define CONFIG_BOARDNAME_LOCAL "uCP1020-64EEE512-OU1-XR"
  57
  58 #define CONFIG_TSEC_ENET
  59 #define CONFIG_TSEC1
  60 #define CONFIG_TSEC2
  61 #define CONFIG_TSEC3
  62 #define CONFIG_HAS_ETH0
  63 #define CONFIG_HAS_ETH1
  64 #define CONFIG_HAS_ETH2
  65 #define CONFIG_ETHADDR          00:06:3B:FF:FF:FF
  66 #define CONFIG_ETH1ADDR         00:06:3B:FF:FF:FE
  67 #define CONFIG_ETH2ADDR         00:06:3B:FF:FF:FD
  68 #define CONFIG_IPADDR           192.168.1.81
  69 #define CONFIG_IPADDR1          192.168.1.82
  70 #define CONFIG_IPADDR2          192.168.1.83
  71 #define CONFIG_SERVERIP         192.168.1.80
  72 #define CONFIG_GATEWAYIP        102.168.1.1
  73 #define CONFIG_NETMASK          255.255.255.0
  74 #define CONFIG_ETHPRIME         "eTSEC1"
  75
  76 #ifndef CONFIG_SPI_FLASH
  77 #endif
  78 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
  79
  80 #define CONFIG_SYS_L2_SIZE      (256 << 10)
  81
  82 #endif
  83
  84 #ifdef CONFIG_SDCARD
  85 #define CONFIG_RAMBOOT_SDCARD
  86 #define CONFIG_SYS_RAMBOOT
  87 #define CONFIG_SYS_EXTRA_ENV_RELOC
  88 #define CONFIG_RESET_VECTOR_ADDRESS     0x1107fffc
  89 #endif
  90
  91 #ifdef CONFIG_SPIFLASH
  92 #define CONFIG_RAMBOOT_SPIFLASH
  93 #define CONFIG_SYS_RAMBOOT
  94 #define CONFIG_SYS_EXTRA_ENV_RELOC
  95 #define CONFIG_RESET_VECTOR_ADDRESS     0x1107fffc
  96 #endif
  97
  98 #define CONFIG_SYS_TEXT_BASE_NOR        0xeff80000
  99
 100 #ifndef CONFIG_RESET_VECTOR_ADDRESS
 101 #define CONFIG_RESET_VECTOR_ADDRESS     0xeffffffc
 102 #endif
 103
 104 #ifndef CONFIG_SYS_MONITOR_BASE
 105 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE    /* start of monitor */
 106 #endif
 107
 108 #define CONFIG_MP
 109
 110 #define CONFIG_ENV_OVERWRITE
 111
 112 #define CONFIG_SYS_SATA_MAX_DEVICE      2
 113 #define CONFIG_LBA48
 114
 115 #define CONFIG_SYS_CLK_FREQ     66666666
 116 #define CONFIG_DDR_CLK_FREQ     66666666
 117
 118 #define CONFIG_HWCONFIG
 119
 120 /*
 121  * These can be toggled for performance analysis, otherwise use default.
 122  */
 123 #define CONFIG_L2_CACHE
 124 #define CONFIG_BTB
 125
 126 #define CONFIG_ENABLE_36BIT_PHYS
 127
 128 #define CONFIG_SYS_MEMTEST_START        0x00200000      /* memtest works on */
 129 #define CONFIG_SYS_MEMTEST_END          0x1fffffff
 130
 131 #define CONFIG_SYS_CCSRBAR              0xffe00000
 132 #define CONFIG_SYS_CCSRBAR_PHYS_LOW     CONFIG_SYS_CCSRBAR
 133
 134 /* IN case of NAND bootloader relocate CCSRBAR in RAMboot code not in the 4k
 135        SPL code*/
 136 #ifdef CONFIG_SPL_BUILD
 137 #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
 138 #endif
 139
 140 /* DDR Setup */
 141 #define CONFIG_DDR_ECC_ENABLE
 142 #ifndef CONFIG_DDR_ECC_ENABLE
 143 #define CONFIG_SYS_DDR_RAW_TIMING
 144 #define CONFIG_DDR_SPD
 145 #endif
 146 #define CONFIG_SYS_SPD_BUS_NUM 1
 147 #undef CONFIG_FSL_DDR_INTERACTIVE
 148
 149 #define CONFIG_SYS_SDRAM_SIZE_LAW       LAW_SIZE_512M
 150 #define CONFIG_CHIP_SELECTS_PER_CTRL    1
 151 #define CONFIG_SYS_SDRAM_SIZE           (1u << (CONFIG_SYS_SDRAM_SIZE_LAW - 19))
 152 #define CONFIG_SYS_DDR_SDRAM_BASE       0x00000000
 153 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
 154
 155 #define CONFIG_DIMM_SLOTS_PER_CTLR      1
 156
 157 /* Default settings for DDR3 */
 158 #define CONFIG_SYS_DDR_CS0_BNDS         0x0000003f
 159 #define CONFIG_SYS_DDR_CS0_CONFIG       0x80014302
 160 #define CONFIG_SYS_DDR_CS0_CONFIG_2     0x00000000
 161 #define CONFIG_SYS_DDR_CS1_BNDS         0x0040007f
 162 #define CONFIG_SYS_DDR_CS1_CONFIG       0x80014302
 163 #define CONFIG_SYS_DDR_CS1_CONFIG_2     0x00000000
 164
 165 #define CONFIG_SYS_DDR_DATA_INIT        0xdeadbeef
 166 #define CONFIG_SYS_DDR_INIT_ADDR        0x00000000
 167 #define CONFIG_SYS_DDR_INIT_EXT_ADDR    0x00000000
 168 #define CONFIG_SYS_DDR_MODE_CONTROL     0x00000000
 169
 170 #define CONFIG_SYS_DDR_ZQ_CONTROL       0x89080600
 171 #define CONFIG_SYS_DDR_WRLVL_CONTROL    0x8655A608
 172 #define CONFIG_SYS_DDR_SR_CNTR          0x00000000
 173 #define CONFIG_SYS_DDR_RCW_1            0x00000000
 174 #define CONFIG_SYS_DDR_RCW_2            0x00000000
 175 #ifdef CONFIG_DDR_ECC_ENABLE
 176 #define CONFIG_SYS_DDR_CONTROL          0xE70C0000      /* Type = DDR3 & ECC */
 177 #else
 178 #define CONFIG_SYS_DDR_CONTROL          0xC70C0000      /* Type = DDR3 */
 179 #endif
 180 #define CONFIG_SYS_DDR_CONTROL_2        0x04401050
 181 #define CONFIG_SYS_DDR_TIMING_4         0x00220001
 182 #define CONFIG_SYS_DDR_TIMING_5         0x03402400
 183
 184 #define CONFIG_SYS_DDR_TIMING_3         0x00020000
 185 #define CONFIG_SYS_DDR_TIMING_0         0x00330004
 186 #define CONFIG_SYS_DDR_TIMING_1         0x6f6B4846
 187 #define CONFIG_SYS_DDR_TIMING_2         0x0FA8C8CF
 188 #define CONFIG_SYS_DDR_CLK_CTRL         0x03000000
 189 #define CONFIG_SYS_DDR_MODE_1           0x40461520
 190 #define CONFIG_SYS_DDR_MODE_2           0x8000c000
 191 #define CONFIG_SYS_DDR_INTERVAL         0x0C300000
 192
 193 #undef CONFIG_CLOCKS_IN_MHZ
 194
 195 /*
 196  * Memory map
 197  *
 198  * 0x0000_0000 0x7fff_ffff      DDR             Up to 2GB cacheable
 199  * 0x8000_0000 0xdfff_ffff      PCI Express Mem 1G non-cacheable(PCIe * 2)
 200  * 0xec00_0000 0xefff_ffff      NOR flash       Up to 64M non-cacheable CS0/1
 201  * 0xf8f8_0000 0xf8ff_ffff      L2 SRAM         Up to 256K cacheable
 202  *   (early boot only)
 203  * 0xffc0_0000 0xffc3_ffff      PCI IO range    256k non-cacheable
 204  * 0xffd0_0000 0xffd0_3fff      L1 for stack    16K cacheable
 205  * 0xffe0_0000 0xffef_ffff      CCSR            1M non-cacheable
 206  */
 207
 208 /*
 209  * Local Bus Definitions
 210  */
 211 #define CONFIG_SYS_MAX_FLASH_SECT       512     /* 64M */
 212 #define CONFIG_SYS_FLASH_BASE           0xec000000
 213
 214 #define CONFIG_SYS_FLASH_BASE_PHYS      CONFIG_SYS_FLASH_BASE
 215
 216 #define CONFIG_FLASH_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) \
 217         | BR_PS_16 | BR_V)
 218
 219 #define CONFIG_FLASH_OR_PRELIM          0xfc000ff7
 220
 221 #define CONFIG_SYS_FLASH_BANKS_LIST     {CONFIG_SYS_FLASH_BASE_PHYS}
 222 #define CONFIG_SYS_FLASH_QUIET_TEST
 223 #define CONFIG_FLASH_SHOW_PROGRESS      45      /* count down from 45/5: 9..1 */
 224
 225 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* number of banks */
 226
 227 #undef CONFIG_SYS_FLASH_CHECKSUM
 228 #define CONFIG_SYS_FLASH_ERASE_TOUT     60000   /* Flash Erase Timeout (ms) */
 229 #define CONFIG_SYS_FLASH_WRITE_TOUT     500     /* Flash Write Timeout (ms) */
 230
 231 #define CONFIG_FLASH_CFI_DRIVER
 232 #define CONFIG_SYS_FLASH_CFI
 233 #define CONFIG_SYS_FLASH_EMPTY_INFO
 234 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
 235
 236 #define CONFIG_SYS_INIT_RAM_LOCK
 237 #define CONFIG_SYS_INIT_RAM_ADDR        0xffd00000 /* stack in RAM */
 238 /* Initial L1 address */
 239 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS   CONFIG_SYS_INIT_RAM_ADDR
 240 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0
 241 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR_PHYS
 242 /* Size of used area in RAM */
 243 #define CONFIG_SYS_INIT_RAM_SIZE        0x00004000
 244
 245 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - \
 246                                         GENERATED_GBL_DATA_SIZE)
 247 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 248
 249 #define CONFIG_SYS_MONITOR_LEN  (256 * 1024)/* Reserve 256 kB for Mon */
 250 #define CONFIG_SYS_MALLOC_LEN   (1024 * 1024)/* Reserved for malloc */
 251
 252 #define CONFIG_SYS_PMC_BASE     0xff980000
 253 #define CONFIG_SYS_PMC_BASE_PHYS        CONFIG_SYS_PMC_BASE
 254 #define CONFIG_PMC_BR_PRELIM    (BR_PHYS_ADDR(CONFIG_SYS_PMC_BASE_PHYS) | \
 255                                         BR_PS_8 | BR_V)
 256 #define CONFIG_PMC_OR_PRELIM    (OR_AM_64KB | OR_GPCM_CSNT | OR_GPCM_XACS | \
 257                                  OR_GPCM_SCY | OR_GPCM_TRLX | OR_GPCM_EHTR | \
 258                                  OR_GPCM_EAD)
 259
 260 #define CONFIG_SYS_BR0_PRELIM   CONFIG_FLASH_BR_PRELIM  /* NOR Base Address */
 261 #define CONFIG_SYS_OR0_PRELIM   CONFIG_FLASH_OR_PRELIM  /* NOR Options */
 262 #ifdef CONFIG_NAND_FSL_ELBC
 263 #define CONFIG_SYS_BR1_PRELIM   CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Addr */
 264 #define CONFIG_SYS_OR1_PRELIM   CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
 265 #endif
 266
 267 /* Serial Port - controlled on board with jumper J8
 268  * open - index 2
 269  * shorted - index 1
 270  */
 271 #undef CONFIG_SERIAL_SOFTWARE_FIFO
 272 #define CONFIG_SYS_NS16550_SERIAL
 273 #define CONFIG_SYS_NS16550_REG_SIZE     1
 274 #define CONFIG_SYS_NS16550_CLK          get_bus_freq(0)
 275 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_INIT_MINIMAL)
 276 #define CONFIG_NS16550_MIN_FUNCTIONS
 277 #endif
 278
 279 #define CONFIG_SYS_BAUDRATE_TABLE       \
 280         {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
 281
 282 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR + 0x4500)
 283 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR + 0x4600)
 284
 285 /* I2C */
 286 #define CONFIG_SYS_I2C
 287 #define CONFIG_SYS_I2C_FSL
 288 #define CONFIG_SYS_FSL_I2C_SPEED        400000
 289 #define CONFIG_SYS_FSL_I2C_SLAVE        0x7F
 290 #define CONFIG_SYS_FSL_I2C_OFFSET       0x3000
 291 #define CONFIG_SYS_FSL_I2C2_SPEED       400000
 292 #define CONFIG_SYS_FSL_I2C2_SLAVE       0x7F
 293 #define CONFIG_SYS_FSL_I2C2_OFFSET      0x3100
 294 #define CONFIG_SYS_I2C_NOPROBES         { {0, 0x29} }
 295 #define CONFIG_SYS_SPD_BUS_NUM          1 /* For rom_loc and flash bank */
 296
 297 #define CONFIG_RTC_DS1337
 298 #define CONFIG_RTC_DS1337_NOOSC
 299 #define CONFIG_SYS_I2C_RTC_ADDR         0x68
 300 #define CONFIG_SYS_I2C_PCA9557_ADDR     0x18
 301 #define CONFIG_SYS_I2C_NCT72_ADDR       0x4C
 302 #define CONFIG_SYS_I2C_IDT6V49205B      0x69
 303
 304 /*
 305  * eSPI - Enhanced SPI
 306  */
 307 #define CONFIG_HARD_SPI
 308
 309 #define CONFIG_SF_DEFAULT_SPEED         10000000
 310 #define CONFIG_SF_DEFAULT_MODE          SPI_MODE_0
 311
 312 #if defined(CONFIG_PCI)
 313 /*
 314  * General PCI
 315  * Memory space is mapped 1-1, but I/O space must start from 0.
 316  */
 317
 318 /* controller 2, direct to uli, tgtid 2, Base address 9000 */
 319 #define CONFIG_SYS_PCIE2_NAME           "PCIe SLOT CON9"
 320 #define CONFIG_SYS_PCIE2_MEM_VIRT       0xa0000000
 321 #define CONFIG_SYS_PCIE2_MEM_BUS        0xa0000000
 322 #define CONFIG_SYS_PCIE2_MEM_PHYS       0xa0000000
 323 #define CONFIG_SYS_PCIE2_MEM_SIZE       0x20000000      /* 512M */
 324 #define CONFIG_SYS_PCIE2_IO_VIRT        0xffc10000
 325 #define CONFIG_SYS_PCIE2_IO_BUS         0x00000000
 326 #define CONFIG_SYS_PCIE2_IO_PHYS        0xffc10000
 327 #define CONFIG_SYS_PCIE2_IO_SIZE        0x00010000      /* 64k */
 328
 329 /* controller 1, Slot 2, tgtid 1, Base address a000 */
 330 #define CONFIG_SYS_PCIE1_NAME           "PCIe SLOT CON10"
 331 #define CONFIG_SYS_PCIE1_MEM_VIRT       0x80000000
 332 #define CONFIG_SYS_PCIE1_MEM_BUS        0x80000000
 333 #define CONFIG_SYS_PCIE1_MEM_PHYS       0x80000000
 334 #define CONFIG_SYS_PCIE1_MEM_SIZE       0x20000000      /* 512M */
 335 #define CONFIG_SYS_PCIE1_IO_VIRT        0xffc00000
 336 #define CONFIG_SYS_PCIE1_IO_BUS         0x00000000
 337 #define CONFIG_SYS_PCIE1_IO_PHYS        0xffc00000
 338 #define CONFIG_SYS_PCIE1_IO_SIZE        0x00010000      /* 64k */
 339
 340 #define CONFIG_PCI_SCAN_SHOW    /* show pci devices on startup */
 341 #endif /* CONFIG_PCI */
 342
 343 /*
 344  * Environment
 345  */
 346 #ifdef CONFIG_ENV_FIT_UCBOOT
 347
 348 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + 0x20000)
 349 #define CONFIG_ENV_SIZE         0x20000
 350 #define CONFIG_ENV_SECT_SIZE    0x20000 /* 128K (one sector) */
 351
 352 #else
 353
 354 #define CONFIG_ENV_SPI_BUS      0
 355 #define CONFIG_ENV_SPI_CS       0
 356 #define CONFIG_ENV_SPI_MAX_HZ   10000000
 357 #define CONFIG_ENV_SPI_MODE     0
 358
 359 #ifdef CONFIG_RAMBOOT_SPIFLASH
 360
 361 #define CONFIG_ENV_SIZE         0x3000          /* 12KB */
 362 #define CONFIG_ENV_OFFSET       0x2000          /* 8KB */
 363 #define CONFIG_ENV_SECT_SIZE    0x1000
 364
 365 #if defined(CONFIG_SYS_REDUNDAND_ENVIRONMENT)
 366 /* Address and size of Redundant Environment Sector     */
 367 #define CONFIG_ENV_OFFSET_REDUND        (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
 368 #define CONFIG_ENV_SIZE_REDUND          CONFIG_ENV_SIZE
 369 #endif
 370
 371 #elif defined(CONFIG_RAMBOOT_SDCARD)
 372 #define CONFIG_FSL_FIXED_MMC_LOCATION
 373 #define CONFIG_ENV_SIZE         0x2000
 374 #define CONFIG_SYS_MMC_ENV_DEV  0
 375
 376 #elif defined(CONFIG_SYS_RAMBOOT)
 377 #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE - 0x1000)
 378 #define CONFIG_ENV_SIZE         0x2000
 379
 380 #else
 381 #define CONFIG_ENV_BASE         (CONFIG_SYS_FLASH_BASE)
 382 #define CONFIG_ENV_SECT_SIZE    0x20000 /* 128K (one sector) */
 383 #define CONFIG_ENV_SIZE         CONFIG_ENV_SECT_SIZE
 384 #define CONFIG_ENV_ADDR         (CONFIG_ENV_BASE + 0xC0000)
 385 #if defined(CONFIG_SYS_REDUNDAND_ENVIRONMENT)
 386 /* Address and size of Redundant Environment Sector     */
 387 #define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR + CONFIG_ENV_SIZE)
 388 #define CONFIG_ENV_SIZE_REDUND  CONFIG_ENV_SIZE
 389 #endif
 390
 391 #endif
 392
 393 #endif  /* CONFIG_ENV_FIT_UCBOOT */
 394
 395 #define CONFIG_LOADS_ECHO               /* echo on for serial download */
 396 #define CONFIG_SYS_LOADS_BAUD_CHANGE    /* allow baudrate change */
 397
 398 /*
 399  * USB
 400  */
 401 #define CONFIG_HAS_FSL_DR_USB
 402
 403 #if defined(CONFIG_HAS_FSL_DR_USB)
 404 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
 405
 406 #ifdef CONFIG_USB_EHCI_HCD
 407 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 408 #define CONFIG_USB_EHCI_FSL
 409 #endif
 410 #endif
 411
 412 #undef CONFIG_WATCHDOG                  /* watchdog disabled */
 413
 414 #ifdef CONFIG_MMC
 415 #define CONFIG_FSL_ESDHC
 416 #define CONFIG_SYS_FSL_ESDHC_ADDR       CONFIG_SYS_MPC85xx_ESDHC_ADDR
 417 #define CONFIG_MMC_SPI
 418 #endif
 419
 420 /* Misc Extra Settings */
 421 #undef CONFIG_WATCHDOG  /* watchdog disabled */
 422
 423 /*
 424  * Miscellaneous configurable options
 425  */
 426 #define CONFIG_SYS_LOAD_ADDR    0x2000000       /* default load address */
 427 #define CONFIG_SYS_HZ           1000    /* decrementer freq: 1ms tick */
 428
 429 /*
 430  * For booting Linux, the board info and command line data
 431  * have to be in the first 64 MB of memory, since this is
 432  * the maximum mapped by the Linux kernel during initialization.
 433  */
 434 #define CONFIG_SYS_BOOTMAPSZ    (64 << 20)      /* Initial Memory for Linux*/
 435 #define CONFIG_SYS_BOOTM_LEN    (64 << 20)      /* Increase max gunzip size */
 436
 437 #if defined(CONFIG_CMD_KGDB)
 438 #define CONFIG_KGDB_BAUDRATE    230400  /* speed to run kgdb serial port */
 439 #define CONFIG_KGDB_SER_INDEX   2       /* which serial port to use */
 440 #endif
 441
 442 /*
 443  * Environment Configuration
 444  */
 445
 446 #if defined(CONFIG_TSEC_ENET)
 447
 448 #if defined(CONFIG_UCP1020_REV_1_2) || defined(CONFIG_UCP1020_REV_1_3)
 449 #else
 450 #error "UCP1020 module revision is not defined !!!"
 451 #endif
 452
 453 #define CONFIG_BOOTP_SERVERIP
 454
 455 #define CONFIG_MII              /* MII PHY management */
 456 #define CONFIG_TSEC1_NAME       "eTSEC1"
 457 #define CONFIG_TSEC2_NAME       "eTSEC2"
 458 #define CONFIG_TSEC3_NAME       "eTSEC3"
 459
 460 #define TSEC1_PHY_ADDR  4
 461 #define TSEC2_PHY_ADDR  0
 462 #define TSEC2_PHY_ADDR_SGMII    0x00
 463 #define TSEC3_PHY_ADDR  6
 464
 465 #define TSEC1_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
 466 #define TSEC2_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
 467 #define TSEC3_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
 468
 469 #define TSEC1_PHYIDX    0
 470 #define TSEC2_PHYIDX    0
 471 #define TSEC3_PHYIDX    0
 472
 473 #endif
 474
 475 #define CONFIG_HOSTNAME         UCP1020
 476 #define CONFIG_ROOTPATH         "/opt/nfsroot"
 477 #define CONFIG_BOOTFILE         "uImage"
 478 #define CONFIG_UBOOTPATH        u-boot.bin /* U-Boot image on TFTP server */
 479
 480 /* default location for tftp and bootm */
 481 #define CONFIG_LOADADDR         1000000
 482
 483 #if defined(CONFIG_DONGLE)
 484
 485 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 486 "bootcmd=run prog_spi_mbrbootcramfs\0"                                  \
 487 "bootfile=uImage\0"                                                     \
 488 "consoledev=ttyS0\0"                                                    \
 489 "cramfsfile=image.cramfs\0"                                             \
 490 "dtbaddr=0x00c00000\0"                                                  \
 491 "dtbfile=image.dtb\0"                                                   \
 492 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
 493 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
 494 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
 495 "fileaddr=0x01000000\0"                                                 \
 496 "filesize=0x00080000\0"                                                 \
 497 "flashmbr=sf probe 0; "                                                 \
 498         "tftp $loadaddr $mbr; "                                         \
 499         "sf erase $mbr_offset +$filesize; "                             \
 500         "sf write $loadaddr $mbr_offset $filesize\0"                    \
 501 "flashrecovery=tftp $recoveryaddr $cramfsfile; "                        \
 502         "protect off $nor_recoveryaddr +$filesize; "                    \
 503         "erase $nor_recoveryaddr +$filesize; "                          \
 504         "cp.b $recoveryaddr $nor_recoveryaddr $filesize; "              \
 505         "protect on $nor_recoveryaddr +$filesize\0 "                    \
 506 "flashuboot=tftp $ubootaddr $ubootfile; "                               \
 507         "protect off $nor_ubootaddr +$filesize; "                       \
 508         "erase $nor_ubootaddr +$filesize; "                             \
 509         "cp.b $ubootaddr $nor_ubootaddr $filesize; "                    \
 510         "protect on $nor_ubootaddr +$filesize\0 "                       \
 511 "flashworking=tftp $workingaddr $cramfsfile; "                          \
 512         "protect off $nor_workingaddr +$filesize; "                     \
 513         "erase $nor_workingaddr +$filesize; "                           \
 514         "cp.b $workingaddr $nor_workingaddr $filesize; "                \
 515         "protect on $nor_workingaddr +$filesize\0 "                     \
 516 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
 517 "kerneladdr=0x01100000\0"                                               \
 518 "kernelfile=uImage\0"                                                   \
 519 "loadaddr=0x01000000\0"                                                 \
 520 "mbr=uCP1020d.mbr\0"                                                    \
 521 "mbr_offset=0x00000000\0"                                               \
 522 "mmbr=uCP1020Quiet.mbr\0"                                               \
 523 "mmcpart=0:2\0"                                                         \
 524 "mmc__mbrd=fatload mmc $mmcpart $loadaddr $mbr; "                       \
 525         "mmc erase 1 1; "                                               \
 526         "mmc write $loadaddr 1 1\0"                                     \
 527 "mmc__uboot=fatload mmc $mmcpart $loadaddr $ubootfile; "                \
 528         "mmc erase 0x40 0x400; "                                        \
 529         "mmc write $loadaddr 0x40 0x400\0"                              \
 530 "netdev=eth0\0"                                                         \
 531 "nor_recoveryaddr=0xEC0A0000\0"                                         \
 532 "nor_ubootaddr=0xEFF80000\0"                                            \
 533 "nor_workingaddr=0xECFA0000\0"                                          \
 534 "norbootrecovery=setenv bootargs $recoverybootargs"                     \
 535         " console=$consoledev,$baudrate $othbootargs; "                 \
 536         "run norloadrecovery; "                                         \
 537         "bootm $kerneladdr - $dtbaddr\0"                                \
 538 "norbootworking=setenv bootargs $workingbootargs"                       \
 539         " console=$consoledev,$baudrate $othbootargs; "                 \
 540         "run norloadworking; "                                          \
 541         "bootm $kerneladdr - $dtbaddr\0"                                \
 542 "norloadrecovery=mw.l $kerneladdr 0x0 0x00a00000; "                     \
 543         "setenv cramfsaddr $nor_recoveryaddr; "                         \
 544         "cramfsload $dtbaddr $dtbfile; "                                \
 545         "cramfsload $kerneladdr $kernelfile\0"                          \
 546 "norloadworking=mw.l $kerneladdr 0x0 0x00a00000; "                      \
 547         "setenv cramfsaddr $nor_workingaddr; "                          \
 548         "cramfsload $dtbaddr $dtbfile; "                                \
 549         "cramfsload $kerneladdr $kernelfile\0"                          \
 550 "prog_spi_mbr=run spi__mbr\0"                                           \
 551 "prog_spi_mbrboot=run spi__mbr; run spi__boot1; run spi__boot2\0"       \
 552 "prog_spi_mbrbootcramfs=run spi__mbr; run spi__boot1; run spi__boot2; " \
 553         "run spi__cramfs\0"                                             \
 554 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
 555         " console=$consoledev,$baudrate $othbootargs; "                 \
 556         "tftp $rootfsaddr $rootfsfile; "                                \
 557         "tftp $loadaddr $kernelfile; "                                  \
 558         "tftp $dtbaddr $dtbfile; "                                      \
 559         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
 560 "ramdisk_size=120000\0"                                                 \
 561 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
 562 "recoveryaddr=0x02F00000\0"                                             \
 563 "recoverybootargs=root=/dev/mtdblock0 rootfstype=cramfs ro\0"           \
 564 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
 565         "mw.l 0xffe0f008 0x00400000\0"                                  \
 566 "rootfsaddr=0x02F00000\0"                                               \
 567 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
 568 "rootpath=/opt/nfsroot\0"                                               \
 569 "spi__boot1=fatload mmc $mmcpart $loadaddr u-boot.bin; "                \
 570         "protect off 0xeC000000 +$filesize; "                           \
 571         "erase 0xEC000000 +$filesize; "                                 \
 572         "cp.b $loadaddr 0xEC000000 $filesize; "                         \
 573         "cmp.b $loadaddr 0xEC000000 $filesize; "                        \
 574         "protect on 0xeC000000 +$filesize\0"                            \
 575 "spi__boot2=fatload mmc $mmcpart $loadaddr u-boot.bin; "                \
 576         "protect off 0xeFF80000 +$filesize; "                           \
 577         "erase 0xEFF80000 +$filesize; "                                 \
 578         "cp.b $loadaddr 0xEFF80000 $filesize; "                         \
 579         "cmp.b $loadaddr 0xEFF80000 $filesize; "                        \
 580         "protect on 0xeFF80000 +$filesize\0"                            \
 581 "spi__bootd=fatload mmc $mmcpart $loadaddr $ubootd; "                   \
 582         "sf probe 0; sf erase 0x8000 +$filesize; "                      \
 583         "sf write $loadaddr 0x8000 $filesize\0"                         \
 584 "spi__cramfs=fatload mmc $mmcpart $loadaddr image.cramfs; "             \
 585         "protect off 0xec0a0000 +$filesize; "                           \
 586         "erase 0xeC0A0000 +$filesize; "                                 \
 587         "cp.b $loadaddr 0xeC0A0000 $filesize; "                         \
 588         "protect on 0xec0a0000 +$filesize\0"                            \
 589 "spi__mbr=fatload mmc $mmcpart $loadaddr $mmbr; "                       \
 590         "sf probe 1; sf erase 0 +$filesize; "                           \
 591         "sf write $loadaddr 0 $filesize\0"                              \
 592 "spi__mbrd=fatload mmc $mmcpart $loadaddr $mbr; "                       \
 593         "sf probe 0; sf erase 0 +$filesize; "                           \
 594         "sf write $loadaddr 0 $filesize\0"                              \
 595 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
 596         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 597         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
 598         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
 599         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 600         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
 601 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
 602 "ubootaddr=0x01000000\0"                                                \
 603 "ubootfile=u-boot.bin\0"                                                \
 604 "ubootd=u-boot4dongle.bin\0"                                            \
 605 "upgrade=run flashworking\0"                                            \
 606 "usb_phy_type=ulpi\0 "                                                  \
 607 "workingaddr=0x02F00000\0"                                              \
 608 "workingbootargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"
 609
 610 #else
 611
 612 #if defined(CONFIG_UCP1020T1)
 613
 614 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 615 "bootcmd=run releasefpga; run norbootworking || run norbootrecovery\0"  \
 616 "bootfile=uImage\0"                                                     \
 617 "consoledev=ttyS0\0"                                                    \
 618 "cramfsfile=image.cramfs\0"                                             \
 619 "dtbaddr=0x00c00000\0"                                                  \
 620 "dtbfile=image.dtb\0"                                                   \
 621 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
 622 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
 623 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
 624 "fileaddr=0x01000000\0"                                                 \
 625 "filesize=0x00080000\0"                                                 \
 626 "flashmbr=sf probe 0; "                                                 \
 627         "tftp $loadaddr $mbr; "                                         \
 628         "sf erase $mbr_offset +$filesize; "                             \
 629         "sf write $loadaddr $mbr_offset $filesize\0"                    \
 630 "flashrecovery=tftp $recoveryaddr $cramfsfile; "                        \
 631         "protect off $nor_recoveryaddr +$filesize; "                    \
 632         "erase $nor_recoveryaddr +$filesize; "                          \
 633         "cp.b $recoveryaddr $nor_recoveryaddr $filesize; "              \
 634         "protect on $nor_recoveryaddr +$filesize\0 "                    \
 635 "flashuboot=tftp $ubootaddr $ubootfile; "                               \
 636         "protect off $nor_ubootaddr +$filesize; "                       \
 637         "erase $nor_ubootaddr +$filesize; "                             \
 638         "cp.b $ubootaddr $nor_ubootaddr $filesize; "                    \
 639         "protect on $nor_ubootaddr +$filesize\0 "                       \
 640 "flashworking=tftp $workingaddr $cramfsfile; "                          \
 641         "protect off $nor_workingaddr +$filesize; "                     \
 642         "erase $nor_workingaddr +$filesize; "                           \
 643         "cp.b $workingaddr $nor_workingaddr $filesize; "                \
 644         "protect on $nor_workingaddr +$filesize\0 "                     \
 645 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
 646 "kerneladdr=0x01100000\0"                                               \
 647 "kernelfile=uImage\0"                                                   \
 648 "loadaddr=0x01000000\0"                                                 \
 649 "mbr=uCP1020.mbr\0"                                                     \
 650 "mbr_offset=0x00000000\0"                                               \
 651 "netdev=eth0\0"                                                         \
 652 "nor_recoveryaddr=0xEC0A0000\0"                                         \
 653 "nor_ubootaddr=0xEFF80000\0"                                            \
 654 "nor_workingaddr=0xECFA0000\0"                                          \
 655 "norbootrecovery=setenv bootargs $recoverybootargs"                     \
 656         " console=$consoledev,$baudrate $othbootargs; "                 \
 657         "run norloadrecovery; "                                         \
 658         "bootm $kerneladdr - $dtbaddr\0"                                \
 659 "norbootworking=setenv bootargs $workingbootargs"                       \
 660         " console=$consoledev,$baudrate $othbootargs; "                 \
 661         "run norloadworking; "                                          \
 662         "bootm $kerneladdr - $dtbaddr\0"                                \
 663 "norloadrecovery=mw.l $kerneladdr 0x0 0x00a00000; "                     \
 664         "setenv cramfsaddr $nor_recoveryaddr; "                         \
 665         "cramfsload $dtbaddr $dtbfile; "                                \
 666         "cramfsload $kerneladdr $kernelfile\0"                          \
 667 "norloadworking=mw.l $kerneladdr 0x0 0x00a00000; "                      \
 668         "setenv cramfsaddr $nor_workingaddr; "                          \
 669         "cramfsload $dtbaddr $dtbfile; "                                \
 670         "cramfsload $kerneladdr $kernelfile\0"                          \
 671 "othbootargs=quiet\0"                                                   \
 672 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
 673         " console=$consoledev,$baudrate $othbootargs; "                 \
 674         "tftp $rootfsaddr $rootfsfile; "                                \
 675         "tftp $loadaddr $kernelfile; "                                  \
 676         "tftp $dtbaddr $dtbfile; "                                      \
 677         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
 678 "ramdisk_size=120000\0"                                                 \
 679 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
 680 "recoveryaddr=0x02F00000\0"                                             \
 681 "recoverybootargs=root=/dev/mtdblock0 rootfstype=cramfs ro\0"           \
 682 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
 683         "mw.l 0xffe0f008 0x00400000\0"                                  \
 684 "rootfsaddr=0x02F00000\0"                                               \
 685 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
 686 "rootpath=/opt/nfsroot\0"                                               \
 687 "silent=1\0"                                                            \
 688 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
 689         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 690         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
 691         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
 692         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 693         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
 694 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
 695 "ubootaddr=0x01000000\0"                                                \
 696 "ubootfile=u-boot.bin\0"                                                \
 697 "upgrade=run flashworking\0"                                            \
 698 "workingaddr=0x02F00000\0"                                              \
 699 "workingbootargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"
 700
 701 #else /* For Arcturus Modules */
 702
 703 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 704 "bootcmd=run norkernel\0"                                               \
 705 "bootfile=uImage\0"                                                     \
 706 "consoledev=ttyS0\0"                                                    \
 707 "dtbaddr=0x00c00000\0"                                                  \
 708 "dtbfile=image.dtb\0"                                                   \
 709 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
 710 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
 711 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
 712 "fileaddr=0x01000000\0"                                                 \
 713 "filesize=0x00080000\0"                                                 \
 714 "flashmbr=sf probe 0; "                                                 \
 715         "tftp $loadaddr $mbr; "                                         \
 716         "sf erase $mbr_offset +$filesize; "                             \
 717         "sf write $loadaddr $mbr_offset $filesize\0"                    \
 718 "flashuboot=tftp $loadaddr $ubootfile; "                                \
 719         "protect off $nor_ubootaddr0 +$filesize; "                      \
 720         "erase $nor_ubootaddr0 +$filesize; "                            \
 721         "cp.b $loadaddr $nor_ubootaddr0 $filesize; "                    \
 722         "protect on $nor_ubootaddr0 +$filesize; "                       \
 723         "protect off $nor_ubootaddr1 +$filesize; "                      \
 724         "erase $nor_ubootaddr1 +$filesize; "                            \
 725         "cp.b $loadaddr $nor_ubootaddr1 $filesize; "                    \
 726         "protect on $nor_ubootaddr1 +$filesize\0 "                      \
 727 "format0=protect off $part0base +$part0size; "                          \
 728         "erase $part0base +$part0size\0"                                \
 729 "format1=protect off $part1base +$part1size; "                          \
 730         "erase $part1base +$part1size\0"                                \
 731 "format2=protect off $part2base +$part2size; "                          \
 732         "erase $part2base +$part2size\0"                                \
 733 "format3=protect off $part3base +$part3size; "                          \
 734         "erase $part3base +$part3size\0"                                \
 735 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
 736 "kerneladdr=0x01100000\0"                                               \
 737 "kernelargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"                 \
 738 "kernelfile=uImage\0"                                                   \
 739 "loadaddr=0x01000000\0"                                                 \
 740 "mbr=uCP1020.mbr\0"                                                     \
 741 "mbr_offset=0x00000000\0"                                               \
 742 "netdev=eth0\0"                                                         \
 743 "nor_ubootaddr0=0xEC000000\0"                                           \
 744 "nor_ubootaddr1=0xEFF80000\0"                                           \
 745 "norkernel=setenv bootargs $kernelargs console=$consoledev,$baudrate; " \
 746         "run norkernelload; "                                           \
 747         "bootm $kerneladdr - $dtbaddr\0"                                \
 748 "norkernelload=mw.l $kerneladdr 0x0 0x00a00000; "                       \
 749         "setenv cramfsaddr $part0base; "                                \
 750         "cramfsload $dtbaddr $dtbfile; "                                \
 751         "cramfsload $kerneladdr $kernelfile\0"                          \
 752 "part0base=0xEC100000\0"                                                \
 753 "part0size=0x00700000\0"                                                \
 754 "part1base=0xEC800000\0"                                                \
 755 "part1size=0x02000000\0"                                                \
 756 "part2base=0xEE800000\0"                                                \
 757 "part2size=0x00800000\0"                                                \
 758 "part3base=0xEF000000\0"                                                \
 759 "part3size=0x00F80000\0"                                                \
 760 "partENVbase=0xEC080000\0"                                              \
 761 "partENVsize=0x00080000\0"                                              \
 762 "program0=tftp part0-000000.bin; "                                      \
 763         "protect off $part0base +$filesize; "                           \
 764         "erase $part0base +$filesize; "                                 \
 765         "cp.b $loadaddr $part0base $filesize; "                         \
 766         "echo Verifying...; "                                           \
 767         "cmp.b $loadaddr $part0base $filesize\0"                        \
 768 "program1=tftp part1-000000.bin; "                                      \
 769         "protect off $part1base +$filesize; "                           \
 770         "erase $part1base +$filesize; "                                 \
 771         "cp.b $loadaddr $part1base $filesize; "                         \
 772         "echo Verifying...; "                                           \
 773         "cmp.b $loadaddr $part1base $filesize\0"                        \
 774 "program2=tftp part2-000000.bin; "                                      \
 775         "protect off $part2base +$filesize; "                           \
 776         "erase $part2base +$filesize; "                                 \
 777         "cp.b $loadaddr $part2base $filesize; "                         \
 778         "echo Verifying...; "                                           \
 779         "cmp.b $loadaddr $part2base $filesize\0"                        \
 780 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
 781         "  console=$consoledev,$baudrate $othbootargs; "                \
 782         "tftp $rootfsaddr $rootfsfile; "                                \
 783         "tftp $loadaddr $kernelfile; "                                  \
 784         "tftp $dtbaddr $dtbfile; "                                      \
 785         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
 786 "ramdisk_size=120000\0"                                                 \
 787 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
 788 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
 789         "mw.l 0xffe0f008 0x00400000\0"                                  \
 790 "rootfsaddr=0x02F00000\0"                                               \
 791 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
 792 "rootpath=/opt/nfsroot\0"                                               \
 793 "spi__mbr=fatload mmc $mmcpart $loadaddr $mmbr; "                       \
 794         "sf probe 0; sf erase 0 +$filesize; "                           \
 795         "sf write $loadaddr 0 $filesize\0"                              \
 796 "spi__boot=fatload mmc $mmcpart $loadaddr u-boot.bin; "                 \
 797         "protect off 0xeC000000 +$filesize; "                           \
 798         "erase 0xEC000000 +$filesize; "                                 \
 799         "cp.b $loadaddr 0xEC000000 $filesize; "                         \
 800         "cmp.b $loadaddr 0xEC000000 $filesize; "                        \
 801         "protect on 0xeC000000 +$filesize\0"                            \
 802 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
 803         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 804         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
 805         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
 806         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 807         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
 808 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
 809 "ubootfile=u-boot.bin\0"                                                \
 810 "upgrade=run flashuboot\0"                                              \
 811 "usb_phy_type=ulpi\0 "                                                  \
 812 "boot_nfs= "                                                            \
 813         "setenv bootargs root=/dev/nfs rw "                             \
 814         "nfsroot=$serverip:$rootpath "                                  \
 815         "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
 816         "console=$consoledev,$baudrate $othbootargs;"                   \
 817         "tftp $loadaddr $bootfile;"                                     \
 818         "tftp $fdtaddr $fdtfile;"                                       \
 819         "bootm $loadaddr - $fdtaddr\0"                                  \
 820 "boot_hd = "                                                            \
 821         "setenv bootargs root=/dev/$bdev rw rootdelay=30 "              \
 822         "console=$consoledev,$baudrate $othbootargs;"                   \
 823         "usb start;"                                                    \
 824         "ext2load usb 0:1 $loadaddr /boot/$bootfile;"                   \
 825         "ext2load usb 0:1 $fdtaddr /boot/$fdtfile;"                     \
 826         "bootm $loadaddr - $fdtaddr\0"                                  \
 827 "boot_usb_fat = "                                                       \
 828         "setenv bootargs root=/dev/ram rw "                             \
 829         "console=$consoledev,$baudrate $othbootargs "                   \
 830         "ramdisk_size=$ramdisk_size;"                                   \
 831         "usb start;"                                                    \
 832         "fatload usb 0:2 $loadaddr $bootfile;"                          \
 833         "fatload usb 0:2 $fdtaddr $fdtfile;"                            \
 834         "fatload usb 0:2 $ramdiskaddr $ramdiskfile;"                    \
 835         "bootm $loadaddr $ramdiskaddr $fdtaddr\0 "                      \
 836 "boot_usb_ext2 = "                                                      \
 837         "setenv bootargs root=/dev/ram rw "                             \
 838         "console=$consoledev,$baudrate $othbootargs "                   \
 839         "ramdisk_size=$ramdisk_size;"                                   \
 840         "usb start;"                                                    \
 841         "ext2load usb 0:4 $loadaddr $bootfile;"                         \
 842         "ext2load usb 0:4 $fdtaddr $fdtfile;"                           \
 843         "ext2load usb 0:4 $ramdiskaddr $ramdiskfile;"                   \
 844         "bootm $loadaddr $ramdiskaddr $fdtaddr\0 "                      \
 845 "boot_nor = "                                                           \
 846         "setenv bootargs root=/dev/$jffs2nor rw "                       \
 847         "console=$consoledev,$baudrate rootfstype=jffs2 $othbootargs;"  \
 848         "bootm $norbootaddr - $norfdtaddr\0 "                           \
 849 "boot_ram = "                                                           \
 850         "setenv bootargs root=/dev/ram rw "                             \
 851         "console=$consoledev,$baudrate $othbootargs "                   \
 852         "ramdisk_size=$ramdisk_size;"                                   \
 853         "tftp $ramdiskaddr $ramdiskfile;"                               \
 854         "tftp $loadaddr $bootfile;"                                     \
 855         "tftp $fdtaddr $fdtfile;"                                       \
 856         "bootm $loadaddr $ramdiskaddr $fdtaddr\0"
 857
 858 #endif
 859 #endif
 860
 861 #endif /* __CONFIG_H */