6fd3fa471259bae444c6b69de6f44256dd747881
[platform/kernel/u-boot.git] / include / configs / UCP1020.h
1 /*
2  * Copyright 2013-2015 Arcturus Networks, Inc.
3  *           http://www.arcturusnetworks.com/products/ucp1020/
4  * based on include/configs/p1_p2_rdb_pc.h
5  * original copyright follows:
6  * Copyright 2009-2011 Freescale Semiconductor, Inc.
7  *
8  * SPDX-License-Identifier:     GPL-2.0+
9  */
10
11 /*
12  * QorIQ uCP1020-xx boards configuration file
13  */
14 #ifndef __CONFIG_H
15 #define __CONFIG_H
16
17 #define CONFIG_PCIE1    /* PCIE controller 1 (slot 1) */
18 #define CONFIG_PCIE2    /* PCIE controller 2 (slot 2) */
19 #define CONFIG_FSL_PCI_INIT     /* Use common FSL init code */
20 #define CONFIG_PCI_INDIRECT_BRIDGE      /* indirect PCI bridge support */
21 #define CONFIG_FSL_PCIE_RESET   /* need PCIe reset errata */
22 #define CONFIG_SYS_PCI_64BIT    /* enable 64-bit PCI resources */
23
24 #if defined(CONFIG_TARTGET_UCP1020T1)
25
26 #define CONFIG_UCP1020_REV_1_3
27
28 #define CONFIG_BOARDNAME "uCP1020-64EE512-0U1-XR-T1"
29
30 #define CONFIG_TSEC_ENET
31 #define CONFIG_TSEC1
32 #define CONFIG_TSEC3
33 #define CONFIG_HAS_ETH0
34 #define CONFIG_HAS_ETH1
35 #define CONFIG_ETHADDR          00:19:D3:FF:FF:FF
36 #define CONFIG_ETH1ADDR         00:19:D3:FF:FF:FE
37 #define CONFIG_ETH2ADDR         00:19:D3:FF:FF:FD
38 #define CONFIG_IPADDR           10.80.41.229
39 #define CONFIG_SERVERIP         10.80.41.227
40 #define CONFIG_NETMASK          255.255.252.0
41 #define CONFIG_ETHPRIME         "eTSEC3"
42
43 #ifndef CONFIG_SPI_FLASH
44 #endif
45 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
46
47 #define CONFIG_SYS_L2_SIZE      (256 << 10)
48
49 #define CONFIG_LAST_STAGE_INIT
50
51 #endif
52
53 #if defined(CONFIG_TARGET_UCP1020)
54
55 #define CONFIG_UCP1020
56 #define CONFIG_UCP1020_REV_1_3
57
58 #define CONFIG_BOARDNAME_LOCAL "uCP1020-64EEE512-OU1-XR"
59
60 #define CONFIG_TSEC_ENET
61 #define CONFIG_TSEC1
62 #define CONFIG_TSEC2
63 #define CONFIG_TSEC3
64 #define CONFIG_HAS_ETH0
65 #define CONFIG_HAS_ETH1
66 #define CONFIG_HAS_ETH2
67 #define CONFIG_ETHADDR          00:06:3B:FF:FF:FF
68 #define CONFIG_ETH1ADDR         00:06:3B:FF:FF:FE
69 #define CONFIG_ETH2ADDR         00:06:3B:FF:FF:FD
70 #define CONFIG_IPADDR           192.168.1.81
71 #define CONFIG_IPADDR1          192.168.1.82
72 #define CONFIG_IPADDR2          192.168.1.83
73 #define CONFIG_SERVERIP         192.168.1.80
74 #define CONFIG_GATEWAYIP        102.168.1.1
75 #define CONFIG_NETMASK          255.255.255.0
76 #define CONFIG_ETHPRIME         "eTSEC1"
77
78 #ifndef CONFIG_SPI_FLASH
79 #endif
80 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
81
82 #define CONFIG_SYS_L2_SIZE      (256 << 10)
83
84 #define CONFIG_LAST_STAGE_INIT
85
86 #endif
87
88 #ifdef CONFIG_SDCARD
89 #define CONFIG_RAMBOOT_SDCARD
90 #define CONFIG_SYS_RAMBOOT
91 #define CONFIG_SYS_EXTRA_ENV_RELOC
92 #define CONFIG_SYS_TEXT_BASE            0x11000000
93 #define CONFIG_RESET_VECTOR_ADDRESS     0x1107fffc
94 #endif
95
96 #ifdef CONFIG_SPIFLASH
97 #define CONFIG_RAMBOOT_SPIFLASH
98 #define CONFIG_SYS_RAMBOOT
99 #define CONFIG_SYS_EXTRA_ENV_RELOC
100 #define CONFIG_SYS_TEXT_BASE            0x11000000
101 #define CONFIG_RESET_VECTOR_ADDRESS     0x1107fffc
102 #endif
103
104 #ifndef CONFIG_SYS_TEXT_BASE
105 #define CONFIG_SYS_TEXT_BASE            0xeff80000
106 #endif
107 #define CONFIG_SYS_TEXT_BASE_NOR        0xeff80000
108
109 #ifndef CONFIG_RESET_VECTOR_ADDRESS
110 #define CONFIG_RESET_VECTOR_ADDRESS     0xeffffffc
111 #endif
112
113 #ifndef CONFIG_SYS_MONITOR_BASE
114 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE    /* start of monitor */
115 #endif
116
117 #define CONFIG_MP
118
119 #define CONFIG_ENV_OVERWRITE
120
121 #define CONFIG_SATA_SIL
122 #define CONFIG_SYS_SATA_MAX_DEVICE      2
123 #define CONFIG_LIBATA
124 #define CONFIG_LBA48
125
126 #define CONFIG_SYS_CLK_FREQ     66666666
127 #define CONFIG_DDR_CLK_FREQ     66666666
128
129 #define CONFIG_HWCONFIG
130
131 /*
132  * These can be toggled for performance analysis, otherwise use default.
133  */
134 #define CONFIG_L2_CACHE
135 #define CONFIG_BTB
136
137 #define CONFIG_ENABLE_36BIT_PHYS
138
139 #define CONFIG_SYS_MEMTEST_START        0x00200000      /* memtest works on */
140 #define CONFIG_SYS_MEMTEST_END          0x1fffffff
141 #define CONFIG_PANIC_HANG       /* do not reset board on panic */
142
143 #define CONFIG_SYS_CCSRBAR              0xffe00000
144 #define CONFIG_SYS_CCSRBAR_PHYS_LOW     CONFIG_SYS_CCSRBAR
145
146 /* IN case of NAND bootloader relocate CCSRBAR in RAMboot code not in the 4k
147        SPL code*/
148 #ifdef CONFIG_SPL_BUILD
149 #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
150 #endif
151
152 /* DDR Setup */
153 #define CONFIG_DDR_ECC_ENABLE
154 #ifndef CONFIG_DDR_ECC_ENABLE
155 #define CONFIG_SYS_DDR_RAW_TIMING
156 #define CONFIG_DDR_SPD
157 #endif
158 #define CONFIG_SYS_SPD_BUS_NUM 1
159 #undef CONFIG_FSL_DDR_INTERACTIVE
160
161 #define CONFIG_SYS_SDRAM_SIZE_LAW       LAW_SIZE_512M
162 #define CONFIG_CHIP_SELECTS_PER_CTRL    1
163 #define CONFIG_SYS_SDRAM_SIZE           (1u << (CONFIG_SYS_SDRAM_SIZE_LAW - 19))
164 #define CONFIG_SYS_DDR_SDRAM_BASE       0x00000000
165 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
166
167 #define CONFIG_DIMM_SLOTS_PER_CTLR      1
168
169 /* Default settings for DDR3 */
170 #define CONFIG_SYS_DDR_CS0_BNDS         0x0000003f
171 #define CONFIG_SYS_DDR_CS0_CONFIG       0x80014302
172 #define CONFIG_SYS_DDR_CS0_CONFIG_2     0x00000000
173 #define CONFIG_SYS_DDR_CS1_BNDS         0x0040007f
174 #define CONFIG_SYS_DDR_CS1_CONFIG       0x80014302
175 #define CONFIG_SYS_DDR_CS1_CONFIG_2     0x00000000
176
177 #define CONFIG_SYS_DDR_DATA_INIT        0xdeadbeef
178 #define CONFIG_SYS_DDR_INIT_ADDR        0x00000000
179 #define CONFIG_SYS_DDR_INIT_EXT_ADDR    0x00000000
180 #define CONFIG_SYS_DDR_MODE_CONTROL     0x00000000
181
182 #define CONFIG_SYS_DDR_ZQ_CONTROL       0x89080600
183 #define CONFIG_SYS_DDR_WRLVL_CONTROL    0x8655A608
184 #define CONFIG_SYS_DDR_SR_CNTR          0x00000000
185 #define CONFIG_SYS_DDR_RCW_1            0x00000000
186 #define CONFIG_SYS_DDR_RCW_2            0x00000000
187 #ifdef CONFIG_DDR_ECC_ENABLE
188 #define CONFIG_SYS_DDR_CONTROL          0xE70C0000      /* Type = DDR3 & ECC */
189 #else
190 #define CONFIG_SYS_DDR_CONTROL          0xC70C0000      /* Type = DDR3 */
191 #endif
192 #define CONFIG_SYS_DDR_CONTROL_2        0x04401050
193 #define CONFIG_SYS_DDR_TIMING_4         0x00220001
194 #define CONFIG_SYS_DDR_TIMING_5         0x03402400
195
196 #define CONFIG_SYS_DDR_TIMING_3         0x00020000
197 #define CONFIG_SYS_DDR_TIMING_0         0x00330004
198 #define CONFIG_SYS_DDR_TIMING_1         0x6f6B4846
199 #define CONFIG_SYS_DDR_TIMING_2         0x0FA8C8CF
200 #define CONFIG_SYS_DDR_CLK_CTRL         0x03000000
201 #define CONFIG_SYS_DDR_MODE_1           0x40461520
202 #define CONFIG_SYS_DDR_MODE_2           0x8000c000
203 #define CONFIG_SYS_DDR_INTERVAL         0x0C300000
204
205 #undef CONFIG_CLOCKS_IN_MHZ
206
207 /*
208  * Memory map
209  *
210  * 0x0000_0000 0x7fff_ffff      DDR             Up to 2GB cacheable
211  * 0x8000_0000 0xdfff_ffff      PCI Express Mem 1G non-cacheable(PCIe * 2)
212  * 0xec00_0000 0xefff_ffff      NOR flash       Up to 64M non-cacheable CS0/1
213  * 0xf8f8_0000 0xf8ff_ffff      L2 SRAM         Up to 256K cacheable
214  *   (early boot only)
215  * 0xffc0_0000 0xffc3_ffff      PCI IO range    256k non-cacheable
216  * 0xffd0_0000 0xffd0_3fff      L1 for stack    16K cacheable
217  * 0xffe0_0000 0xffef_ffff      CCSR            1M non-cacheable
218  */
219
220 /*
221  * Local Bus Definitions
222  */
223 #define CONFIG_SYS_MAX_FLASH_SECT       512     /* 64M */
224 #define CONFIG_SYS_FLASH_BASE           0xec000000
225
226 #define CONFIG_SYS_FLASH_BASE_PHYS      CONFIG_SYS_FLASH_BASE
227
228 #define CONFIG_FLASH_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) \
229         | BR_PS_16 | BR_V)
230
231 #define CONFIG_FLASH_OR_PRELIM          0xfc000ff7
232
233 #define CONFIG_SYS_FLASH_BANKS_LIST     {CONFIG_SYS_FLASH_BASE_PHYS}
234 #define CONFIG_SYS_FLASH_QUIET_TEST
235 #define CONFIG_FLASH_SHOW_PROGRESS      45      /* count down from 45/5: 9..1 */
236
237 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* number of banks */
238
239 #undef CONFIG_SYS_FLASH_CHECKSUM
240 #define CONFIG_SYS_FLASH_ERASE_TOUT     60000   /* Flash Erase Timeout (ms) */
241 #define CONFIG_SYS_FLASH_WRITE_TOUT     500     /* Flash Write Timeout (ms) */
242
243 #define CONFIG_FLASH_CFI_DRIVER
244 #define CONFIG_SYS_FLASH_CFI
245 #define CONFIG_SYS_FLASH_EMPTY_INFO
246 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
247
248 #define CONFIG_BOARD_EARLY_INIT_R       /* call board_early_init_r function */
249
250 #define CONFIG_SYS_INIT_RAM_LOCK
251 #define CONFIG_SYS_INIT_RAM_ADDR        0xffd00000 /* stack in RAM */
252 /* Initial L1 address */
253 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS   CONFIG_SYS_INIT_RAM_ADDR
254 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0
255 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR_PHYS
256 /* Size of used area in RAM */
257 #define CONFIG_SYS_INIT_RAM_SIZE        0x00004000
258
259 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - \
260                                         GENERATED_GBL_DATA_SIZE)
261 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
262
263 #define CONFIG_SYS_MONITOR_LEN  (256 * 1024)/* Reserve 256 kB for Mon */
264 #define CONFIG_SYS_MALLOC_LEN   (1024 * 1024)/* Reserved for malloc */
265
266 #define CONFIG_SYS_PMC_BASE     0xff980000
267 #define CONFIG_SYS_PMC_BASE_PHYS        CONFIG_SYS_PMC_BASE
268 #define CONFIG_PMC_BR_PRELIM    (BR_PHYS_ADDR(CONFIG_SYS_PMC_BASE_PHYS) | \
269                                         BR_PS_8 | BR_V)
270 #define CONFIG_PMC_OR_PRELIM    (OR_AM_64KB | OR_GPCM_CSNT | OR_GPCM_XACS | \
271                                  OR_GPCM_SCY | OR_GPCM_TRLX | OR_GPCM_EHTR | \
272                                  OR_GPCM_EAD)
273
274 #define CONFIG_SYS_BR0_PRELIM   CONFIG_FLASH_BR_PRELIM  /* NOR Base Address */
275 #define CONFIG_SYS_OR0_PRELIM   CONFIG_FLASH_OR_PRELIM  /* NOR Options */
276 #ifdef CONFIG_NAND_FSL_ELBC
277 #define CONFIG_SYS_BR1_PRELIM   CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Addr */
278 #define CONFIG_SYS_OR1_PRELIM   CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
279 #endif
280
281 /* Serial Port - controlled on board with jumper J8
282  * open - index 2
283  * shorted - index 1
284  */
285 #define CONFIG_CONS_INDEX               1
286 #undef CONFIG_SERIAL_SOFTWARE_FIFO
287 #define CONFIG_SYS_NS16550_SERIAL
288 #define CONFIG_SYS_NS16550_REG_SIZE     1
289 #define CONFIG_SYS_NS16550_CLK          get_bus_freq(0)
290 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_INIT_MINIMAL)
291 #define CONFIG_NS16550_MIN_FUNCTIONS
292 #endif
293
294 #define CONFIG_SYS_BAUDRATE_TABLE       \
295         {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
296
297 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR + 0x4500)
298 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR + 0x4600)
299
300 /* I2C */
301 #define CONFIG_SYS_I2C
302 #define CONFIG_SYS_I2C_FSL
303 #define CONFIG_SYS_FSL_I2C_SPEED        400000
304 #define CONFIG_SYS_FSL_I2C_SLAVE        0x7F
305 #define CONFIG_SYS_FSL_I2C_OFFSET       0x3000
306 #define CONFIG_SYS_FSL_I2C2_SPEED       400000
307 #define CONFIG_SYS_FSL_I2C2_SLAVE       0x7F
308 #define CONFIG_SYS_FSL_I2C2_OFFSET      0x3100
309 #define CONFIG_SYS_I2C_NOPROBES         { {0, 0x29} }
310 #define CONFIG_SYS_SPD_BUS_NUM          1 /* For rom_loc and flash bank */
311
312 #define CONFIG_RTC_DS1337
313 #define CONFIG_RTC_DS1337_NOOSC
314 #define CONFIG_SYS_I2C_RTC_ADDR         0x68
315 #define CONFIG_SYS_I2C_PCA9557_ADDR     0x18
316 #define CONFIG_SYS_I2C_NCT72_ADDR       0x4C
317 #define CONFIG_SYS_I2C_IDT6V49205B      0x69
318
319 /*
320  * eSPI - Enhanced SPI
321  */
322 #define CONFIG_HARD_SPI
323
324 #define CONFIG_SF_DEFAULT_SPEED         10000000
325 #define CONFIG_SF_DEFAULT_MODE          SPI_MODE_0
326
327 #if defined(CONFIG_PCI)
328 /*
329  * General PCI
330  * Memory space is mapped 1-1, but I/O space must start from 0.
331  */
332
333 /* controller 2, direct to uli, tgtid 2, Base address 9000 */
334 #define CONFIG_SYS_PCIE2_NAME           "PCIe SLOT CON9"
335 #define CONFIG_SYS_PCIE2_MEM_VIRT       0xa0000000
336 #define CONFIG_SYS_PCIE2_MEM_BUS        0xa0000000
337 #define CONFIG_SYS_PCIE2_MEM_PHYS       0xa0000000
338 #define CONFIG_SYS_PCIE2_MEM_SIZE       0x20000000      /* 512M */
339 #define CONFIG_SYS_PCIE2_IO_VIRT        0xffc10000
340 #define CONFIG_SYS_PCIE2_IO_BUS         0x00000000
341 #define CONFIG_SYS_PCIE2_IO_PHYS        0xffc10000
342 #define CONFIG_SYS_PCIE2_IO_SIZE        0x00010000      /* 64k */
343
344 /* controller 1, Slot 2, tgtid 1, Base address a000 */
345 #define CONFIG_SYS_PCIE1_NAME           "PCIe SLOT CON10"
346 #define CONFIG_SYS_PCIE1_MEM_VIRT       0x80000000
347 #define CONFIG_SYS_PCIE1_MEM_BUS        0x80000000
348 #define CONFIG_SYS_PCIE1_MEM_PHYS       0x80000000
349 #define CONFIG_SYS_PCIE1_MEM_SIZE       0x20000000      /* 512M */
350 #define CONFIG_SYS_PCIE1_IO_VIRT        0xffc00000
351 #define CONFIG_SYS_PCIE1_IO_BUS         0x00000000
352 #define CONFIG_SYS_PCIE1_IO_PHYS        0xffc00000
353 #define CONFIG_SYS_PCIE1_IO_SIZE        0x00010000      /* 64k */
354
355 #define CONFIG_CMD_PCI
356
357 #define CONFIG_PCI_SCAN_SHOW    /* show pci devices on startup */
358 #endif /* CONFIG_PCI */
359
360 /*
361  * Environment
362  */
363 #ifdef CONFIG_ENV_FIT_UCBOOT
364
365 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + 0x20000)
366 #define CONFIG_ENV_SIZE         0x20000
367 #define CONFIG_ENV_SECT_SIZE    0x20000 /* 128K (one sector) */
368
369 #else
370
371 #define CONFIG_ENV_SPI_BUS      0
372 #define CONFIG_ENV_SPI_CS       0
373 #define CONFIG_ENV_SPI_MAX_HZ   10000000
374 #define CONFIG_ENV_SPI_MODE     0
375
376 #ifdef CONFIG_RAMBOOT_SPIFLASH
377
378 #define CONFIG_ENV_SIZE         0x3000          /* 12KB */
379 #define CONFIG_ENV_OFFSET       0x2000          /* 8KB */
380 #define CONFIG_ENV_SECT_SIZE    0x1000
381
382 #if defined(CONFIG_SYS_REDUNDAND_ENVIRONMENT)
383 /* Address and size of Redundant Environment Sector     */
384 #define CONFIG_ENV_OFFSET_REDUND        (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
385 #define CONFIG_ENV_SIZE_REDUND          CONFIG_ENV_SIZE
386 #endif
387
388 #elif defined(CONFIG_RAMBOOT_SDCARD)
389 #define CONFIG_FSL_FIXED_MMC_LOCATION
390 #define CONFIG_ENV_SIZE         0x2000
391 #define CONFIG_SYS_MMC_ENV_DEV  0
392
393 #elif defined(CONFIG_SYS_RAMBOOT)
394 #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE - 0x1000)
395 #define CONFIG_ENV_SIZE         0x2000
396
397 #else
398 #define CONFIG_ENV_BASE         (CONFIG_SYS_FLASH_BASE)
399 #define CONFIG_ENV_SECT_SIZE    0x20000 /* 128K (one sector) */
400 #define CONFIG_ENV_SIZE         CONFIG_ENV_SECT_SIZE
401 #define CONFIG_ENV_ADDR         (CONFIG_ENV_BASE + 0xC0000)
402 #if defined(CONFIG_SYS_REDUNDAND_ENVIRONMENT)
403 /* Address and size of Redundant Environment Sector     */
404 #define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR + CONFIG_ENV_SIZE)
405 #define CONFIG_ENV_SIZE_REDUND  CONFIG_ENV_SIZE
406 #endif
407
408 #endif
409
410 #endif  /* CONFIG_ENV_FIT_UCBOOT */
411
412 #define CONFIG_LOADS_ECHO               /* echo on for serial download */
413 #define CONFIG_SYS_LOADS_BAUD_CHANGE    /* allow baudrate change */
414
415 /*
416  * Command line configuration.
417  */
418 #define CONFIG_CMD_REGINFO
419
420 /*
421  * USB
422  */
423 #define CONFIG_HAS_FSL_DR_USB
424
425 #if defined(CONFIG_HAS_FSL_DR_USB)
426 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
427
428 #ifdef CONFIG_USB_EHCI_HCD
429 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
430 #define CONFIG_USB_EHCI_FSL
431 #endif
432 #endif
433
434 #undef CONFIG_WATCHDOG                  /* watchdog disabled */
435
436 #ifdef CONFIG_MMC
437 #define CONFIG_FSL_ESDHC
438 #define CONFIG_SYS_FSL_ESDHC_ADDR       CONFIG_SYS_MPC85xx_ESDHC_ADDR
439 #define CONFIG_MMC_SPI
440 #define CONFIG_CMD_MMC_SPI
441 #endif
442
443 /* Misc Extra Settings */
444 #undef CONFIG_WATCHDOG  /* watchdog disabled */
445
446 /*
447  * Miscellaneous configurable options
448  */
449 #define CONFIG_SYS_LONGHELP                     /* undef to save memory */
450 #define CONFIG_CMDLINE_EDITING                  /* Command-line editing */
451 #define CONFIG_SYS_LOAD_ADDR    0x2000000       /* default load address */
452 #if defined(CONFIG_CMD_KGDB)
453 #define CONFIG_SYS_CBSIZE       1024            /* Console I/O Buffer Size */
454 #else
455 #define CONFIG_SYS_CBSIZE       256             /* Console I/O Buffer Size */
456 #endif
457 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
458         /* Print Buffer Size */
459 #define CONFIG_SYS_MAXARGS      16      /* max number of command args */
460 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */
461 #define CONFIG_SYS_HZ           1000    /* decrementer freq: 1ms tick */
462
463 /*
464  * For booting Linux, the board info and command line data
465  * have to be in the first 64 MB of memory, since this is
466  * the maximum mapped by the Linux kernel during initialization.
467  */
468 #define CONFIG_SYS_BOOTMAPSZ    (64 << 20)      /* Initial Memory for Linux*/
469 #define CONFIG_SYS_BOOTM_LEN    (64 << 20)      /* Increase max gunzip size */
470
471 #if defined(CONFIG_CMD_KGDB)
472 #define CONFIG_KGDB_BAUDRATE    230400  /* speed to run kgdb serial port */
473 #define CONFIG_KGDB_SER_INDEX   2       /* which serial port to use */
474 #endif
475
476 /*
477  * Environment Configuration
478  */
479
480 #if defined(CONFIG_TSEC_ENET)
481
482 #if defined(CONFIG_UCP1020_REV_1_2)
483 #define CONFIG_PHY_MICREL_KSZ9021
484 #elif defined(CONFIG_UCP1020_REV_1_3)
485 #define CONFIG_PHY_MICREL_KSZ9031
486 #else
487 #error "UCP1020 module revision is not defined !!!"
488 #endif
489
490 #define CONFIG_BOOTP_SERVERIP
491
492 #define CONFIG_MII              /* MII PHY management */
493 #define CONFIG_TSEC1_NAME       "eTSEC1"
494 #define CONFIG_TSEC2_NAME       "eTSEC2"
495 #define CONFIG_TSEC3_NAME       "eTSEC3"
496
497 #define TSEC1_PHY_ADDR  4
498 #define TSEC2_PHY_ADDR  0
499 #define TSEC2_PHY_ADDR_SGMII    0x00
500 #define TSEC3_PHY_ADDR  6
501
502 #define TSEC1_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
503 #define TSEC2_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
504 #define TSEC3_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
505
506 #define TSEC1_PHYIDX    0
507 #define TSEC2_PHYIDX    0
508 #define TSEC3_PHYIDX    0
509
510 #define CONFIG_PHY_GIGE 1       /* Include GbE speed/duplex detection */
511
512 #endif
513
514 #define CONFIG_HOSTNAME         UCP1020
515 #define CONFIG_ROOTPATH         "/opt/nfsroot"
516 #define CONFIG_BOOTFILE         "uImage"
517 #define CONFIG_UBOOTPATH        u-boot.bin /* U-Boot image on TFTP server */
518
519 /* default location for tftp and bootm */
520 #define CONFIG_LOADADDR         1000000
521
522 #define CONFIG_BOOTARGS /* the boot command will set bootargs */
523
524 #if defined(CONFIG_DONGLE)
525
526 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
527 "bootcmd=run prog_spi_mbrbootcramfs\0"                                  \
528 "bootfile=uImage\0"                                                     \
529 "consoledev=ttyS0\0"                                                    \
530 "cramfsfile=image.cramfs\0"                                             \
531 "dtbaddr=0x00c00000\0"                                                  \
532 "dtbfile=image.dtb\0"                                                   \
533 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
534 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
535 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
536 "fileaddr=0x01000000\0"                                                 \
537 "filesize=0x00080000\0"                                                 \
538 "flashmbr=sf probe 0; "                                                 \
539         "tftp $loadaddr $mbr; "                                         \
540         "sf erase $mbr_offset +$filesize; "                             \
541         "sf write $loadaddr $mbr_offset $filesize\0"                    \
542 "flashrecovery=tftp $recoveryaddr $cramfsfile; "                        \
543         "protect off $nor_recoveryaddr +$filesize; "                    \
544         "erase $nor_recoveryaddr +$filesize; "                          \
545         "cp.b $recoveryaddr $nor_recoveryaddr $filesize; "              \
546         "protect on $nor_recoveryaddr +$filesize\0 "                    \
547 "flashuboot=tftp $ubootaddr $ubootfile; "                               \
548         "protect off $nor_ubootaddr +$filesize; "                       \
549         "erase $nor_ubootaddr +$filesize; "                             \
550         "cp.b $ubootaddr $nor_ubootaddr $filesize; "                    \
551         "protect on $nor_ubootaddr +$filesize\0 "                       \
552 "flashworking=tftp $workingaddr $cramfsfile; "                          \
553         "protect off $nor_workingaddr +$filesize; "                     \
554         "erase $nor_workingaddr +$filesize; "                           \
555         "cp.b $workingaddr $nor_workingaddr $filesize; "                \
556         "protect on $nor_workingaddr +$filesize\0 "                     \
557 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
558 "kerneladdr=0x01100000\0"                                               \
559 "kernelfile=uImage\0"                                                   \
560 "loadaddr=0x01000000\0"                                                 \
561 "mbr=uCP1020d.mbr\0"                                                    \
562 "mbr_offset=0x00000000\0"                                               \
563 "mmbr=uCP1020Quiet.mbr\0"                                               \
564 "mmcpart=0:2\0"                                                         \
565 "mmc__mbrd=fatload mmc $mmcpart $loadaddr $mbr; "                       \
566         "mmc erase 1 1; "                                               \
567         "mmc write $loadaddr 1 1\0"                                     \
568 "mmc__uboot=fatload mmc $mmcpart $loadaddr $ubootfile; "                \
569         "mmc erase 0x40 0x400; "                                        \
570         "mmc write $loadaddr 0x40 0x400\0"                              \
571 "netdev=eth0\0"                                                         \
572 "nor_recoveryaddr=0xEC0A0000\0"                                         \
573 "nor_ubootaddr=0xEFF80000\0"                                            \
574 "nor_workingaddr=0xECFA0000\0"                                          \
575 "norbootrecovery=setenv bootargs $recoverybootargs"                     \
576         " console=$consoledev,$baudrate $othbootargs; "                 \
577         "run norloadrecovery; "                                         \
578         "bootm $kerneladdr - $dtbaddr\0"                                \
579 "norbootworking=setenv bootargs $workingbootargs"                       \
580         " console=$consoledev,$baudrate $othbootargs; "                 \
581         "run norloadworking; "                                          \
582         "bootm $kerneladdr - $dtbaddr\0"                                \
583 "norloadrecovery=mw.l $kerneladdr 0x0 0x00a00000; "                     \
584         "setenv cramfsaddr $nor_recoveryaddr; "                         \
585         "cramfsload $dtbaddr $dtbfile; "                                \
586         "cramfsload $kerneladdr $kernelfile\0"                          \
587 "norloadworking=mw.l $kerneladdr 0x0 0x00a00000; "                      \
588         "setenv cramfsaddr $nor_workingaddr; "                          \
589         "cramfsload $dtbaddr $dtbfile; "                                \
590         "cramfsload $kerneladdr $kernelfile\0"                          \
591 "prog_spi_mbr=run spi__mbr\0"                                           \
592 "prog_spi_mbrboot=run spi__mbr; run spi__boot1; run spi__boot2\0"       \
593 "prog_spi_mbrbootcramfs=run spi__mbr; run spi__boot1; run spi__boot2; " \
594         "run spi__cramfs\0"                                             \
595 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
596         " console=$consoledev,$baudrate $othbootargs; "                 \
597         "tftp $rootfsaddr $rootfsfile; "                                \
598         "tftp $loadaddr $kernelfile; "                                  \
599         "tftp $dtbaddr $dtbfile; "                                      \
600         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
601 "ramdisk_size=120000\0"                                                 \
602 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
603 "recoveryaddr=0x02F00000\0"                                             \
604 "recoverybootargs=root=/dev/mtdblock0 rootfstype=cramfs ro\0"           \
605 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
606         "mw.l 0xffe0f008 0x00400000\0"                                  \
607 "rootfsaddr=0x02F00000\0"                                               \
608 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
609 "rootpath=/opt/nfsroot\0"                                               \
610 "spi__boot1=fatload mmc $mmcpart $loadaddr u-boot.bin; "                \
611         "protect off 0xeC000000 +$filesize; "                           \
612         "erase 0xEC000000 +$filesize; "                                 \
613         "cp.b $loadaddr 0xEC000000 $filesize; "                         \
614         "cmp.b $loadaddr 0xEC000000 $filesize; "                        \
615         "protect on 0xeC000000 +$filesize\0"                            \
616 "spi__boot2=fatload mmc $mmcpart $loadaddr u-boot.bin; "                \
617         "protect off 0xeFF80000 +$filesize; "                           \
618         "erase 0xEFF80000 +$filesize; "                                 \
619         "cp.b $loadaddr 0xEFF80000 $filesize; "                         \
620         "cmp.b $loadaddr 0xEFF80000 $filesize; "                        \
621         "protect on 0xeFF80000 +$filesize\0"                            \
622 "spi__bootd=fatload mmc $mmcpart $loadaddr $ubootd; "                   \
623         "sf probe 0; sf erase 0x8000 +$filesize; "                      \
624         "sf write $loadaddr 0x8000 $filesize\0"                         \
625 "spi__cramfs=fatload mmc $mmcpart $loadaddr image.cramfs; "             \
626         "protect off 0xec0a0000 +$filesize; "                           \
627         "erase 0xeC0A0000 +$filesize; "                                 \
628         "cp.b $loadaddr 0xeC0A0000 $filesize; "                         \
629         "protect on 0xec0a0000 +$filesize\0"                            \
630 "spi__mbr=fatload mmc $mmcpart $loadaddr $mmbr; "                       \
631         "sf probe 1; sf erase 0 +$filesize; "                           \
632         "sf write $loadaddr 0 $filesize\0"                              \
633 "spi__mbrd=fatload mmc $mmcpart $loadaddr $mbr; "                       \
634         "sf probe 0; sf erase 0 +$filesize; "                           \
635         "sf write $loadaddr 0 $filesize\0"                              \
636 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
637         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
638         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
639         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
640         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
641         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
642 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
643 "ubootaddr=0x01000000\0"                                                \
644 "ubootfile=u-boot.bin\0"                                                \
645 "ubootd=u-boot4dongle.bin\0"                                            \
646 "upgrade=run flashworking\0"                                            \
647 "usb_phy_type=ulpi\0 "                                                  \
648 "workingaddr=0x02F00000\0"                                              \
649 "workingbootargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"
650
651 #else
652
653 #if defined(CONFIG_UCP1020T1)
654
655 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
656 "bootcmd=run releasefpga; run norbootworking || run norbootrecovery\0"  \
657 "bootfile=uImage\0"                                                     \
658 "consoledev=ttyS0\0"                                                    \
659 "cramfsfile=image.cramfs\0"                                             \
660 "dtbaddr=0x00c00000\0"                                                  \
661 "dtbfile=image.dtb\0"                                                   \
662 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
663 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
664 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
665 "fileaddr=0x01000000\0"                                                 \
666 "filesize=0x00080000\0"                                                 \
667 "flashmbr=sf probe 0; "                                                 \
668         "tftp $loadaddr $mbr; "                                         \
669         "sf erase $mbr_offset +$filesize; "                             \
670         "sf write $loadaddr $mbr_offset $filesize\0"                    \
671 "flashrecovery=tftp $recoveryaddr $cramfsfile; "                        \
672         "protect off $nor_recoveryaddr +$filesize; "                    \
673         "erase $nor_recoveryaddr +$filesize; "                          \
674         "cp.b $recoveryaddr $nor_recoveryaddr $filesize; "              \
675         "protect on $nor_recoveryaddr +$filesize\0 "                    \
676 "flashuboot=tftp $ubootaddr $ubootfile; "                               \
677         "protect off $nor_ubootaddr +$filesize; "                       \
678         "erase $nor_ubootaddr +$filesize; "                             \
679         "cp.b $ubootaddr $nor_ubootaddr $filesize; "                    \
680         "protect on $nor_ubootaddr +$filesize\0 "                       \
681 "flashworking=tftp $workingaddr $cramfsfile; "                          \
682         "protect off $nor_workingaddr +$filesize; "                     \
683         "erase $nor_workingaddr +$filesize; "                           \
684         "cp.b $workingaddr $nor_workingaddr $filesize; "                \
685         "protect on $nor_workingaddr +$filesize\0 "                     \
686 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
687 "kerneladdr=0x01100000\0"                                               \
688 "kernelfile=uImage\0"                                                   \
689 "loadaddr=0x01000000\0"                                                 \
690 "mbr=uCP1020.mbr\0"                                                     \
691 "mbr_offset=0x00000000\0"                                               \
692 "netdev=eth0\0"                                                         \
693 "nor_recoveryaddr=0xEC0A0000\0"                                         \
694 "nor_ubootaddr=0xEFF80000\0"                                            \
695 "nor_workingaddr=0xECFA0000\0"                                          \
696 "norbootrecovery=setenv bootargs $recoverybootargs"                     \
697         " console=$consoledev,$baudrate $othbootargs; "                 \
698         "run norloadrecovery; "                                         \
699         "bootm $kerneladdr - $dtbaddr\0"                                \
700 "norbootworking=setenv bootargs $workingbootargs"                       \
701         " console=$consoledev,$baudrate $othbootargs; "                 \
702         "run norloadworking; "                                          \
703         "bootm $kerneladdr - $dtbaddr\0"                                \
704 "norloadrecovery=mw.l $kerneladdr 0x0 0x00a00000; "                     \
705         "setenv cramfsaddr $nor_recoveryaddr; "                         \
706         "cramfsload $dtbaddr $dtbfile; "                                \
707         "cramfsload $kerneladdr $kernelfile\0"                          \
708 "norloadworking=mw.l $kerneladdr 0x0 0x00a00000; "                      \
709         "setenv cramfsaddr $nor_workingaddr; "                          \
710         "cramfsload $dtbaddr $dtbfile; "                                \
711         "cramfsload $kerneladdr $kernelfile\0"                          \
712 "othbootargs=quiet\0"                                                   \
713 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
714         " console=$consoledev,$baudrate $othbootargs; "                 \
715         "tftp $rootfsaddr $rootfsfile; "                                \
716         "tftp $loadaddr $kernelfile; "                                  \
717         "tftp $dtbaddr $dtbfile; "                                      \
718         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
719 "ramdisk_size=120000\0"                                                 \
720 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
721 "recoveryaddr=0x02F00000\0"                                             \
722 "recoverybootargs=root=/dev/mtdblock0 rootfstype=cramfs ro\0"           \
723 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
724         "mw.l 0xffe0f008 0x00400000\0"                                  \
725 "rootfsaddr=0x02F00000\0"                                               \
726 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
727 "rootpath=/opt/nfsroot\0"                                               \
728 "silent=1\0"                                                            \
729 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
730         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
731         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
732         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
733         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
734         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
735 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
736 "ubootaddr=0x01000000\0"                                                \
737 "ubootfile=u-boot.bin\0"                                                \
738 "upgrade=run flashworking\0"                                            \
739 "workingaddr=0x02F00000\0"                                              \
740 "workingbootargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"
741
742 #else /* For Arcturus Modules */
743
744 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
745 "bootcmd=run norkernel\0"                                               \
746 "bootfile=uImage\0"                                                     \
747 "consoledev=ttyS0\0"                                                    \
748 "dtbaddr=0x00c00000\0"                                                  \
749 "dtbfile=image.dtb\0"                                                   \
750 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
751 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
752 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
753 "fileaddr=0x01000000\0"                                                 \
754 "filesize=0x00080000\0"                                                 \
755 "flashmbr=sf probe 0; "                                                 \
756         "tftp $loadaddr $mbr; "                                         \
757         "sf erase $mbr_offset +$filesize; "                             \
758         "sf write $loadaddr $mbr_offset $filesize\0"                    \
759 "flashuboot=tftp $loadaddr $ubootfile; "                                \
760         "protect off $nor_ubootaddr0 +$filesize; "                      \
761         "erase $nor_ubootaddr0 +$filesize; "                            \
762         "cp.b $loadaddr $nor_ubootaddr0 $filesize; "                    \
763         "protect on $nor_ubootaddr0 +$filesize; "                       \
764         "protect off $nor_ubootaddr1 +$filesize; "                      \
765         "erase $nor_ubootaddr1 +$filesize; "                            \
766         "cp.b $loadaddr $nor_ubootaddr1 $filesize; "                    \
767         "protect on $nor_ubootaddr1 +$filesize\0 "                      \
768 "format0=protect off $part0base +$part0size; "                          \
769         "erase $part0base +$part0size\0"                                \
770 "format1=protect off $part1base +$part1size; "                          \
771         "erase $part1base +$part1size\0"                                \
772 "format2=protect off $part2base +$part2size; "                          \
773         "erase $part2base +$part2size\0"                                \
774 "format3=protect off $part3base +$part3size; "                          \
775         "erase $part3base +$part3size\0"                                \
776 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
777 "kerneladdr=0x01100000\0"                                               \
778 "kernelargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"                 \
779 "kernelfile=uImage\0"                                                   \
780 "loadaddr=0x01000000\0"                                                 \
781 "mbr=uCP1020.mbr\0"                                                     \
782 "mbr_offset=0x00000000\0"                                               \
783 "netdev=eth0\0"                                                         \
784 "nor_ubootaddr0=0xEC000000\0"                                           \
785 "nor_ubootaddr1=0xEFF80000\0"                                           \
786 "norkernel=setenv bootargs $kernelargs console=$consoledev,$baudrate; " \
787         "run norkernelload; "                                           \
788         "bootm $kerneladdr - $dtbaddr\0"                                \
789 "norkernelload=mw.l $kerneladdr 0x0 0x00a00000; "                       \
790         "setenv cramfsaddr $part0base; "                                \
791         "cramfsload $dtbaddr $dtbfile; "                                \
792         "cramfsload $kerneladdr $kernelfile\0"                          \
793 "part0base=0xEC100000\0"                                                \
794 "part0size=0x00700000\0"                                                \
795 "part1base=0xEC800000\0"                                                \
796 "part1size=0x02000000\0"                                                \
797 "part2base=0xEE800000\0"                                                \
798 "part2size=0x00800000\0"                                                \
799 "part3base=0xEF000000\0"                                                \
800 "part3size=0x00F80000\0"                                                \
801 "partENVbase=0xEC080000\0"                                              \
802 "partENVsize=0x00080000\0"                                              \
803 "program0=tftp part0-000000.bin; "                                      \
804         "protect off $part0base +$filesize; "                           \
805         "erase $part0base +$filesize; "                                 \
806         "cp.b $loadaddr $part0base $filesize; "                         \
807         "echo Verifying...; "                                           \
808         "cmp.b $loadaddr $part0base $filesize\0"                        \
809 "program1=tftp part1-000000.bin; "                                      \
810         "protect off $part1base +$filesize; "                           \
811         "erase $part1base +$filesize; "                                 \
812         "cp.b $loadaddr $part1base $filesize; "                         \
813         "echo Verifying...; "                                           \
814         "cmp.b $loadaddr $part1base $filesize\0"                        \
815 "program2=tftp part2-000000.bin; "                                      \
816         "protect off $part2base +$filesize; "                           \
817         "erase $part2base +$filesize; "                                 \
818         "cp.b $loadaddr $part2base $filesize; "                         \
819         "echo Verifying...; "                                           \
820         "cmp.b $loadaddr $part2base $filesize\0"                        \
821 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
822         "  console=$consoledev,$baudrate $othbootargs; "                \
823         "tftp $rootfsaddr $rootfsfile; "                                \
824         "tftp $loadaddr $kernelfile; "                                  \
825         "tftp $dtbaddr $dtbfile; "                                      \
826         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
827 "ramdisk_size=120000\0"                                                 \
828 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
829 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
830         "mw.l 0xffe0f008 0x00400000\0"                                  \
831 "rootfsaddr=0x02F00000\0"                                               \
832 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
833 "rootpath=/opt/nfsroot\0"                                               \
834 "spi__mbr=fatload mmc $mmcpart $loadaddr $mmbr; "                       \
835         "sf probe 0; sf erase 0 +$filesize; "                           \
836         "sf write $loadaddr 0 $filesize\0"                              \
837 "spi__boot=fatload mmc $mmcpart $loadaddr u-boot.bin; "                 \
838         "protect off 0xeC000000 +$filesize; "                           \
839         "erase 0xEC000000 +$filesize; "                                 \
840         "cp.b $loadaddr 0xEC000000 $filesize; "                         \
841         "cmp.b $loadaddr 0xEC000000 $filesize; "                        \
842         "protect on 0xeC000000 +$filesize\0"                            \
843 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
844         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
845         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
846         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
847         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
848         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
849 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
850 "ubootfile=u-boot.bin\0"                                                \
851 "upgrade=run flashuboot\0"                                              \
852 "usb_phy_type=ulpi\0 "                                                  \
853 "boot_nfs= "                                                            \
854         "setenv bootargs root=/dev/nfs rw "                             \
855         "nfsroot=$serverip:$rootpath "                                  \
856         "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
857         "console=$consoledev,$baudrate $othbootargs;"                   \
858         "tftp $loadaddr $bootfile;"                                     \
859         "tftp $fdtaddr $fdtfile;"                                       \
860         "bootm $loadaddr - $fdtaddr\0"                                  \
861 "boot_hd = "                                                            \
862         "setenv bootargs root=/dev/$bdev rw rootdelay=30 "              \
863         "console=$consoledev,$baudrate $othbootargs;"                   \
864         "usb start;"                                                    \
865         "ext2load usb 0:1 $loadaddr /boot/$bootfile;"                   \
866         "ext2load usb 0:1 $fdtaddr /boot/$fdtfile;"                     \
867         "bootm $loadaddr - $fdtaddr\0"                                  \
868 "boot_usb_fat = "                                                       \
869         "setenv bootargs root=/dev/ram rw "                             \
870         "console=$consoledev,$baudrate $othbootargs "                   \
871         "ramdisk_size=$ramdisk_size;"                                   \
872         "usb start;"                                                    \
873         "fatload usb 0:2 $loadaddr $bootfile;"                          \
874         "fatload usb 0:2 $fdtaddr $fdtfile;"                            \
875         "fatload usb 0:2 $ramdiskaddr $ramdiskfile;"                    \
876         "bootm $loadaddr $ramdiskaddr $fdtaddr\0 "                      \
877 "boot_usb_ext2 = "                                                      \
878         "setenv bootargs root=/dev/ram rw "                             \
879         "console=$consoledev,$baudrate $othbootargs "                   \
880         "ramdisk_size=$ramdisk_size;"                                   \
881         "usb start;"                                                    \
882         "ext2load usb 0:4 $loadaddr $bootfile;"                         \
883         "ext2load usb 0:4 $fdtaddr $fdtfile;"                           \
884         "ext2load usb 0:4 $ramdiskaddr $ramdiskfile;"                   \
885         "bootm $loadaddr $ramdiskaddr $fdtaddr\0 "                      \
886 "boot_nor = "                                                           \
887         "setenv bootargs root=/dev/$jffs2nor rw "                       \
888         "console=$consoledev,$baudrate rootfstype=jffs2 $othbootargs;"  \
889         "bootm $norbootaddr - $norfdtaddr\0 "                           \
890 "boot_ram = "                                                           \
891         "setenv bootargs root=/dev/ram rw "                             \
892         "console=$consoledev,$baudrate $othbootargs "                   \
893         "ramdisk_size=$ramdisk_size;"                                   \
894         "tftp $ramdiskaddr $ramdiskfile;"                               \
895         "tftp $loadaddr $bootfile;"                                     \
896         "tftp $fdtaddr $fdtfile;"                                       \
897         "bootm $loadaddr $ramdiskaddr $fdtaddr\0"
898
899 #endif
900 #endif
901
902 #endif /* __CONFIG_H */