include/configs/UCP1020.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright 2013-2019 Arcturus Networks, Inc.
   4  *           https://www.arcturusnetworks.com/products/ucp1020/
   5  * based on include/configs/p1_p2_rdb_pc.h
   6  * original copyright follows:
   7  * Copyright 2009-2011 Freescale Semiconductor, Inc.
   8  */
   9
  10 /*
  11  * QorIQ uCP1020-xx boards configuration file
  12  */
  13 #ifndef __CONFIG_H
  14 #define __CONFIG_H
  15
  16 #include <linux/stringify.h>
  17
  18 /*** Arcturus FirmWare Environment */
  19
  20 #define MAX_SERIAL_SIZE 15
  21 #define MAX_HWADDR_SIZE 17
  22
  23 #define MAX_FWENV_ADDR  4
  24
  25 #define FWENV_MMC       1
  26 #define FWENV_SPI_FLASH 2
  27 #define FWENV_NOR_FLASH 3
  28 /*
  29  #define FWENV_TYPE    FWENV_MMC
  30  #define FWENV_TYPE    FWENV_SPI_FLASH
  31 */
  32 #define FWENV_TYPE      FWENV_NOR_FLASH
  33
  34 #if (FWENV_TYPE == FWENV_MMC)
  35 #ifndef CONFIG_SYS_MMC_ENV_DEV
  36 #define CONFIG_SYS_MMC_ENV_DEV 1
  37 #endif
  38 #define FWENV_ADDR1 -1
  39 #define FWENV_ADDR2 -1
  40 #define FWENV_ADDR3 -1
  41 #define FWENV_ADDR4 -1
  42 #define EMPY_CHAR 0
  43 #endif
  44
  45 #if (FWENV_TYPE == FWENV_SPI_FLASH)
  46 #ifndef CONFIG_SF_DEFAULT_SPEED
  47 #define CONFIG_SF_DEFAULT_SPEED 1000000
  48 #endif
  49 #ifndef CONFIG_SF_DEFAULT_MODE
  50 #define CONFIG_SF_DEFAULT_MODE  SPI_MODE0
  51 #endif
  52 #ifndef CONFIG_SF_DEFAULT_CS
  53 #define CONFIG_SF_DEFAULT_CS    0
  54 #endif
  55 #ifndef CONFIG_SF_DEFAULT_BUS
  56 #define CONFIG_SF_DEFAULT_BUS   0
  57 #endif
  58 #define FWENV_ADDR1 (0x200 - sizeof(smac))
  59 #define FWENV_ADDR2 (0x400 - sizeof(smac))
  60 #define FWENV_ADDR3 (CONFIG_ENV_SECT_SIZE + 0x200 - sizeof(smac))
  61 #define FWENV_ADDR4 (CONFIG_ENV_SECT_SIZE + 0x400 - sizeof(smac))
  62 #define EMPY_CHAR 0xff
  63 #endif
  64
  65 #if (FWENV_TYPE == FWENV_NOR_FLASH)
  66 #define FWENV_ADDR1 0xEC080000
  67 #define FWENV_ADDR2 -1
  68 #define FWENV_ADDR3 -1
  69 #define FWENV_ADDR4 -1
  70 #define EMPY_CHAR 0xff
  71 #endif
  72 /***********************************/
  73
  74 #define CONFIG_PCIE1    /* PCIE controller 1 (slot 1) */
  75 #define CONFIG_PCIE2    /* PCIE controller 2 (slot 2) */
  76 #define CONFIG_FSL_PCI_INIT     /* Use common FSL init code */
  77 #define CONFIG_PCI_INDIRECT_BRIDGE      /* indirect PCI bridge support */
  78 #define CONFIG_SYS_PCI_64BIT    /* enable 64-bit PCI resources */
  79
  80 #if defined(CONFIG_TARTGET_UCP1020T1)
  81
  82 #define CONFIG_UCP1020_REV_1_3
  83
  84 #define CONFIG_BOARDNAME "uCP1020-64EE512-0U1-XR-T1"
  85
  86 #define CONFIG_TSEC1
  87 #define CONFIG_TSEC3
  88 #define CONFIG_HAS_ETH0
  89 #define CONFIG_HAS_ETH1
  90 #define CONFIG_ETHADDR          00:19:D3:FF:FF:FF
  91 #define CONFIG_ETH1ADDR         00:19:D3:FF:FF:FE
  92 #define CONFIG_ETH2ADDR         00:19:D3:FF:FF:FD
  93 #define CONFIG_IPADDR           10.80.41.229
  94 #define CONFIG_SERVERIP         10.80.41.227
  95 #define CONFIG_NETMASK          255.255.252.0
  96 #define CONFIG_ETHPRIME         "eTSEC3"
  97
  98 #define CONFIG_SYS_L2_SIZE      (256 << 10)
  99
 100 #endif
 101
 102 #if defined(CONFIG_TARGET_UCP1020)
 103
 104 #define CONFIG_UCP1020
 105 #define CONFIG_UCP1020_REV_1_3
 106
 107 #define CONFIG_BOARDNAME_LOCAL "uCP1020-64EEE512-OU1-XR"
 108
 109 #define CONFIG_TSEC1
 110 #define CONFIG_TSEC3
 111 #define CONFIG_HAS_ETH0
 112 #define CONFIG_HAS_ETH1
 113 #define CONFIG_HAS_ETH2
 114 #define CONFIG_ETHADDR          00:06:3B:FF:FF:FF
 115 #define CONFIG_ETH1ADDR         00:06:3B:FF:FF:FE
 116 #define CONFIG_ETH2ADDR         00:06:3B:FF:FF:FD
 117 #define CONFIG_IPADDR           192.168.1.81
 118 #define CONFIG_IPADDR1          192.168.1.82
 119 #define CONFIG_IPADDR2          192.168.1.83
 120 #define CONFIG_SERVERIP         192.168.1.80
 121 #define CONFIG_GATEWAYIP        102.168.1.1
 122 #define CONFIG_NETMASK          255.255.255.0
 123 #define CONFIG_ETHPRIME         "eTSEC1"
 124
 125 #define CONFIG_SYS_L2_SIZE      (256 << 10)
 126
 127 #endif
 128
 129 #ifdef CONFIG_SDCARD
 130 #define CONFIG_RAMBOOT_SDCARD
 131 #define CONFIG_SYS_RAMBOOT
 132 #define CONFIG_RESET_VECTOR_ADDRESS     0x1107fffc
 133 #endif
 134
 135 #ifdef CONFIG_SPIFLASH
 136 #define CONFIG_RAMBOOT_SPIFLASH
 137 #define CONFIG_SYS_RAMBOOT
 138 #define CONFIG_RESET_VECTOR_ADDRESS     0x1107fffc
 139 #endif
 140
 141 #define CONFIG_SYS_TEXT_BASE_NOR        0xeff80000
 142
 143 #ifndef CONFIG_RESET_VECTOR_ADDRESS
 144 #define CONFIG_RESET_VECTOR_ADDRESS     0xeffffffc
 145 #endif
 146
 147 #ifndef CONFIG_SYS_MONITOR_BASE
 148 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE    /* start of monitor */
 149 #endif
 150
 151 #define CONFIG_ENV_OVERWRITE
 152
 153 #define CONFIG_SYS_SATA_MAX_DEVICE      2
 154 #define CONFIG_LBA48
 155
 156 #define CONFIG_SYS_CLK_FREQ     66666666
 157 #define CONFIG_DDR_CLK_FREQ     66666666
 158
 159 #define CONFIG_HWCONFIG
 160
 161 /*
 162  * These can be toggled for performance analysis, otherwise use default.
 163  */
 164 #define CONFIG_L2_CACHE
 165 #define CONFIG_BTB
 166
 167 #define CONFIG_ENABLE_36BIT_PHYS
 168
 169 #define CONFIG_SYS_CCSRBAR              0xffe00000
 170 #define CONFIG_SYS_CCSRBAR_PHYS_LOW     CONFIG_SYS_CCSRBAR
 171
 172 /* IN case of NAND bootloader relocate CCSRBAR in RAMboot code not in the 4k
 173        SPL code*/
 174 #ifdef CONFIG_SPL_BUILD
 175 #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
 176 #endif
 177
 178 /* DDR Setup */
 179 #define CONFIG_DDR_ECC_ENABLE
 180 #ifndef CONFIG_DDR_ECC_ENABLE
 181 #define CONFIG_SYS_DDR_RAW_TIMING
 182 #define CONFIG_DDR_SPD
 183 #endif
 184 #define CONFIG_SYS_SPD_BUS_NUM 1
 185
 186 #define CONFIG_SYS_SDRAM_SIZE_LAW       LAW_SIZE_512M
 187 #define CONFIG_CHIP_SELECTS_PER_CTRL    1
 188 #define CONFIG_SYS_SDRAM_SIZE           (1u << (CONFIG_SYS_SDRAM_SIZE_LAW - 19))
 189 #define CONFIG_SYS_DDR_SDRAM_BASE       0x00000000
 190 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
 191
 192 #define CONFIG_DIMM_SLOTS_PER_CTLR      1
 193
 194 /* Default settings for DDR3 */
 195 #define CONFIG_SYS_DDR_CS0_BNDS         0x0000003f
 196 #define CONFIG_SYS_DDR_CS0_CONFIG       0x80014302
 197 #define CONFIG_SYS_DDR_CS0_CONFIG_2     0x00000000
 198 #define CONFIG_SYS_DDR_CS1_BNDS         0x0040007f
 199 #define CONFIG_SYS_DDR_CS1_CONFIG       0x80014302
 200 #define CONFIG_SYS_DDR_CS1_CONFIG_2     0x00000000
 201
 202 #define CONFIG_SYS_DDR_DATA_INIT        0xdeadbeef
 203 #define CONFIG_SYS_DDR_INIT_ADDR        0x00000000
 204 #define CONFIG_SYS_DDR_INIT_EXT_ADDR    0x00000000
 205 #define CONFIG_SYS_DDR_MODE_CONTROL     0x00000000
 206
 207 #define CONFIG_SYS_DDR_ZQ_CONTROL       0x89080600
 208 #define CONFIG_SYS_DDR_WRLVL_CONTROL    0x8655A608
 209 #define CONFIG_SYS_DDR_SR_CNTR          0x00000000
 210 #define CONFIG_SYS_DDR_RCW_1            0x00000000
 211 #define CONFIG_SYS_DDR_RCW_2            0x00000000
 212 #ifdef CONFIG_DDR_ECC_ENABLE
 213 #define CONFIG_SYS_DDR_CONTROL          0xE70C0000      /* Type = DDR3 & ECC */
 214 #else
 215 #define CONFIG_SYS_DDR_CONTROL          0xC70C0000      /* Type = DDR3 */
 216 #endif
 217 #define CONFIG_SYS_DDR_CONTROL_2        0x04401050
 218 #define CONFIG_SYS_DDR_TIMING_4         0x00220001
 219 #define CONFIG_SYS_DDR_TIMING_5         0x03402400
 220
 221 #define CONFIG_SYS_DDR_TIMING_3         0x00020000
 222 #define CONFIG_SYS_DDR_TIMING_0         0x00330004
 223 #define CONFIG_SYS_DDR_TIMING_1         0x6f6B4846
 224 #define CONFIG_SYS_DDR_TIMING_2         0x0FA8C8CF
 225 #define CONFIG_SYS_DDR_CLK_CTRL         0x03000000
 226 #define CONFIG_SYS_DDR_MODE_1           0x40461520
 227 #define CONFIG_SYS_DDR_MODE_2           0x8000c000
 228 #define CONFIG_SYS_DDR_INTERVAL         0x0C300000
 229
 230 /*
 231  * Memory map
 232  *
 233  * 0x0000_0000 0x7fff_ffff      DDR             Up to 2GB cacheable
 234  * 0x8000_0000 0xdfff_ffff      PCI Express Mem 1G non-cacheable(PCIe * 2)
 235  * 0xec00_0000 0xefff_ffff      NOR flash       Up to 64M non-cacheable CS0/1
 236  * 0xf8f8_0000 0xf8ff_ffff      L2 SRAM         Up to 256K cacheable
 237  *   (early boot only)
 238  * 0xffc0_0000 0xffc3_ffff      PCI IO range    256k non-cacheable
 239  * 0xffd0_0000 0xffd0_3fff      L1 for stack    16K cacheable
 240  * 0xffe0_0000 0xffef_ffff      CCSR            1M non-cacheable
 241  */
 242
 243 /*
 244  * Local Bus Definitions
 245  */
 246 #define CONFIG_SYS_MAX_FLASH_SECT       512     /* 64M */
 247 #define CONFIG_SYS_FLASH_BASE           0xec000000
 248
 249 #define CONFIG_SYS_FLASH_BASE_PHYS      CONFIG_SYS_FLASH_BASE
 250
 251 #define CONFIG_FLASH_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) \
 252         | BR_PS_16 | BR_V)
 253
 254 #define CONFIG_FLASH_OR_PRELIM          0xfc000ff7
 255
 256 #define CONFIG_SYS_FLASH_BANKS_LIST     {CONFIG_SYS_FLASH_BASE_PHYS}
 257 #define CONFIG_SYS_FLASH_QUIET_TEST
 258 #define CONFIG_FLASH_SHOW_PROGRESS      45      /* count down from 45/5: 9..1 */
 259
 260 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* number of banks */
 261
 262 #undef CONFIG_SYS_FLASH_CHECKSUM
 263 #define CONFIG_SYS_FLASH_ERASE_TOUT     60000   /* Flash Erase Timeout (ms) */
 264 #define CONFIG_SYS_FLASH_WRITE_TOUT     500     /* Flash Write Timeout (ms) */
 265
 266 #define CONFIG_SYS_FLASH_EMPTY_INFO
 267
 268 #define CONFIG_SYS_INIT_RAM_LOCK
 269 #define CONFIG_SYS_INIT_RAM_ADDR        0xffd00000 /* stack in RAM */
 270 /* Initial L1 address */
 271 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS   CONFIG_SYS_INIT_RAM_ADDR
 272 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0
 273 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR_PHYS
 274 /* Size of used area in RAM */
 275 #define CONFIG_SYS_INIT_RAM_SIZE        0x00004000
 276
 277 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - \
 278                                         GENERATED_GBL_DATA_SIZE)
 279 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 280
 281 #define CONFIG_SYS_MONITOR_LEN  (256 * 1024)/* Reserve 256 kB for Mon */
 282 #define CONFIG_SYS_MALLOC_LEN   (1024 * 1024)/* Reserved for malloc */
 283
 284 #define CONFIG_SYS_PMC_BASE     0xff980000
 285 #define CONFIG_SYS_PMC_BASE_PHYS        CONFIG_SYS_PMC_BASE
 286 #define CONFIG_PMC_BR_PRELIM    (BR_PHYS_ADDR(CONFIG_SYS_PMC_BASE_PHYS) | \
 287                                         BR_PS_8 | BR_V)
 288 #define CONFIG_PMC_OR_PRELIM    (OR_AM_64KB | OR_GPCM_CSNT | OR_GPCM_XACS | \
 289                                  OR_GPCM_SCY | OR_GPCM_TRLX | OR_GPCM_EHTR | \
 290                                  OR_GPCM_EAD)
 291
 292 #define CONFIG_SYS_BR0_PRELIM   CONFIG_FLASH_BR_PRELIM  /* NOR Base Address */
 293 #define CONFIG_SYS_OR0_PRELIM   CONFIG_FLASH_OR_PRELIM  /* NOR Options */
 294 #ifdef CONFIG_NAND_FSL_ELBC
 295 #define CONFIG_SYS_BR1_PRELIM   CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Addr */
 296 #define CONFIG_SYS_OR1_PRELIM   CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
 297 #endif
 298
 299 /* Serial Port - controlled on board with jumper J8
 300  * open - index 2
 301  * shorted - index 1
 302  */
 303 #undef CONFIG_SERIAL_SOFTWARE_FIFO
 304 #define CONFIG_SYS_NS16550_SERIAL
 305 #define CONFIG_SYS_NS16550_REG_SIZE     1
 306 #define CONFIG_SYS_NS16550_CLK          get_bus_freq(0)
 307 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_INIT_MINIMAL)
 308 #define CONFIG_NS16550_MIN_FUNCTIONS
 309 #endif
 310
 311 #define CONFIG_SYS_BAUDRATE_TABLE       \
 312         {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
 313
 314 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR + 0x4500)
 315 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR + 0x4600)
 316
 317 /* I2C */
 318 #define CONFIG_SYS_I2C
 319 #define CONFIG_SYS_I2C_FSL
 320 #define CONFIG_SYS_FSL_I2C_SPEED        400000
 321 #define CONFIG_SYS_FSL_I2C_SLAVE        0x7F
 322 #define CONFIG_SYS_FSL_I2C_OFFSET       0x3000
 323 #define CONFIG_SYS_FSL_I2C2_SPEED       400000
 324 #define CONFIG_SYS_FSL_I2C2_SLAVE       0x7F
 325 #define CONFIG_SYS_FSL_I2C2_OFFSET      0x3100
 326 #define CONFIG_SYS_I2C_NOPROBES         { {0, 0x29} }
 327 #define CONFIG_SYS_SPD_BUS_NUM          1 /* For rom_loc and flash bank */
 328
 329 #define CONFIG_RTC_DS1337
 330 #define CONFIG_RTC_DS1337_NOOSC
 331 #define CONFIG_SYS_I2C_RTC_ADDR         0x68
 332 #define CONFIG_SYS_I2C_PCA9557_ADDR     0x18
 333 #define CONFIG_SYS_I2C_NCT72_ADDR       0x4C
 334 #define CONFIG_SYS_I2C_IDT6V49205B      0x69
 335
 336 #if defined(CONFIG_PCI)
 337 /*
 338  * General PCI
 339  * Memory space is mapped 1-1, but I/O space must start from 0.
 340  */
 341
 342 /* controller 2, direct to uli, tgtid 2, Base address 9000 */
 343 #define CONFIG_SYS_PCIE2_NAME           "PCIe SLOT CON9"
 344 #define CONFIG_SYS_PCIE2_MEM_VIRT       0xa0000000
 345 #define CONFIG_SYS_PCIE2_MEM_BUS        0xa0000000
 346 #define CONFIG_SYS_PCIE2_MEM_PHYS       0xa0000000
 347 #define CONFIG_SYS_PCIE2_MEM_SIZE       0x20000000      /* 512M */
 348 #define CONFIG_SYS_PCIE2_IO_VIRT        0xffc10000
 349 #define CONFIG_SYS_PCIE2_IO_BUS         0x00000000
 350 #define CONFIG_SYS_PCIE2_IO_PHYS        0xffc10000
 351 #define CONFIG_SYS_PCIE2_IO_SIZE        0x00010000      /* 64k */
 352
 353 /* controller 1, Slot 2, tgtid 1, Base address a000 */
 354 #define CONFIG_SYS_PCIE1_NAME           "PCIe SLOT CON10"
 355 #define CONFIG_SYS_PCIE1_MEM_VIRT       0x80000000
 356 #define CONFIG_SYS_PCIE1_MEM_BUS        0x80000000
 357 #define CONFIG_SYS_PCIE1_MEM_PHYS       0x80000000
 358 #define CONFIG_SYS_PCIE1_MEM_SIZE       0x20000000      /* 512M */
 359 #define CONFIG_SYS_PCIE1_IO_VIRT        0xffc00000
 360 #define CONFIG_SYS_PCIE1_IO_BUS         0x00000000
 361 #define CONFIG_SYS_PCIE1_IO_PHYS        0xffc00000
 362 #define CONFIG_SYS_PCIE1_IO_SIZE        0x00010000      /* 64k */
 363
 364 #define CONFIG_PCI_SCAN_SHOW    /* show pci devices on startup */
 365 #endif /* CONFIG_PCI */
 366
 367 /*
 368  * Environment
 369  */
 370 #if !defined(CONFIG_ENV_FIT_UCBOOT) && defined(CONFIG_RAMBOOT_SDCARD)
 371 #define CONFIG_FSL_FIXED_MMC_LOCATION
 372 #define CONFIG_SYS_MMC_ENV_DEV  0
 373 #endif
 374
 375 #define CONFIG_LOADS_ECHO               /* echo on for serial download */
 376 #define CONFIG_SYS_LOADS_BAUD_CHANGE    /* allow baudrate change */
 377
 378 /*
 379  * USB
 380  */
 381 #define CONFIG_HAS_FSL_DR_USB
 382
 383 #if defined(CONFIG_HAS_FSL_DR_USB)
 384 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
 385
 386 #ifdef CONFIG_USB_EHCI_HCD
 387 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 388 #define CONFIG_USB_EHCI_FSL
 389 #endif
 390 #endif
 391
 392 #undef CONFIG_WATCHDOG                  /* watchdog disabled */
 393
 394 #ifdef CONFIG_MMC
 395 #define CONFIG_SYS_FSL_ESDHC_ADDR       CONFIG_SYS_MPC85xx_ESDHC_ADDR
 396 #endif
 397
 398 /* Misc Extra Settings */
 399 #undef CONFIG_WATCHDOG  /* watchdog disabled */
 400
 401 /*
 402  * Miscellaneous configurable options
 403  */
 404 #define CONFIG_SYS_LOAD_ADDR    0x2000000       /* default load address */
 405 #define CONFIG_SYS_HZ           1000    /* decrementer freq: 1ms tick */
 406
 407 /*
 408  * For booting Linux, the board info and command line data
 409  * have to be in the first 64 MB of memory, since this is
 410  * the maximum mapped by the Linux kernel during initialization.
 411  */
 412 #define CONFIG_SYS_BOOTMAPSZ    (64 << 20)      /* Initial Memory for Linux*/
 413 #define CONFIG_SYS_BOOTM_LEN    (64 << 20)      /* Increase max gunzip size */
 414
 415 #if defined(CONFIG_CMD_KGDB)
 416 #define CONFIG_KGDB_BAUDRATE    230400  /* speed to run kgdb serial port */
 417 #define CONFIG_KGDB_SER_INDEX   2       /* which serial port to use */
 418 #endif
 419
 420 /*
 421  * Environment Configuration
 422  */
 423
 424 #if defined(CONFIG_TSEC_ENET)
 425
 426 #if defined(CONFIG_UCP1020_REV_1_2) || defined(CONFIG_UCP1020_REV_1_3)
 427 #else
 428 #error "UCP1020 module revision is not defined !!!"
 429 #endif
 430
 431 #define CONFIG_BOOTP_SERVERIP
 432
 433 #define CONFIG_TSEC1_NAME       "eTSEC1"
 434 #define CONFIG_TSEC2_NAME       "eTSEC2"
 435 #define CONFIG_TSEC3_NAME       "eTSEC3"
 436
 437 #define TSEC1_PHY_ADDR  4
 438 #define TSEC2_PHY_ADDR  0
 439 #define TSEC2_PHY_ADDR_SGMII    0x00
 440 #define TSEC3_PHY_ADDR  6
 441
 442 #define TSEC1_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
 443 #define TSEC2_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
 444 #define TSEC3_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
 445
 446 #define TSEC1_PHYIDX    0
 447 #define TSEC2_PHYIDX    0
 448 #define TSEC3_PHYIDX    0
 449
 450 #endif
 451
 452 #define CONFIG_HOSTNAME         "UCP1020"
 453 #define CONFIG_ROOTPATH         "/opt/nfsroot"
 454 #define CONFIG_BOOTFILE         "uImage"
 455 #define CONFIG_UBOOTPATH        u-boot.bin /* U-Boot image on TFTP server */
 456
 457 /* default location for tftp and bootm */
 458 #define CONFIG_LOADADDR         1000000
 459
 460 #if defined(CONFIG_DONGLE)
 461
 462 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 463 "bootcmd=run prog_spi_mbrbootcramfs\0"                                  \
 464 "bootfile=uImage\0"                                                     \
 465 "consoledev=ttyS0\0"                                                    \
 466 "cramfsfile=image.cramfs\0"                                             \
 467 "dtbaddr=0x00c00000\0"                                                  \
 468 "dtbfile=image.dtb\0"                                                   \
 469 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
 470 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
 471 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
 472 "fileaddr=0x01000000\0"                                                 \
 473 "filesize=0x00080000\0"                                                 \
 474 "flashmbr=sf probe 0; "                                                 \
 475         "tftp $loadaddr $mbr; "                                         \
 476         "sf erase $mbr_offset +$filesize; "                             \
 477         "sf write $loadaddr $mbr_offset $filesize\0"                    \
 478 "flashrecovery=tftp $recoveryaddr $cramfsfile; "                        \
 479         "protect off $nor_recoveryaddr +$filesize; "                    \
 480         "erase $nor_recoveryaddr +$filesize; "                          \
 481         "cp.b $recoveryaddr $nor_recoveryaddr $filesize; "              \
 482         "protect on $nor_recoveryaddr +$filesize\0 "                    \
 483 "flashuboot=tftp $ubootaddr $ubootfile; "                               \
 484         "protect off $nor_ubootaddr +$filesize; "                       \
 485         "erase $nor_ubootaddr +$filesize; "                             \
 486         "cp.b $ubootaddr $nor_ubootaddr $filesize; "                    \
 487         "protect on $nor_ubootaddr +$filesize\0 "                       \
 488 "flashworking=tftp $workingaddr $cramfsfile; "                          \
 489         "protect off $nor_workingaddr +$filesize; "                     \
 490         "erase $nor_workingaddr +$filesize; "                           \
 491         "cp.b $workingaddr $nor_workingaddr $filesize; "                \
 492         "protect on $nor_workingaddr +$filesize\0 "                     \
 493 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
 494 "kerneladdr=0x01100000\0"                                               \
 495 "kernelfile=uImage\0"                                                   \
 496 "loadaddr=0x01000000\0"                                                 \
 497 "mbr=uCP1020d.mbr\0"                                                    \
 498 "mbr_offset=0x00000000\0"                                               \
 499 "mmbr=uCP1020Quiet.mbr\0"                                               \
 500 "mmcpart=0:2\0"                                                         \
 501 "mmc__mbrd=fatload mmc $mmcpart $loadaddr $mbr; "                       \
 502         "mmc erase 1 1; "                                               \
 503         "mmc write $loadaddr 1 1\0"                                     \
 504 "mmc__uboot=fatload mmc $mmcpart $loadaddr $ubootfile; "                \
 505         "mmc erase 0x40 0x400; "                                        \
 506         "mmc write $loadaddr 0x40 0x400\0"                              \
 507 "netdev=eth0\0"                                                         \
 508 "nor_recoveryaddr=0xEC0A0000\0"                                         \
 509 "nor_ubootaddr=0xEFF80000\0"                                            \
 510 "nor_workingaddr=0xECFA0000\0"                                          \
 511 "norbootrecovery=setenv bootargs $recoverybootargs"                     \
 512         " console=$consoledev,$baudrate $othbootargs; "                 \
 513         "run norloadrecovery; "                                         \
 514         "bootm $kerneladdr - $dtbaddr\0"                                \
 515 "norbootworking=setenv bootargs $workingbootargs"                       \
 516         " console=$consoledev,$baudrate $othbootargs; "                 \
 517         "run norloadworking; "                                          \
 518         "bootm $kerneladdr - $dtbaddr\0"                                \
 519 "norloadrecovery=mw.l $kerneladdr 0x0 0x00a00000; "                     \
 520         "setenv cramfsaddr $nor_recoveryaddr; "                         \
 521         "cramfsload $dtbaddr $dtbfile; "                                \
 522         "cramfsload $kerneladdr $kernelfile\0"                          \
 523 "norloadworking=mw.l $kerneladdr 0x0 0x00a00000; "                      \
 524         "setenv cramfsaddr $nor_workingaddr; "                          \
 525         "cramfsload $dtbaddr $dtbfile; "                                \
 526         "cramfsload $kerneladdr $kernelfile\0"                          \
 527 "prog_spi_mbr=run spi__mbr\0"                                           \
 528 "prog_spi_mbrboot=run spi__mbr; run spi__boot1; run spi__boot2\0"       \
 529 "prog_spi_mbrbootcramfs=run spi__mbr; run spi__boot1; run spi__boot2; " \
 530         "run spi__cramfs\0"                                             \
 531 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
 532         " console=$consoledev,$baudrate $othbootargs; "                 \
 533         "tftp $rootfsaddr $rootfsfile; "                                \
 534         "tftp $loadaddr $kernelfile; "                                  \
 535         "tftp $dtbaddr $dtbfile; "                                      \
 536         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
 537 "ramdisk_size=120000\0"                                                 \
 538 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
 539 "recoveryaddr=0x02F00000\0"                                             \
 540 "recoverybootargs=root=/dev/mtdblock0 rootfstype=cramfs ro\0"           \
 541 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
 542         "mw.l 0xffe0f008 0x00400000\0"                                  \
 543 "rootfsaddr=0x02F00000\0"                                               \
 544 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
 545 "rootpath=/opt/nfsroot\0"                                               \
 546 "spi__boot1=fatload mmc $mmcpart $loadaddr u-boot.bin; "                \
 547         "protect off 0xeC000000 +$filesize; "                           \
 548         "erase 0xEC000000 +$filesize; "                                 \
 549         "cp.b $loadaddr 0xEC000000 $filesize; "                         \
 550         "cmp.b $loadaddr 0xEC000000 $filesize; "                        \
 551         "protect on 0xeC000000 +$filesize\0"                            \
 552 "spi__boot2=fatload mmc $mmcpart $loadaddr u-boot.bin; "                \
 553         "protect off 0xeFF80000 +$filesize; "                           \
 554         "erase 0xEFF80000 +$filesize; "                                 \
 555         "cp.b $loadaddr 0xEFF80000 $filesize; "                         \
 556         "cmp.b $loadaddr 0xEFF80000 $filesize; "                        \
 557         "protect on 0xeFF80000 +$filesize\0"                            \
 558 "spi__bootd=fatload mmc $mmcpart $loadaddr $ubootd; "                   \
 559         "sf probe 0; sf erase 0x8000 +$filesize; "                      \
 560         "sf write $loadaddr 0x8000 $filesize\0"                         \
 561 "spi__cramfs=fatload mmc $mmcpart $loadaddr image.cramfs; "             \
 562         "protect off 0xec0a0000 +$filesize; "                           \
 563         "erase 0xeC0A0000 +$filesize; "                                 \
 564         "cp.b $loadaddr 0xeC0A0000 $filesize; "                         \
 565         "protect on 0xec0a0000 +$filesize\0"                            \
 566 "spi__mbr=fatload mmc $mmcpart $loadaddr $mmbr; "                       \
 567         "sf probe 1; sf erase 0 +$filesize; "                           \
 568         "sf write $loadaddr 0 $filesize\0"                              \
 569 "spi__mbrd=fatload mmc $mmcpart $loadaddr $mbr; "                       \
 570         "sf probe 0; sf erase 0 +$filesize; "                           \
 571         "sf write $loadaddr 0 $filesize\0"                              \
 572 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
 573         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 574         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
 575         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
 576         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 577         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
 578 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
 579 "ubootaddr=0x01000000\0"                                                \
 580 "ubootfile=u-boot.bin\0"                                                \
 581 "ubootd=u-boot4dongle.bin\0"                                            \
 582 "upgrade=run flashworking\0"                                            \
 583 "usb_phy_type=ulpi\0 "                                                  \
 584 "workingaddr=0x02F00000\0"                                              \
 585 "workingbootargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"
 586
 587 #else
 588
 589 #if defined(CONFIG_UCP1020T1)
 590
 591 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 592 "bootcmd=run releasefpga; run norbootworking || run norbootrecovery\0"  \
 593 "bootfile=uImage\0"                                                     \
 594 "consoledev=ttyS0\0"                                                    \
 595 "cramfsfile=image.cramfs\0"                                             \
 596 "dtbaddr=0x00c00000\0"                                                  \
 597 "dtbfile=image.dtb\0"                                                   \
 598 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
 599 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
 600 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
 601 "fileaddr=0x01000000\0"                                                 \
 602 "filesize=0x00080000\0"                                                 \
 603 "flashmbr=sf probe 0; "                                                 \
 604         "tftp $loadaddr $mbr; "                                         \
 605         "sf erase $mbr_offset +$filesize; "                             \
 606         "sf write $loadaddr $mbr_offset $filesize\0"                    \
 607 "flashrecovery=tftp $recoveryaddr $cramfsfile; "                        \
 608         "protect off $nor_recoveryaddr +$filesize; "                    \
 609         "erase $nor_recoveryaddr +$filesize; "                          \
 610         "cp.b $recoveryaddr $nor_recoveryaddr $filesize; "              \
 611         "protect on $nor_recoveryaddr +$filesize\0 "                    \
 612 "flashuboot=tftp $ubootaddr $ubootfile; "                               \
 613         "protect off $nor_ubootaddr +$filesize; "                       \
 614         "erase $nor_ubootaddr +$filesize; "                             \
 615         "cp.b $ubootaddr $nor_ubootaddr $filesize; "                    \
 616         "protect on $nor_ubootaddr +$filesize\0 "                       \
 617 "flashworking=tftp $workingaddr $cramfsfile; "                          \
 618         "protect off $nor_workingaddr +$filesize; "                     \
 619         "erase $nor_workingaddr +$filesize; "                           \
 620         "cp.b $workingaddr $nor_workingaddr $filesize; "                \
 621         "protect on $nor_workingaddr +$filesize\0 "                     \
 622 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
 623 "kerneladdr=0x01100000\0"                                               \
 624 "kernelfile=uImage\0"                                                   \
 625 "loadaddr=0x01000000\0"                                                 \
 626 "mbr=uCP1020.mbr\0"                                                     \
 627 "mbr_offset=0x00000000\0"                                               \
 628 "netdev=eth0\0"                                                         \
 629 "nor_recoveryaddr=0xEC0A0000\0"                                         \
 630 "nor_ubootaddr=0xEFF80000\0"                                            \
 631 "nor_workingaddr=0xECFA0000\0"                                          \
 632 "norbootrecovery=setenv bootargs $recoverybootargs"                     \
 633         " console=$consoledev,$baudrate $othbootargs; "                 \
 634         "run norloadrecovery; "                                         \
 635         "bootm $kerneladdr - $dtbaddr\0"                                \
 636 "norbootworking=setenv bootargs $workingbootargs"                       \
 637         " console=$consoledev,$baudrate $othbootargs; "                 \
 638         "run norloadworking; "                                          \
 639         "bootm $kerneladdr - $dtbaddr\0"                                \
 640 "norloadrecovery=mw.l $kerneladdr 0x0 0x00a00000; "                     \
 641         "setenv cramfsaddr $nor_recoveryaddr; "                         \
 642         "cramfsload $dtbaddr $dtbfile; "                                \
 643         "cramfsload $kerneladdr $kernelfile\0"                          \
 644 "norloadworking=mw.l $kerneladdr 0x0 0x00a00000; "                      \
 645         "setenv cramfsaddr $nor_workingaddr; "                          \
 646         "cramfsload $dtbaddr $dtbfile; "                                \
 647         "cramfsload $kerneladdr $kernelfile\0"                          \
 648 "othbootargs=quiet\0"                                                   \
 649 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
 650         " console=$consoledev,$baudrate $othbootargs; "                 \
 651         "tftp $rootfsaddr $rootfsfile; "                                \
 652         "tftp $loadaddr $kernelfile; "                                  \
 653         "tftp $dtbaddr $dtbfile; "                                      \
 654         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
 655 "ramdisk_size=120000\0"                                                 \
 656 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
 657 "recoveryaddr=0x02F00000\0"                                             \
 658 "recoverybootargs=root=/dev/mtdblock0 rootfstype=cramfs ro\0"           \
 659 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
 660         "mw.l 0xffe0f008 0x00400000\0"                                  \
 661 "rootfsaddr=0x02F00000\0"                                               \
 662 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
 663 "rootpath=/opt/nfsroot\0"                                               \
 664 "silent=1\0"                                                            \
 665 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
 666         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 667         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
 668         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
 669         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 670         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
 671 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
 672 "ubootaddr=0x01000000\0"                                                \
 673 "ubootfile=u-boot.bin\0"                                                \
 674 "upgrade=run flashworking\0"                                            \
 675 "workingaddr=0x02F00000\0"                                              \
 676 "workingbootargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"
 677
 678 #else /* For Arcturus Modules */
 679
 680 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 681 "bootcmd=run norkernel\0"                                               \
 682 "bootfile=uImage\0"                                                     \
 683 "consoledev=ttyS0\0"                                                    \
 684 "dtbaddr=0x00c00000\0"                                                  \
 685 "dtbfile=image.dtb\0"                                                   \
 686 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
 687 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
 688 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
 689 "fileaddr=0x01000000\0"                                                 \
 690 "filesize=0x00080000\0"                                                 \
 691 "flashmbr=sf probe 0; "                                                 \
 692         "tftp $loadaddr $mbr; "                                         \
 693         "sf erase $mbr_offset +$filesize; "                             \
 694         "sf write $loadaddr $mbr_offset $filesize\0"                    \
 695 "flashuboot=tftp $loadaddr $ubootfile; "                                \
 696         "protect off $nor_ubootaddr0 +$filesize; "                      \
 697         "erase $nor_ubootaddr0 +$filesize; "                            \
 698         "cp.b $loadaddr $nor_ubootaddr0 $filesize; "                    \
 699         "protect on $nor_ubootaddr0 +$filesize; "                       \
 700         "protect off $nor_ubootaddr1 +$filesize; "                      \
 701         "erase $nor_ubootaddr1 +$filesize; "                            \
 702         "cp.b $loadaddr $nor_ubootaddr1 $filesize; "                    \
 703         "protect on $nor_ubootaddr1 +$filesize\0 "                      \
 704 "format0=protect off $part0base +$part0size; "                          \
 705         "erase $part0base +$part0size\0"                                \
 706 "format1=protect off $part1base +$part1size; "                          \
 707         "erase $part1base +$part1size\0"                                \
 708 "format2=protect off $part2base +$part2size; "                          \
 709         "erase $part2base +$part2size\0"                                \
 710 "format3=protect off $part3base +$part3size; "                          \
 711         "erase $part3base +$part3size\0"                                \
 712 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
 713 "kerneladdr=0x01100000\0"                                               \
 714 "kernelargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"                 \
 715 "kernelfile=uImage\0"                                                   \
 716 "loadaddr=0x01000000\0"                                                 \
 717 "mbr=uCP1020.mbr\0"                                                     \
 718 "mbr_offset=0x00000000\0"                                               \
 719 "netdev=eth0\0"                                                         \
 720 "nor_ubootaddr0=0xEC000000\0"                                           \
 721 "nor_ubootaddr1=0xEFF80000\0"                                           \
 722 "norkernel=setenv bootargs $kernelargs console=$consoledev,$baudrate; " \
 723         "run norkernelload; "                                           \
 724         "bootm $kerneladdr - $dtbaddr\0"                                \
 725 "norkernelload=mw.l $kerneladdr 0x0 0x00a00000; "                       \
 726         "setenv cramfsaddr $part0base; "                                \
 727         "cramfsload $dtbaddr $dtbfile; "                                \
 728         "cramfsload $kerneladdr $kernelfile\0"                          \
 729 "part0base=0xEC100000\0"                                                \
 730 "part0size=0x00700000\0"                                                \
 731 "part1base=0xEC800000\0"                                                \
 732 "part1size=0x02000000\0"                                                \
 733 "part2base=0xEE800000\0"                                                \
 734 "part2size=0x00800000\0"                                                \
 735 "part3base=0xEF000000\0"                                                \
 736 "part3size=0x00F80000\0"                                                \
 737 "partENVbase=0xEC080000\0"                                              \
 738 "partENVsize=0x00080000\0"                                              \
 739 "program0=tftp part0-000000.bin; "                                      \
 740         "protect off $part0base +$filesize; "                           \
 741         "erase $part0base +$filesize; "                                 \
 742         "cp.b $loadaddr $part0base $filesize; "                         \
 743         "echo Verifying...; "                                           \
 744         "cmp.b $loadaddr $part0base $filesize\0"                        \
 745 "program1=tftp part1-000000.bin; "                                      \
 746         "protect off $part1base +$filesize; "                           \
 747         "erase $part1base +$filesize; "                                 \
 748         "cp.b $loadaddr $part1base $filesize; "                         \
 749         "echo Verifying...; "                                           \
 750         "cmp.b $loadaddr $part1base $filesize\0"                        \
 751 "program2=tftp part2-000000.bin; "                                      \
 752         "protect off $part2base +$filesize; "                           \
 753         "erase $part2base +$filesize; "                                 \
 754         "cp.b $loadaddr $part2base $filesize; "                         \
 755         "echo Verifying...; "                                           \
 756         "cmp.b $loadaddr $part2base $filesize\0"                        \
 757 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
 758         "  console=$consoledev,$baudrate $othbootargs; "                \
 759         "tftp $rootfsaddr $rootfsfile; "                                \
 760         "tftp $loadaddr $kernelfile; "                                  \
 761         "tftp $dtbaddr $dtbfile; "                                      \
 762         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
 763 "ramdisk_size=120000\0"                                                 \
 764 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
 765 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
 766         "mw.l 0xffe0f008 0x00400000\0"                                  \
 767 "rootfsaddr=0x02F00000\0"                                               \
 768 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
 769 "rootpath=/opt/nfsroot\0"                                               \
 770 "spi__mbr=fatload mmc $mmcpart $loadaddr $mmbr; "                       \
 771         "sf probe 0; sf erase 0 +$filesize; "                           \
 772         "sf write $loadaddr 0 $filesize\0"                              \
 773 "spi__boot=fatload mmc $mmcpart $loadaddr u-boot.bin; "                 \
 774         "protect off 0xeC000000 +$filesize; "                           \
 775         "erase 0xEC000000 +$filesize; "                                 \
 776         "cp.b $loadaddr 0xEC000000 $filesize; "                         \
 777         "cmp.b $loadaddr 0xEC000000 $filesize; "                        \
 778         "protect on 0xeC000000 +$filesize\0"                            \
 779 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
 780         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 781         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
 782         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
 783         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 784         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
 785 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
 786 "ubootfile=u-boot.bin\0"                                                \
 787 "upgrade=run flashuboot\0"                                              \
 788 "usb_phy_type=ulpi\0 "                                                  \
 789 "boot_nfs= "                                                            \
 790         "setenv bootargs root=/dev/nfs rw "                             \
 791         "nfsroot=$serverip:$rootpath "                                  \
 792         "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
 793         "console=$consoledev,$baudrate $othbootargs;"                   \
 794         "tftp $loadaddr $bootfile;"                                     \
 795         "tftp $fdtaddr $fdtfile;"                                       \
 796         "bootm $loadaddr - $fdtaddr\0"                                  \
 797 "boot_hd = "                                                            \
 798         "setenv bootargs root=/dev/$bdev rw rootdelay=30 "              \
 799         "console=$consoledev,$baudrate $othbootargs;"                   \
 800         "usb start;"                                                    \
 801         "ext2load usb 0:1 $loadaddr /boot/$bootfile;"                   \
 802         "ext2load usb 0:1 $fdtaddr /boot/$fdtfile;"                     \
 803         "bootm $loadaddr - $fdtaddr\0"                                  \
 804 "boot_usb_fat = "                                                       \
 805         "setenv bootargs root=/dev/ram rw "                             \
 806         "console=$consoledev,$baudrate $othbootargs "                   \
 807         "ramdisk_size=$ramdisk_size;"                                   \
 808         "usb start;"                                                    \
 809         "fatload usb 0:2 $loadaddr $bootfile;"                          \
 810         "fatload usb 0:2 $fdtaddr $fdtfile;"                            \
 811         "fatload usb 0:2 $ramdiskaddr $ramdiskfile;"                    \
 812         "bootm $loadaddr $ramdiskaddr $fdtaddr\0 "                      \
 813 "boot_usb_ext2 = "                                                      \
 814         "setenv bootargs root=/dev/ram rw "                             \
 815         "console=$consoledev,$baudrate $othbootargs "                   \
 816         "ramdisk_size=$ramdisk_size;"                                   \
 817         "usb start;"                                                    \
 818         "ext2load usb 0:4 $loadaddr $bootfile;"                         \
 819         "ext2load usb 0:4 $fdtaddr $fdtfile;"                           \
 820         "ext2load usb 0:4 $ramdiskaddr $ramdiskfile;"                   \
 821         "bootm $loadaddr $ramdiskaddr $fdtaddr\0 "                      \
 822 "boot_nor = "                                                           \
 823         "setenv bootargs root=/dev/$jffs2nor rw "                       \
 824         "console=$consoledev,$baudrate rootfstype=jffs2 $othbootargs;"  \
 825         "bootm $norbootaddr - $norfdtaddr\0 "                           \
 826 "boot_ram = "                                                           \
 827         "setenv bootargs root=/dev/ram rw "                             \
 828         "console=$consoledev,$baudrate $othbootargs "                   \
 829         "ramdisk_size=$ramdisk_size;"                                   \
 830         "tftp $ramdiskaddr $ramdiskfile;"                               \
 831         "tftp $loadaddr $bootfile;"                                     \
 832         "tftp $fdtaddr $fdtfile;"                                       \
 833         "bootm $loadaddr $ramdiskaddr $fdtaddr\0"
 834
 835 #endif
 836 #endif
 837
 838 #endif /* __CONFIG_H */