2 * (C) Copyright 2003-2005
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * (C) Copyright 2004-2006
6 * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
8 * See file CREDITS for list of people who contributed to this
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * High Level Configuration Options
35 #define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
36 #define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */
37 #define CONFIG_TQM5200 1 /* ... on TQM5200 module */
38 #undef CONFIG_TQM5200_REV100 /* define for revision 100 modules */
40 /* On a Cameron or on a FO300 board or ... */
41 #if !defined(CONFIG_CAM5200) && !defined(CONFIG_FO300)
42 #define CONFIG_STK52XX 1 /* ... on a STK52XX board */
45 #define CFG_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
47 #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
48 #define BOOTFLAG_WARM 0x02 /* Software reboot */
51 * Serial console configuration
53 #define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
54 #define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
55 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
58 #define CFG_DEVICE_NULLDEV 1 /* enable null device */
59 #define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
60 #define CONFIG_BOARD_EARLY_INIT_F 1 /* used to detect S1 switch position */
61 #define CONFIG_USB_BIN_FIXUP 1 /* for a buggy USB device */
63 #define FO300_SILENT_CONSOLE_WHEN_S1_CLOSED 1 /* silent console on PSC1 when S1 */
64 /* switch is closed */
67 #undef FO300_SILENT_CONSOLE_WHEN_S1_CLOSED /* silent console on PSC1 when S1 */
69 #endif /* CONFIG_FO300 */
72 #define CONFIG_PS2KBD /* AT-PS/2 Keyboard */
73 #define CONFIG_PS2MULT /* .. on PS/2 Multiplexer */
74 #define CONFIG_PS2SERIAL 6 /* .. on PSC6 */
75 #define CONFIG_PS2MULT_DELAY (CFG_HZ/2) /* Initial delay */
76 #define CONFIG_BOARD_EARLY_INIT_R
77 #endif /* CONFIG_STK52XX */
81 * 0x40000000 - 0x4fffffff - PCI Memory
82 * 0x50000000 - 0x50ffffff - PCI IO Space
86 #define CONFIG_PCI_PNP 1
87 /* #define CONFIG_PCI_SCAN_SHOW 1 */
89 #define CONFIG_PCI_MEM_BUS 0x40000000
90 #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
91 #define CONFIG_PCI_MEM_SIZE 0x10000000
93 #define CONFIG_PCI_IO_BUS 0x50000000
94 #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
95 #define CONFIG_PCI_IO_SIZE 0x01000000
97 #define CONFIG_NET_MULTI 1
98 #define CONFIG_EEPRO100 1
99 #define CFG_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
100 #define CONFIG_NS8382X 1
101 #endif /* CONFIG_STK52XX */
106 #ifndef CONFIG_TQM5200S /* No graphics controller on TQM5200S */
108 #define CONFIG_VIDEO_SM501
109 #define CONFIG_VIDEO_SM501_32BPP
110 #define CONFIG_CFB_CONSOLE
111 #define CONFIG_VIDEO_LOGO
114 #define CONFIG_CONSOLE_EXTRA_INFO
116 #define CONFIG_VIDEO_BMP_LOGO
119 #define CONFIG_VGA_AS_SINGLE_DEVICE
120 #define CONFIG_VIDEO_SW_CURSOR
121 #define CONFIG_SPLASH_SCREEN
122 #define CFG_CONSOLE_IS_IN_ENV
123 #endif /* #ifndef CONFIG_TQM5200S */
127 #define CONFIG_MAC_PARTITION
128 #define CONFIG_DOS_PARTITION
129 #define CONFIG_ISO_PARTITION
132 #if defined(CONFIG_STK52XX) || defined(CONFIG_FO300)
133 #define CONFIG_USB_OHCI
134 #define CONFIG_USB_STORAGE
137 #ifndef CONFIG_CAM5200
139 #define CONFIG_POST (CFG_POST_MEMORY | \
145 #define CFG_CMD_POST_DIAG CFG_CMD_DIAG
146 /* preserve space for the post_word at end of on-chip SRAM */
147 #define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
149 #define CFG_CMD_POST_DIAG 0
154 * Command line configuration.
156 #include <config_cmd_default.h>
158 #define CONFIG_CMD_ASKENV
159 #define CONFIG_CMD_DATE
160 #define CONFIG_CMD_DHCP
161 #define CONFIG_CMD_EEPROM
162 #define CONFIG_CMD_I2C
163 #define CONFIG_CMD_JFFS2
164 #define CONFIG_CMD_MII
165 #define CONFIG_CMD_NFS
166 #define CONFIG_CMD_PING
167 #define CONFIG_CMD_POST_DIAG
168 #define CONFIG_CMD_REGINFO
169 #define CONFIG_CMD_SNTP
170 #define CONFIG_CMD_BSP
173 #define CONFIG_CMD_BMP
177 #define CONFIG_CMD_CMD_PCI
180 #if defined(CONFIG_MINIFAP) || defined(CONFIG_STK52XX) || defined(CONFIG_FO300)
181 #define CONFIG_CMD_IDE
182 #define CONFIG_CMD_FAT
183 #define CONFIG_CMD_EXT2
186 #if defined(CONFIG_STK52XX) || defined(CONFIG_FO300)
187 #define CONFIG_CFG_USB
188 #define CONFIG_CFG_FAT
192 #define CONFIG_TIMESTAMP /* display image timestamps */
194 #if (TEXT_BASE != 0xFFF00000)
195 # define CFG_LOWBOOT 1 /* Boot low */
201 #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
203 #define CONFIG_PREBOOT "echo;" \
204 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
207 #undef CONFIG_BOOTARGS
209 #if defined(CONFIG_TQM5200_B) && !defined(CFG_LOWBOOT)
211 "update=protect off FFF00000 +${filesize};" \
212 "erase FFF00000 +${filesize};" \
213 "cp.b 200000 FFF00000 ${filesize};" \
214 "protect on FFF00000 +${filesize}\0"
215 #else /* default lowboot configuration */
217 "update=protect off FC000000 +${filesize};" \
218 "erase FC000000 +${filesize};" \
219 "cp.b 200000 FC000000 ${filesize};" \
220 "protect on FC000000 +${filesize}\0"
223 #ifndef CONFIG_CAM5200
224 #define CUSTOM_ENV_SETTINGS \
225 "bootfile=/tftpboot/tqm5200/uImage\0" \
226 "bootfile_fdt=/tftpboot/tqm5200/uImage_fdt\0" \
227 "fdt_file=/tftpboot/tqm5200/tqm5200.dtb\0" \
228 "u-boot=/tftpboot/tqm5200/u-boot.bin\0"
230 #define CUSTOM_ENV_SETTINGS \
231 "bootfile=cam5200/uImage\0" \
232 "u-boot=cam5200/u-boot.bin\0" \
233 "setup=tftp 200000 cam5200/setup.img; autoscr 200000\0"
236 #define CONFIG_EXTRA_ENV_SETTINGS \
238 "kernel_addr=200000\0" \
239 "fdt_addr=400000\0" \
240 "hostname=tqm5200\0" \
242 "rootpath=/opt/eldk/ppc_6xx\0" \
243 "ramargs=setenv bootargs root=/dev/ram rw\0" \
244 "nfsargs=setenv bootargs root=/dev/nfs rw " \
245 "nfsroot=${serverip}:${rootpath}\0" \
246 "addip=setenv bootargs ${bootargs} " \
247 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
248 ":${hostname}:${netdev}:off panic=1\0" \
249 "addcons=setenv bootargs ${bootargs} " \
250 "console=${console},${baudrate}\0" \
251 "flash_self=run ramargs addip addcons;" \
252 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
253 "flash_nfs=run nfsargs addip addcons;" \
254 "bootm ${kernel_addr}\0" \
255 "net_nfs=tftp ${kernel_addr} ${bootfile};" \
256 "run nfsargs addip addcons;bootm\0" \
257 "net_nfs_fdt=tftp ${kernel_addr} ${bootfile_fdt};" \
258 "tftp ${fdt_addr} ${fdt_file};setenv console ttyPSC0;" \
259 "run nfsargs addip addcons;" \
260 "bootm ${kernel_addr} - ${fdt_addr}\0" \
261 CUSTOM_ENV_SETTINGS \
262 "load=tftp 200000 ${u-boot}\0" \
266 #define CONFIG_BOOTCOMMAND "run net_nfs"
269 * IPB Bus clocking configuration.
271 #define CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
273 #if defined(CFG_IPBCLK_EQUALS_XLBCLK) && !defined(CONFIG_CAM5200)
275 * PCI Bus clocking configuration
277 * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
278 * CFG_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock of
279 * 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
281 #define CFG_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */
287 #define CONFIG_HARD_I2C 1 /* I2C with hardware support */
288 #ifdef CONFIG_TQM5200_REV100
289 #define CFG_I2C_MODULE 1 /* Select I2C module #1 for rev. 100 board */
291 #define CFG_I2C_MODULE 2 /* Select I2C module #2 for all other revs */
295 * I2C clock frequency
297 * Please notice, that the resulting clock frequency could differ from the
298 * configured value. This is because the I2C clock is derived from system
299 * clock over a frequency divider with only a few divider values. U-boot
300 * calculates the best approximation for CFG_I2C_SPEED. However the calculated
301 * approximation allways lies below the configured value, never above.
303 #define CFG_I2C_SPEED 100000 /* 100 kHz */
304 #define CFG_I2C_SLAVE 0x7F
307 * EEPROM configuration for onboard EEPROM M24C32 (M24C64 should work
308 * also). For other EEPROMs configuration should be verified. On Mini-FAP the
309 * EEPROM (24C64) is on the same I2C address (but on other I2C bus), so the
310 * same configuration could be used.
312 #define CFG_I2C_EEPROM_ADDR 0x50 /* 1010000x */
313 #define CFG_I2C_EEPROM_ADDR_LEN 2
314 #define CFG_EEPROM_PAGE_WRITE_BITS 5 /* =32 Bytes per write */
315 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20
318 * HW-Monitor configuration on Mini-FAP
320 #if defined (CONFIG_MINIFAP)
321 #define CFG_I2C_HWMON_ADDR 0x2C
324 /* List of I2C addresses to be verified by POST */
325 #if defined (CONFIG_MINIFAP)
327 #define I2C_ADDR_LIST { CFG_I2C_EEPROM_ADDR, \
328 CFG_I2C_HWMON_ADDR, \
333 * Flash configuration
335 #define CFG_FLASH_BASE 0xFC000000
337 #if defined(CONFIG_CAM5200) && defined(CONFIG_CAM5200_NIOSFLASH)
338 #define CFG_MAX_FLASH_BANKS 2 /* max num of flash banks
340 #define CFG_FLASH_WORD_SIZE unsigned int /* main flash device with */
341 #define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
342 #define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
344 #define CFG_FLASH_ADDR0 0x555
345 #define CFG_FLASH_ADDR1 0x2AA
346 #define CFG_FLASH_2ND_16BIT_DEV 1 /* NIOS flash is a 16bit device */
347 #define CFG_MAX_FLASH_SECT 128
349 /* use CFI flash driver */
350 #define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
351 #define CFG_FLASH_CFI_DRIVER 1 /* Use the common driver */
352 #define CFG_FLASH_BANKS_LIST { CFG_BOOTCS_START }
353 #define CFG_MAX_FLASH_BANKS 1 /* max num of flash banks
355 #define CFG_MAX_FLASH_SECT 512 /* max num of sects on one chip */
358 #define CFG_FLASH_EMPTY_INFO
359 #define CFG_FLASH_SIZE 0x04000000 /* 64 MByte */
360 #define CFG_FLASH_USE_BUFFER_WRITE 1
362 #if defined (CONFIG_CAM5200)
363 # define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00040000)
364 #elif defined(CONFIG_TQM5200_B)
365 # define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00080000)
367 # define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00060000)
370 /* Dynamic MTD partition support */
371 #define CONFIG_JFFS2_CMDLINE
372 #define MTDIDS_DEFAULT "nor0=TQM5200-0"
374 #ifdef CONFIG_STK52XX
375 # if defined(CONFIG_TQM5200_B)
376 # if defined(CFG_LOWBOOT)
377 # define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:1m(firmware)," \
383 # else /* highboot */
384 # define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:2560k(kernel)," \
390 # endif /* CFG_LOWBOOT */
391 # else /* !CONFIG_TQM5200_B */
392 # define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:640k(firmware)," \
398 # endif /* CONFIG_TQM5200_B */
399 #elif defined (CONFIG_CAM5200)
400 # define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:768k(firmware)," \
404 #elif defined (CONFIG_FO300)
405 # define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:640k(firmware)," \
412 # error "Unknown Carrier Board"
413 #endif /* CONFIG_STK52XX */
416 * Environment settings
418 #define CFG_ENV_IS_IN_FLASH 1
419 #define CFG_ENV_SIZE 0x4000 /* 16 k - keep small for fast booting */
420 #if defined(CONFIG_TQM5200_B) || defined (CONFIG_CAM5200)
421 #define CFG_ENV_SECT_SIZE 0x40000
423 #define CFG_ENV_SECT_SIZE 0x20000
424 #endif /* CONFIG_TQM5200_B */
425 #define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
426 #define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
431 #define CFG_MBAR 0xF0000000
432 #define CFG_SDRAM_BASE 0x00000000
433 #define CFG_DEFAULT_MBAR 0x80000000
435 /* Use ON-Chip SRAM until RAM will be available */
436 #define CFG_INIT_RAM_ADDR MPC5XXX_SRAM
438 /* preserve space for the post_word at end of on-chip SRAM */
439 #define CFG_INIT_RAM_END MPC5XXX_SRAM_POST_SIZE
441 #define CFG_INIT_RAM_END MPC5XXX_SRAM_SIZE
445 #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
446 #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
447 #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
449 #define CFG_MONITOR_BASE TEXT_BASE
450 #if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
451 # define CFG_RAMBOOT 1
454 #if defined (CONFIG_CAM5200)
455 # define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
456 #elif defined(CONFIG_TQM5200_B)
457 # define CFG_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */
459 # define CFG_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
462 #define CFG_MALLOC_LEN (1024 << 10) /* Reserve 1024 kB for malloc() */
463 #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
466 * Ethernet configuration
468 #define CONFIG_MPC5xxx_FEC 1
470 * Define CONFIG_FEC_10MBIT to force FEC at 10Mb
472 /* #define CONFIG_FEC_10MBIT 1 */
473 #define CONFIG_PHY_ADDR 0x00
478 * use CS1: Bit 0 (mask: 0x80000000):
479 * 1 -> Pin gpio_wkup_6 as second SDRAM chip select (mem_cs1).
480 * use ALT CAN position: Bits 2-3 (mask: 0x30000000):
481 * 00 -> No Alternatives, CAN1/2 on PSC2 according to PSC2 setting.
482 * SPI on PSC3 according to PSC3 setting. Use for CAM5200.
483 * 01 -> CAN1 on I2C1, CAN2 on Tmr0/1.
484 * Use for REV200 STK52XX boards and FO300 boards. Do not use
485 * with REV100 modules (because, there I2C1 is used as I2C bus).
486 * use ATA: Bits 6-7 (mask 0x03000000):
487 * 00 -> No ATA chip selects, csb_4/5 used as normal chip selects.
488 * Use for CAM5200 board.
489 * 01 -> ATA cs0/1 on csb_4/5. Use for the remaining boards.
490 * use PSC6: Bits 9-11 (mask 0x00700000):
491 * 000 -> use PSC6_0 to PSC6_3 as GPIO, PSC6 could not be used as
492 * UART, CODEC or IrDA.
493 * GPIO on PSC6_3 is used in post_hotkeys_pressed() to
494 * enable extended POST tests.
495 * Use for MINI-FAP and TQM5200_IB boards.
496 * 101 -> use PSC6 as UART. Pins PSC6_0 to PSC6_3 are used.
497 * Extended POST test is not available.
498 * Use for STK52xx, FO300 and CAM5200 boards.
499 * use PCI_DIS: Bit 16 (mask 0x00008000):
500 * 1 -> disable PCI controller (on CAM5200 board).
501 * use USB: Bits 18-19 (mask 0x00003000):
502 * 10 -> two UARTs (on FO300 and CAM5200).
503 * use PSC3: Bits 20-23 (mask: 0x00000f00):
504 * 0000 -> All PSC3 pins are GPIOs.
505 * 1100 -> UART/SPI (on FO300 board).
506 * 0100 -> UART (on CAM5200 board).
507 * use PSC2: Bits 25:27 (mask: 0x00000030):
508 * 000 -> All PSC2 pins are GPIOs.
509 * 100 -> UART (on CAM5200 board).
510 * 001 -> CAN1/2 on PSC2 pins.
511 * Use for REV100 STK52xx boards
512 * 01x -> Use AC97 (on FO300 board).
513 * use PSC1: Bits 29-31 (mask: 0x00000007):
514 * 100 -> UART (on all boards).
516 #if defined (CONFIG_MINIFAP)
517 # define CFG_GPS_PORT_CONFIG 0x91000004
518 #elif defined (CONFIG_STK52XX)
519 # if defined (CONFIG_STK52XX_REV100)
520 # define CFG_GPS_PORT_CONFIG 0x81500014
521 # else /* STK52xx REV200 and above */
522 # if defined (CONFIG_TQM5200_REV100)
523 # error TQM5200 REV100 not supported on STK52XX REV200 or above
524 # else/* TQM5200 REV200 and above */
525 # define CFG_GPS_PORT_CONFIG 0x91500004
528 #elif defined (CONFIG_FO300)
529 # define CFG_GPS_PORT_CONFIG 0x91502c24
530 #elif defined (CONFIG_CAM5200)
531 # define CFG_GPS_PORT_CONFIG 0x8050A444
532 #else /* TMQ5200 Inbetriebnahme-Board */
533 # define CFG_GPS_PORT_CONFIG 0x81000004
539 #if defined (CONFIG_STK52XX) && !defined (CONFIG_STK52XX_REV100)
540 # define CONFIG_RTC_M41T11 1
541 # define CFG_I2C_RTC_ADDR 0x68
542 # define CFG_M41T11_BASE_YEAR 1900 /* because Linux uses the same base
545 # define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
549 * Miscellaneous configurable options
551 #define CFG_LONGHELP /* undef to save memory */
552 #define CFG_PROMPT "=> " /* Monitor Command Prompt */
554 #define CONFIG_CMDLINE_EDITING 1 /* add command line history */
555 #define CFG_HUSH_PARSER 1 /* use "hush" command parser */
556 #define CFG_PROMPT_HUSH_PS2 "> "
558 #define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
559 #if defined(CONFIG_CMD_KGDB)
560 #define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
563 #if defined(CONFIG_CMD_KGDB)
564 #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
566 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
568 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
569 #define CFG_MAXARGS 16 /* max number of command args */
570 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
572 /* Enable an alternate, more extensive memory test */
573 #define CFG_ALT_MEMTEST
575 #define CFG_MEMTEST_START 0x00100000 /* memtest works on */
576 #define CFG_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
578 #define CFG_LOAD_ADDR 0x100000 /* default load address */
580 #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
583 * Enable loopw commando. This has only affect, if CFG_CMD_MEM is defined,
584 * which is normally part of the default commands (CFV_CMD_DFL)
589 * Various low-level settings
591 #if defined(CONFIG_MPC5200)
592 #define CFG_HID0_INIT HID0_ICE | HID0_ICFI
593 #define CFG_HID0_FINAL HID0_ICE
595 #define CFG_HID0_INIT 0
596 #define CFG_HID0_FINAL 0
599 #define CFG_BOOTCS_START CFG_FLASH_BASE
600 #define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
601 #ifdef CFG_PCICLK_EQUALS_IPBCLK_DIV2
602 #define CFG_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */
604 #define CFG_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */
606 #define CFG_CS0_START CFG_FLASH_BASE
607 #define CFG_CS0_SIZE CFG_FLASH_SIZE
609 #define CONFIG_LAST_STAGE_INIT
612 * SRAM - Do not map below 2 GB in address space, because this area is used
613 * for SDRAM autosizing.
615 #define CFG_CS2_START 0xE5000000
616 #define CFG_CS2_SIZE 0x100000 /* 1 MByte */
617 #define CFG_CS2_CFG 0x0004D930
620 * Grafic controller - Do not map below 2 GB in address space, because this
621 * area is used for SDRAM autosizing.
623 #define SM501_FB_BASE 0xE0000000
624 #define CFG_CS1_START (SM501_FB_BASE)
625 #define CFG_CS1_SIZE 0x4000000 /* 64 MByte */
626 #define CFG_CS1_CFG 0x8F48FF70
627 #define SM501_MMIO_BASE CFG_CS1_START + 0x03E00000
629 #define CFG_CS_BURST 0x00000000
630 #define CFG_CS_DEADCYCLE 0x33333311 /* 1 dead cycle for flash and SM501 */
632 #if defined(CONFIG_CAM5200)
633 #define CFG_CS4_START 0xB0000000
634 #define CFG_CS4_SIZE 0x00010000
635 #define CFG_CS4_CFG 0x01019C10
637 #define CFG_CS5_START 0xD0000000
638 #define CFG_CS5_SIZE 0x01208000
639 #define CFG_CS5_CFG 0x1414BF10
642 #define CFG_RESET_ADDRESS 0xff000000
644 /*-----------------------------------------------------------------------
646 *-----------------------------------------------------------------------
648 #define CONFIG_USB_CLOCK 0x0001BBBB
649 #define CONFIG_USB_CONFIG 0x00001000
651 /*-----------------------------------------------------------------------
652 * IDE/ATA stuff Supports IDE harddisk
653 *-----------------------------------------------------------------------
656 #undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
658 #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
659 #undef CONFIG_IDE_LED /* LED for ide not supported */
661 #define CONFIG_IDE_RESET /* reset for ide supported */
662 #define CONFIG_IDE_PREINIT
664 #define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */
665 #define CFG_IDE_MAXDEVICE 2 /* max. 2 drives per IDE bus */
667 #define CFG_ATA_IDE0_OFFSET 0x0000
669 #define CFG_ATA_BASE_ADDR MPC5XXX_ATA
671 /* Offset for data I/O */
672 #define CFG_ATA_DATA_OFFSET (0x0060)
674 /* Offset for normal register accesses */
675 #define CFG_ATA_REG_OFFSET (CFG_ATA_DATA_OFFSET)
677 /* Offset for alternate registers */
678 #define CFG_ATA_ALT_OFFSET (0x005C)
680 /* Interval between registers */
681 #define CFG_ATA_STRIDE 4
683 /*-----------------------------------------------------------------------
684 * Open firmware flat tree support
685 *-----------------------------------------------------------------------
687 #define CONFIG_OF_FLAT_TREE 1
688 #define CONFIG_OF_BOARD_SETUP 1
690 /* maximum size of the flat tree (8K) */
691 #define OF_FLAT_TREE_MAX_SIZE 8192
692 #define OF_CPU "PowerPC,5200@0"
693 #define OF_SOC "soc5200@f0000000"
694 #define OF_TBCLK (bd->bi_busfreq / 4)
695 #define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
697 #endif /* __CONFIG_H */