2 * (C) Copyright 2003-2005
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * (C) Copyright 2004-2006
6 * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
8 * See file CREDITS for list of people who contributed to this
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * High Level Configuration Options
35 #define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
36 #define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */
37 #define CONFIG_TQM5200 1 /* ... on TQM5200 module */
38 #undef CONFIG_TQM5200_REV100 /* define for revision 100 modules */
41 * Valid values for CONFIG_SYS_TEXT_BASE are:
42 * 0xFC000000 boot low (standard configuration with room for
43 * max 64 MByte Flash ROM)
44 * 0xFFF00000 boot high (for a backup copy of U-Boot)
45 * 0x00100000 boot from RAM (for testing only)
47 #ifndef CONFIG_SYS_TEXT_BASE
48 #define CONFIG_SYS_TEXT_BASE 0xFC000000
51 /* On a Cameron or on a FO300 board or ... */
52 #if !defined(CONFIG_CAM5200) && !defined(CONFIG_CHARON) \
53 && !defined(CONFIG_FO300)
54 #define CONFIG_STK52XX 1 /* ... on a STK52XX board */
57 #define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
59 #define CONFIG_HIGH_BATS 1 /* High BATs supported */
62 * Serial console configuration
64 #define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
65 #define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
66 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
67 #define CONFIG_BOOTCOUNT_LIMIT 1
70 #define CONFIG_SYS_DEVICE_NULLDEV 1 /* enable null device */
71 #define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
72 #define CONFIG_BOARD_EARLY_INIT_F 1 /* used to detect S1 switch position */
73 #define CONFIG_USB_BIN_FIXUP 1 /* for a buggy USB device */
75 #define FO300_SILENT_CONSOLE_WHEN_S1_CLOSED 1 /* silent console on PSC1 when S1 */
76 /* switch is closed */
79 #undef FO300_SILENT_CONSOLE_WHEN_S1_CLOSED /* silent console on PSC1 when S1 */
81 #endif /* CONFIG_FO300 */
83 #if defined(CONFIG_CHARON) || defined(CONFIG_STK52XX)
84 #define CONFIG_PS2KBD /* AT-PS/2 Keyboard */
85 #define CONFIG_PS2MULT /* .. on PS/2 Multiplexer */
86 #define CONFIG_PS2SERIAL 6 /* .. on PSC6 */
87 #define CONFIG_PS2MULT_DELAY (CONFIG_SYS_HZ/2) /* Initial delay */
88 #define CONFIG_BOARD_EARLY_INIT_R
89 #endif /* CONFIG_STK52XX */
93 * 0x40000000 - 0x4fffffff - PCI Memory
94 * 0x50000000 - 0x50ffffff - PCI IO Space
96 #if defined(CONFIG_CHARON) || defined(CONFIG_STK52XX)
98 #define CONFIG_PCI_PNP 1
99 /* #define CONFIG_PCI_SCAN_SHOW 1 */
101 #define CONFIG_PCI_MEM_BUS 0x40000000
102 #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
103 #define CONFIG_PCI_MEM_SIZE 0x10000000
105 #define CONFIG_PCI_IO_BUS 0x50000000
106 #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
107 #define CONFIG_PCI_IO_SIZE 0x01000000
109 #define CONFIG_EEPRO100 1
110 #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
111 #define CONFIG_NS8382X 1
112 #endif /* CONFIG_STK52XX */
117 #ifndef CONFIG_TQM5200S /* No graphics controller on TQM5200S */
119 #define CONFIG_VIDEO_SM501
120 #define CONFIG_VIDEO_SM501_32BPP
121 #define CONFIG_CFB_CONSOLE
122 #define CONFIG_VIDEO_LOGO
125 #define CONFIG_CONSOLE_EXTRA_INFO
127 #define CONFIG_VIDEO_BMP_LOGO
130 #define CONFIG_VGA_AS_SINGLE_DEVICE
131 #define CONFIG_VIDEO_SW_CURSOR
132 #define CONFIG_SPLASH_SCREEN
133 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
134 #endif /* #ifndef CONFIG_TQM5200S */
138 #define CONFIG_MAC_PARTITION
139 #define CONFIG_DOS_PARTITION
140 #define CONFIG_ISO_PARTITION
143 #if defined(CONFIG_CHARON) || defined(CONFIG_FO300) || \
144 defined(CONFIG_STK52XX)
145 #define CONFIG_USB_OHCI_NEW
146 #define CONFIG_SYS_OHCI_BE_CONTROLLER
147 #define CONFIG_USB_STORAGE
148 #define CONFIG_CMD_FAT
149 #define CONFIG_CMD_USB
151 #undef CONFIG_SYS_USB_OHCI_BOARD_INIT
152 #define CONFIG_SYS_USB_OHCI_CPU_INIT
153 #define CONFIG_SYS_USB_OHCI_REGS_BASE MPC5XXX_USB
154 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "mpc5200"
155 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
159 #ifndef CONFIG_CAM5200
161 #define CONFIG_POST (CONFIG_SYS_POST_MEMORY | \
162 CONFIG_SYS_POST_CPU | \
167 /* preserve space for the post_word at end of on-chip SRAM */
168 #define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
175 #define CONFIG_BOOTP_BOOTFILESIZE
176 #define CONFIG_BOOTP_BOOTPATH
177 #define CONFIG_BOOTP_GATEWAY
178 #define CONFIG_BOOTP_HOSTNAME
182 * Command line configuration.
184 #include <config_cmd_default.h>
186 #define CONFIG_CMD_ASKENV
187 #define CONFIG_CMD_DATE
188 #define CONFIG_CMD_DHCP
189 #define CONFIG_CMD_EEPROM
190 #define CONFIG_CMD_I2C
191 #define CONFIG_CMD_JFFS2
192 #define CONFIG_CMD_MII
193 #define CONFIG_CMD_NFS
194 #define CONFIG_CMD_PING
195 #define CONFIG_CMD_REGINFO
196 #define CONFIG_CMD_SNTP
197 #define CONFIG_CMD_BSP
200 #define CONFIG_CMD_BMP
204 #define CONFIG_CMD_PCI
205 #define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
208 #if defined(CONFIG_CHARON) || defined(CONFIG_FO300) || \
209 defined(CONFIG_MINIFAP) || defined(CONFIG_STK52XX)
210 #define CONFIG_CMD_IDE
211 #define CONFIG_CMD_FAT
212 #define CONFIG_CMD_EXT2
215 #if defined(CONFIG_CHARON) || defined(CONFIG_FO300) || \
216 defined(CONFIG_STK52XX)
217 #define CONFIG_CFG_USB
218 #define CONFIG_CFG_FAT
222 #define CONFIG_CMD_DIAG
226 #define CONFIG_TIMESTAMP /* display image timestamps */
228 #if (CONFIG_SYS_TEXT_BASE != 0xFFF00000)
229 # define CONFIG_SYS_LOWBOOT 1 /* Boot low */
235 #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
237 #define CONFIG_PREBOOT "echo;" \
238 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
241 #undef CONFIG_BOOTARGS
243 #if defined(CONFIG_TQM5200_B) && !defined(CONFIG_SYS_LOWBOOT)
245 "update=protect off FFF00000 +${filesize};" \
246 "erase FFF00000 +${filesize};" \
247 "cp.b 200000 FFF00000 ${filesize};" \
248 "protect on FFF00000 +${filesize}\0"
249 #else /* default lowboot configuration */
251 "update=protect off FC000000 +${filesize};" \
252 "erase FC000000 +${filesize};" \
253 "cp.b 200000 FC000000 ${filesize};" \
254 "protect on FC000000 +${filesize}\0"
257 #if defined(CONFIG_TQM5200)
258 #define CUSTOM_ENV_SETTINGS \
259 "hostname=tqm5200\0" \
260 "bootfile=/tftpboot/tqm5200/uImage\0" \
261 "fdt_file=/tftpboot/tqm5200/tqm5200.dtb\0" \
262 "u-boot=/tftpboot/tqm5200/u-boot.bin\0"
263 #elif defined(CONFIG_CAM5200)
264 #define CUSTOM_ENV_SETTINGS \
265 "bootfile=cam5200/uImage\0" \
266 "u-boot=cam5200/u-boot.bin\0" \
267 "setup=tftp 200000 cam5200/setup.img; source 200000\0"
270 #if defined(CONFIG_TQM5200_B)
271 #define ENV_FLASH_LAYOUT \
272 "fdt_addr=FC100000\0" \
273 "kernel_addr=FC140000\0" \
274 "ramdisk_addr=FC600000\0"
275 #elif defined(CONFIG_CHARON)
276 #define ENV_FLASH_LAYOUT \
277 "fdt_addr=FDFC0000\0" \
278 "kernel_addr=FC0A0000\0" \
279 "ramdisk_addr=FC200000\0"
280 #else /* !CONFIG_TQM5200_B */
281 #define ENV_FLASH_LAYOUT \
282 "fdt_addr=FC0A0000\0" \
283 "kernel_addr=FC0C0000\0" \
284 "ramdisk_addr=FC300000\0"
287 #define CONFIG_EXTRA_ENV_SETTINGS \
289 "console=ttyPSC0\0" \
291 "kernel_addr_r=400000\0" \
292 "fdt_addr_r=600000\0" \
293 "rootpath=/opt/eldk/ppc_6xx\0" \
294 "ramargs=setenv bootargs root=/dev/ram rw\0" \
295 "nfsargs=setenv bootargs root=/dev/nfs rw " \
296 "nfsroot=${serverip}:${rootpath}\0" \
297 "addip=setenv bootargs ${bootargs} " \
298 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
299 ":${hostname}:${netdev}:off panic=1\0" \
300 "addcons=setenv bootargs ${bootargs} " \
301 "console=${console},${baudrate}\0" \
302 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
303 "flash_self_old=sete console ttyS0; " \
304 "run ramargs addip addcons addmtd; " \
305 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
306 "flash_self=run ramargs addip addcons;" \
307 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
308 "flash_nfs_old=sete console ttyS0; run nfsargs addip addcons;" \
309 "bootm ${kernel_addr}\0" \
310 "flash_nfs=run nfsargs addip addcons;" \
311 "bootm ${kernel_addr} - ${fdt_addr}\0" \
312 "net_nfs_old=tftp ${kernel_addr_r} ${bootfile};" \
313 "sete console ttyS0; run nfsargs addip addcons;bootm\0" \
314 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
315 "tftp ${fdt_addr_r} ${fdt_file}; " \
316 "run nfsargs addip addcons addmtd; " \
317 "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
318 CUSTOM_ENV_SETTINGS \
319 "load=tftp 200000 ${u-boot}\0" \
323 #define CONFIG_BOOTCOMMAND "run net_nfs"
326 * IPB Bus clocking configuration.
328 #define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
330 #if defined(CONFIG_SYS_IPBCLK_EQUALS_XLBCLK) && !defined(CONFIG_CAM5200)
332 * PCI Bus clocking configuration
334 * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
335 * CONFIG_SYS_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock of
336 * 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
338 #define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */
344 #define CONFIG_HARD_I2C 1 /* I2C with hardware support */
345 #ifdef CONFIG_TQM5200_REV100
346 #define CONFIG_SYS_I2C_MODULE 1 /* Select I2C module #1 for rev. 100 board */
348 #define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #2 for all other revs */
352 * I2C clock frequency
354 * Please notice, that the resulting clock frequency could differ from the
355 * configured value. This is because the I2C clock is derived from system
356 * clock over a frequency divider with only a few divider values. U-boot
357 * calculates the best approximation for CONFIG_SYS_I2C_SPEED. However the calculated
358 * approximation allways lies below the configured value, never above.
360 #define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
361 #define CONFIG_SYS_I2C_SLAVE 0x7F
364 * EEPROM configuration for onboard EEPROM M24C32 (M24C64 should work
365 * also). For other EEPROMs configuration should be verified. On Mini-FAP the
366 * EEPROM (24C64) is on the same I2C address (but on other I2C bus), so the
367 * same configuration could be used.
369 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
370 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
371 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* =32 Bytes per write */
372 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
375 * HW-Monitor configuration on Mini-FAP
377 #if defined (CONFIG_MINIFAP)
378 #define CONFIG_SYS_I2C_HWMON_ADDR 0x2C
381 /* List of I2C addresses to be verified by POST */
382 #if defined (CONFIG_MINIFAP)
383 #undef CONFIG_SYS_POST_I2C_ADDRS
384 #define CONFIG_SYS_POST_I2C_ADDRS {CONFIG_SYS_I2C_EEPROM_ADDR, \
385 CONFIG_SYS_I2C_HWMON_ADDR, \
386 CONFIG_SYS_I2C_SLAVE}
390 * Flash configuration
392 #define CONFIG_SYS_FLASH_BASE 0xFC000000
394 #if defined(CONFIG_CAM5200) && defined(CONFIG_CAM5200_NIOSFLASH)
395 #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max num of flash banks
397 #define CONFIG_SYS_FLASH_WORD_SIZE unsigned int /* main flash device with */
398 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
399 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
401 #define CONFIG_SYS_FLASH_ADDR0 0x555
402 #define CONFIG_SYS_FLASH_ADDR1 0x2AA
403 #define CONFIG_SYS_FLASH_2ND_16BIT_DEV 1 /* NIOS flash is a 16bit device */
404 #define CONFIG_SYS_MAX_FLASH_SECT 128
406 /* use CFI flash driver */
407 #define CONFIG_SYS_FLASH_CFI 1 /* Flash is CFI conformant */
408 #define CONFIG_FLASH_CFI_DRIVER 1 /* Use the common driver */
409 #define CONFIG_FLASH_CFI_MTD /* with MTD support */
410 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_BOOTCS_START }
411 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks
413 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max num of sects on one chip */
416 #define CONFIG_SYS_FLASH_EMPTY_INFO
417 #define CONFIG_SYS_FLASH_SIZE 0x04000000 /* 64 MByte */
418 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
420 #if defined (CONFIG_CAM5200)
421 # define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00040000)
422 #elif defined(CONFIG_TQM5200_B)
423 # define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00080000)
425 # define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00060000)
428 /* Dynamic MTD partition support */
429 #define CONFIG_CMD_MTDPARTS
430 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
431 #define MTDIDS_DEFAULT "nor0=fc000000.flash"
433 #if defined(CONFIG_STK52XX)
434 # if defined(CONFIG_TQM5200_B)
435 # if defined(CONFIG_SYS_LOWBOOT)
436 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:1m(firmware)," \
443 # else /* highboot */
444 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:2560k(kernel),"\
450 # endif /* CONFIG_SYS_LOWBOOT */
451 # else /* !CONFIG_TQM5200_B */
452 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:640k(firmware),"\
459 # endif /* CONFIG_TQM5200_B */
460 #elif defined (CONFIG_CAM5200)
461 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:768k(firmware),"\
465 #elif defined (CONFIG_CHARON)
466 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:640k(firmware),"\
472 #elif defined (CONFIG_FO300)
473 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:640k(firmware),"\
480 # error "Unknown Carrier Board"
481 #endif /* CONFIG_STK52XX */
484 * Environment settings
486 #define CONFIG_ENV_IS_IN_FLASH 1
487 #define CONFIG_ENV_SIZE 0x4000 /* 16 k - keep small for fast booting */
488 #if defined(CONFIG_TQM5200_B) || defined (CONFIG_CAM5200)
489 #define CONFIG_ENV_SECT_SIZE 0x40000
491 #define CONFIG_ENV_SECT_SIZE 0x20000
492 #endif /* CONFIG_TQM5200_B */
493 #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
494 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
499 #define CONFIG_SYS_MBAR 0xF0000000
500 #define CONFIG_SYS_SDRAM_BASE 0x00000000
501 #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
503 /* Use ON-Chip SRAM until RAM will be available */
504 #define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
506 /* preserve space for the post_word at end of on-chip SRAM */
507 #define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_POST_SIZE
509 #define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE
513 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
514 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
516 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
517 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
518 # define CONFIG_SYS_RAMBOOT 1
521 #if defined (CONFIG_CAM5200)
522 # define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
523 #elif defined(CONFIG_TQM5200_B)
524 # define CONFIG_SYS_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */
526 # define CONFIG_SYS_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
529 #define CONFIG_SYS_MALLOC_LEN (1024 << 10) /* Reserve 1024 kB for malloc() */
530 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
533 * Ethernet configuration
535 #define CONFIG_MPC5xxx_FEC 1
536 #define CONFIG_MPC5xxx_FEC_MII100
538 * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
540 /* #define CONFIG_MPC5xxx_FEC_MII10 */
541 #define CONFIG_PHY_ADDR 0x00
546 * use CS1: Bit 0 (mask: 0x80000000):
547 * 1 -> Pin gpio_wkup_6 as second SDRAM chip select (mem_cs1).
548 * use ALT CAN position: Bits 2-3 (mask: 0x30000000):
549 * 00 -> No Alternatives, CAN1/2 on PSC2 according to PSC2 setting.
550 * SPI on PSC3 according to PSC3 setting. Use for CAM5200.
551 * 01 -> CAN1 on I2C1, CAN2 on Tmr0/1.
552 * Use for REV200 STK52XX boards and FO300 boards. Do not use
553 * with REV100 modules (because, there I2C1 is used as I2C bus).
554 * use ATA: Bits 6-7 (mask 0x03000000):
555 * 00 -> No ATA chip selects, csb_4/5 used as normal chip selects.
556 * Use for CAM5200 board.
557 * 01 -> ATA cs0/1 on csb_4/5. Use for the remaining boards.
558 * use PSC6: Bits 9-11 (mask 0x00700000):
559 * 000 -> use PSC6_0 to PSC6_3 as GPIO, PSC6 could not be used as
560 * UART, CODEC or IrDA.
561 * GPIO on PSC6_3 is used in post_hotkeys_pressed() to
562 * enable extended POST tests.
563 * Use for MINI-FAP and TQM5200_IB boards.
564 * 101 -> use PSC6 as UART. Pins PSC6_0 to PSC6_3 are used.
565 * Extended POST test is not available.
566 * Use for STK52xx, FO300 and CAM5200 boards.
567 * WARNING: When the extended POST is enabled, these bits will
568 * be overridden by this code as GPIOs!
569 * use PCI_DIS: Bit 16 (mask 0x00008000):
570 * 1 -> disable PCI controller (on CAM5200 board).
571 * use USB: Bits 18-19 (mask 0x00003000):
572 * 10 -> two UARTs (on FO300 and CAM5200).
573 * use PSC3: Bits 20-23 (mask: 0x00000f00):
574 * 0000 -> All PSC3 pins are GPIOs.
575 * 1100 -> UART/SPI (on FO300 board).
576 * 0100 -> UART (on CAM5200 board).
577 * use PSC2: Bits 25:27 (mask: 0x00000030):
578 * 000 -> All PSC2 pins are GPIOs.
579 * 100 -> UART (on CAM5200 board).
580 * 001 -> CAN1/2 on PSC2 pins.
581 * Use for REV100 STK52xx boards
582 * 01x -> Use AC97 (on FO300 board).
583 * use PSC1: Bits 29-31 (mask: 0x00000007):
584 * 100 -> UART (on all boards).
586 #if !defined(CONFIG_SYS_GPS_PORT_CONFIG)
587 #if defined (CONFIG_MINIFAP)
588 # define CONFIG_SYS_GPS_PORT_CONFIG 0x91000004
589 #elif defined (CONFIG_STK52XX)
590 # if defined (CONFIG_STK52XX_REV100)
591 # define CONFIG_SYS_GPS_PORT_CONFIG 0x81500014
592 # else /* STK52xx REV200 and above */
593 # if defined (CONFIG_TQM5200_REV100)
594 # error TQM5200 REV100 not supported on STK52XX REV200 or above
595 # else/* TQM5200 REV200 and above */
596 # define CONFIG_SYS_GPS_PORT_CONFIG 0x91500404
599 #elif defined (CONFIG_FO300)
600 # define CONFIG_SYS_GPS_PORT_CONFIG 0x91502c24
601 #elif defined (CONFIG_CAM5200)
602 # define CONFIG_SYS_GPS_PORT_CONFIG 0x8050A444
603 #else /* TMQ5200 Inbetriebnahme-Board */
604 # define CONFIG_SYS_GPS_PORT_CONFIG 0x81000004
611 #if defined (CONFIG_STK52XX) && !defined (CONFIG_STK52XX_REV100)
612 # define CONFIG_RTC_M41T11 1
613 # define CONFIG_SYS_I2C_RTC_ADDR 0x68
614 # define CONFIG_SYS_M41T11_BASE_YEAR 1900 /* because Linux uses the same base
617 # define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
621 * Miscellaneous configurable options
623 #define CONFIG_SYS_LONGHELP /* undef to save memory */
624 #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
626 #define CONFIG_CMDLINE_EDITING 1 /* add command line history */
627 #define CONFIG_SYS_HUSH_PARSER 1 /* use "hush" command parser */
629 #define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
630 #if defined(CONFIG_CMD_KGDB)
631 #define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
634 #if defined(CONFIG_CMD_KGDB)
635 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
637 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
639 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
640 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
641 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
643 /* Enable an alternate, more extensive memory test */
644 #define CONFIG_SYS_ALT_MEMTEST
646 #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
647 #define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
649 #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
651 #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
654 * Enable loopw command.
659 * Various low-level settings
661 #define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
662 #define CONFIG_SYS_HID0_FINAL HID0_ICE
664 #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
665 #define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
666 #ifdef CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2
667 #define CONFIG_SYS_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */
669 #define CONFIG_SYS_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */
671 #define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
672 #define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
674 #define CONFIG_LAST_STAGE_INIT
677 * SRAM - Do not map below 2 GB in address space, because this area is used
678 * for SDRAM autosizing.
680 #define CONFIG_SYS_CS2_START 0xE5000000
681 #define CONFIG_SYS_CS2_SIZE 0x100000 /* 1 MByte */
682 #define CONFIG_SYS_CS2_CFG 0x0004D930
685 * Grafic controller - Do not map below 2 GB in address space, because this
686 * area is used for SDRAM autosizing.
688 #define SM501_FB_BASE 0xE0000000
689 #define CONFIG_SYS_CS1_START (SM501_FB_BASE)
690 #define CONFIG_SYS_CS1_SIZE 0x4000000 /* 64 MByte */
691 #define CONFIG_SYS_CS1_CFG 0x8F48FF70
692 #define SM501_MMIO_BASE CONFIG_SYS_CS1_START + 0x03E00000
694 #define CONFIG_SYS_CS_BURST 0x00000000
695 #define CONFIG_SYS_CS_DEADCYCLE 0x33333311 /* 1 dead cycle for flash and SM501 */
697 #if defined(CONFIG_CAM5200)
698 #define CONFIG_SYS_CS4_START 0xB0000000
699 #define CONFIG_SYS_CS4_SIZE 0x00010000
700 #define CONFIG_SYS_CS4_CFG 0x01019C10
702 #define CONFIG_SYS_CS5_START 0xD0000000
703 #define CONFIG_SYS_CS5_SIZE 0x01208000
704 #define CONFIG_SYS_CS5_CFG 0x1414BF10
707 #define CONFIG_SYS_RESET_ADDRESS 0xff000000
709 /*-----------------------------------------------------------------------
711 *-----------------------------------------------------------------------
713 #define CONFIG_USB_CLOCK 0x0001BBBB
714 #define CONFIG_USB_CONFIG 0x00001000
716 /*-----------------------------------------------------------------------
717 * IDE/ATA stuff Supports IDE harddisk
718 *-----------------------------------------------------------------------
721 #undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
723 #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
724 #undef CONFIG_IDE_LED /* LED for ide not supported */
726 #define CONFIG_IDE_RESET /* reset for ide supported */
727 #define CONFIG_IDE_PREINIT
729 #define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
730 #define CONFIG_SYS_IDE_MAXDEVICE 2 /* max. 2 drives per IDE bus */
732 #define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
734 #define CONFIG_SYS_ATA_BASE_ADDR MPC5XXX_ATA
736 /* Offset for data I/O */
737 #define CONFIG_SYS_ATA_DATA_OFFSET (0x0060)
739 /* Offset for normal register accesses */
740 #define CONFIG_SYS_ATA_REG_OFFSET (CONFIG_SYS_ATA_DATA_OFFSET)
742 /* Offset for alternate registers */
743 #define CONFIG_SYS_ATA_ALT_OFFSET (0x005C)
745 /* Interval between registers */
746 #define CONFIG_SYS_ATA_STRIDE 4
748 /* Support ATAPI devices */
749 #define CONFIG_ATAPI 1
751 /*-----------------------------------------------------------------------
752 * Open firmware flat tree support
753 *-----------------------------------------------------------------------
755 #define CONFIG_OF_LIBFDT 1
756 #define CONFIG_OF_BOARD_SETUP 1
758 #define OF_CPU "PowerPC,5200@0"
759 #define OF_SOC "soc5200@f0000000"
760 #define OF_TBCLK (bd->bi_busfreq / 4)
761 #define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
763 #endif /* __CONFIG_H */