2 * (C) Copyright 2003-2014
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * (C) Copyright 2004-2006
6 * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
8 * SPDX-License-Identifier: GPL-2.0+
15 * High Level Configuration Options
19 #define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */
20 #define CONFIG_TQM5200 1 /* ... on TQM5200 module */
21 #undef CONFIG_TQM5200_REV100 /* define for revision 100 modules */
22 #define CONFIG_DISPLAY_BOARDINFO
25 * Valid values for CONFIG_SYS_TEXT_BASE are:
26 * 0xFC000000 boot low (standard configuration with room for
27 * max 64 MByte Flash ROM)
28 * 0xFFF00000 boot high (for a backup copy of U-Boot)
29 * 0x00100000 boot from RAM (for testing only)
31 #ifndef CONFIG_SYS_TEXT_BASE
32 #define CONFIG_SYS_TEXT_BASE 0xFC000000
35 /* On a Cameron or on a FO300 board or ... */
36 #if !defined(CONFIG_CAM5200) && !defined(CONFIG_CHARON) \
37 && !defined(CONFIG_FO300)
38 #define CONFIG_STK52XX 1 /* ... on a STK52XX board */
41 #define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
43 #define CONFIG_HIGH_BATS 1 /* High BATs supported */
46 * Serial console configuration
48 #define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
49 #define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
50 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
51 #define CONFIG_BOOTCOUNT_LIMIT 1
54 #define CONFIG_SYS_DEVICE_NULLDEV 1 /* enable null device */
55 #define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
56 #define CONFIG_BOARD_EARLY_INIT_F 1 /* used to detect S1 switch position */
57 #define CONFIG_USB_BIN_FIXUP 1 /* for a buggy USB device */
59 #define FO300_SILENT_CONSOLE_WHEN_S1_CLOSED 1 /* silent console on PSC1 when S1 */
60 /* switch is closed */
63 #undef FO300_SILENT_CONSOLE_WHEN_S1_CLOSED /* silent console on PSC1 when S1 */
65 #endif /* CONFIG_FO300 */
67 #if defined(CONFIG_CHARON) || defined(CONFIG_STK52XX)
68 #define CONFIG_PS2KBD /* AT-PS/2 Keyboard */
69 #define CONFIG_PS2MULT /* .. on PS/2 Multiplexer */
70 #define CONFIG_PS2SERIAL 6 /* .. on PSC6 */
71 #define CONFIG_PS2MULT_DELAY (CONFIG_SYS_HZ/2) /* Initial delay */
72 #define CONFIG_BOARD_EARLY_INIT_R
73 #endif /* CONFIG_STK52XX */
77 * 0x40000000 - 0x4fffffff - PCI Memory
78 * 0x50000000 - 0x50ffffff - PCI IO Space
80 #if defined(CONFIG_CHARON) || defined(CONFIG_STK52XX)
82 #define CONFIG_PCI_PNP 1
83 /* #define CONFIG_PCI_SCAN_SHOW 1 */
85 #define CONFIG_PCI_MEM_BUS 0x40000000
86 #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
87 #define CONFIG_PCI_MEM_SIZE 0x10000000
89 #define CONFIG_PCI_IO_BUS 0x50000000
90 #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
91 #define CONFIG_PCI_IO_SIZE 0x01000000
93 #define CONFIG_EEPRO100 1
94 #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
95 #define CONFIG_NS8382X 1
96 #endif /* CONFIG_STK52XX */
101 #ifndef CONFIG_TQM5200S /* No graphics controller on TQM5200S */
103 #define CONFIG_VIDEO_SM501
104 #define CONFIG_VIDEO_SM501_32BPP
105 #define CONFIG_CFB_CONSOLE
106 #define CONFIG_VIDEO_LOGO
109 #define CONFIG_CONSOLE_EXTRA_INFO
111 #define CONFIG_VIDEO_BMP_LOGO
114 #define CONFIG_VGA_AS_SINGLE_DEVICE
115 #define CONFIG_VIDEO_SW_CURSOR
116 #define CONFIG_SPLASH_SCREEN
117 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
118 #endif /* #ifndef CONFIG_TQM5200S */
121 #define CONFIG_MAC_PARTITION
122 #define CONFIG_DOS_PARTITION
123 #define CONFIG_ISO_PARTITION
126 #if defined(CONFIG_CHARON) || defined(CONFIG_FO300) || \
127 defined(CONFIG_STK52XX)
128 #define CONFIG_USB_OHCI_NEW
129 #define CONFIG_SYS_OHCI_BE_CONTROLLER
130 #define CONFIG_USB_STORAGE
132 #undef CONFIG_SYS_USB_OHCI_BOARD_INIT
133 #define CONFIG_SYS_USB_OHCI_CPU_INIT
134 #define CONFIG_SYS_USB_OHCI_REGS_BASE MPC5XXX_USB
135 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "mpc5200"
136 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
140 #ifndef CONFIG_CAM5200
142 #define CONFIG_POST (CONFIG_SYS_POST_MEMORY | \
143 CONFIG_SYS_POST_CPU | \
148 /* preserve space for the post_word at end of on-chip SRAM */
149 #define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
155 #define CONFIG_BOOTP_BOOTFILESIZE
156 #define CONFIG_BOOTP_BOOTPATH
157 #define CONFIG_BOOTP_GATEWAY
158 #define CONFIG_BOOTP_HOSTNAME
161 * Command line configuration.
163 #define CONFIG_CMD_DATE
164 #define CONFIG_CMD_EEPROM
165 #define CONFIG_CMD_JFFS2
166 #define CONFIG_CMD_REGINFO
167 #define CONFIG_CMD_BSP
170 #define CONFIG_CMD_BMP
174 #define CONFIG_CMD_PCI
175 #define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
178 #if defined(CONFIG_CHARON) || defined(CONFIG_FO300) || \
179 defined(CONFIG_MINIFAP) || defined(CONFIG_STK52XX)
180 #define CONFIG_CMD_IDE
183 #if defined(CONFIG_CHARON) || defined(CONFIG_FO300) || \
184 defined(CONFIG_STK52XX)
185 #define CONFIG_CFG_USB
186 #define CONFIG_CFG_FAT
190 #define CONFIG_CMD_DIAG
193 #define CONFIG_TIMESTAMP /* display image timestamps */
195 #if (CONFIG_SYS_TEXT_BASE != 0xFFF00000)
196 # define CONFIG_SYS_LOWBOOT 1 /* Boot low */
203 #define CONFIG_PREBOOT "echo;" \
204 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
207 #undef CONFIG_BOOTARGS
209 #if defined(CONFIG_TQM5200_B) && !defined(CONFIG_SYS_LOWBOOT)
211 "update=protect off FFF00000 +${filesize};" \
212 "erase FFF00000 +${filesize};" \
213 "cp.b 200000 FFF00000 ${filesize};" \
214 "protect on FFF00000 +${filesize}\0"
215 #else /* default lowboot configuration */
217 "update=protect off FC000000 +${filesize};" \
218 "erase FC000000 +${filesize};" \
219 "cp.b 200000 FC000000 ${filesize};" \
220 "protect on FC000000 +${filesize}\0"
223 #if defined(CONFIG_TQM5200)
224 #define CUSTOM_ENV_SETTINGS \
225 "hostname=tqm5200\0" \
226 "bootfile=/tftpboot/tqm5200/uImage\0" \
227 "fdt_file=/tftpboot/tqm5200/tqm5200.dtb\0" \
228 "u-boot=/tftpboot/tqm5200/u-boot.bin\0"
229 #elif defined(CONFIG_CAM5200)
230 #define CUSTOM_ENV_SETTINGS \
231 "bootfile=cam5200/uImage\0" \
232 "u-boot=cam5200/u-boot.bin\0" \
233 "setup=tftp 200000 cam5200/setup.img; source 200000\0"
236 #if defined(CONFIG_TQM5200_B)
237 #define ENV_FLASH_LAYOUT \
238 "fdt_addr=FC100000\0" \
239 "kernel_addr=FC140000\0" \
240 "ramdisk_addr=FC600000\0"
241 #elif defined(CONFIG_CHARON)
242 #define ENV_FLASH_LAYOUT \
243 "fdt_addr=FDFC0000\0" \
244 "kernel_addr=FC0A0000\0" \
245 "ramdisk_addr=FC200000\0"
246 #else /* !CONFIG_TQM5200_B */
247 #define ENV_FLASH_LAYOUT \
248 "fdt_addr=FC0A0000\0" \
249 "kernel_addr=FC0C0000\0" \
250 "ramdisk_addr=FC300000\0"
253 #define CONFIG_EXTRA_ENV_SETTINGS \
255 "console=ttyPSC0\0" \
257 "kernel_addr_r=400000\0" \
258 "fdt_addr_r=600000\0" \
259 "rootpath=/opt/eldk/ppc_6xx\0" \
260 "ramargs=setenv bootargs root=/dev/ram rw\0" \
261 "nfsargs=setenv bootargs root=/dev/nfs rw " \
262 "nfsroot=${serverip}:${rootpath}\0" \
263 "addip=setenv bootargs ${bootargs} " \
264 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
265 ":${hostname}:${netdev}:off panic=1\0" \
266 "addcons=setenv bootargs ${bootargs} " \
267 "console=${console},${baudrate}\0" \
268 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
269 "flash_self_old=sete console ttyS0; " \
270 "run ramargs addip addcons addmtd; " \
271 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
272 "flash_self=run ramargs addip addcons;" \
273 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
274 "flash_nfs_old=sete console ttyS0; run nfsargs addip addcons;" \
275 "bootm ${kernel_addr}\0" \
276 "flash_nfs=run nfsargs addip addcons;" \
277 "bootm ${kernel_addr} - ${fdt_addr}\0" \
278 "net_nfs_old=tftp ${kernel_addr_r} ${bootfile};" \
279 "sete console ttyS0; run nfsargs addip addcons;bootm\0" \
280 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
281 "tftp ${fdt_addr_r} ${fdt_file}; " \
282 "run nfsargs addip addcons addmtd; " \
283 "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
284 CUSTOM_ENV_SETTINGS \
285 "load=tftp 200000 ${u-boot}\0" \
289 #define CONFIG_BOOTCOMMAND "run net_nfs"
292 * IPB Bus clocking configuration.
294 #define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
296 #if defined(CONFIG_SYS_IPBCLK_EQUALS_XLBCLK) && !defined(CONFIG_CAM5200)
298 * PCI Bus clocking configuration
300 * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
301 * CONFIG_SYS_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock of
302 * 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
304 #define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */
310 #define CONFIG_HARD_I2C 1 /* I2C with hardware support */
311 #ifdef CONFIG_TQM5200_REV100
312 #define CONFIG_SYS_I2C_MODULE 1 /* Select I2C module #1 for rev. 100 board */
314 #define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #2 for all other revs */
318 * I2C clock frequency
320 * Please notice, that the resulting clock frequency could differ from the
321 * configured value. This is because the I2C clock is derived from system
322 * clock over a frequency divider with only a few divider values. U-Boot
323 * calculates the best approximation for CONFIG_SYS_I2C_SPEED. However the calculated
324 * approximation allways lies below the configured value, never above.
326 #define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
327 #define CONFIG_SYS_I2C_SLAVE 0x7F
330 * EEPROM configuration for onboard EEPROM M24C32 (M24C64 should work
331 * also). For other EEPROMs configuration should be verified. On Mini-FAP the
332 * EEPROM (24C64) is on the same I2C address (but on other I2C bus), so the
333 * same configuration could be used.
335 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
336 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
337 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* =32 Bytes per write */
338 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
341 * HW-Monitor configuration on Mini-FAP
343 #if defined (CONFIG_MINIFAP)
344 #define CONFIG_SYS_I2C_HWMON_ADDR 0x2C
347 /* List of I2C addresses to be verified by POST */
348 #if defined (CONFIG_MINIFAP)
349 #undef CONFIG_SYS_POST_I2C_ADDRS
350 #define CONFIG_SYS_POST_I2C_ADDRS {CONFIG_SYS_I2C_EEPROM_ADDR, \
351 CONFIG_SYS_I2C_HWMON_ADDR, \
352 CONFIG_SYS_I2C_SLAVE}
356 * Flash configuration
358 #define CONFIG_SYS_FLASH_BASE 0xFC000000
360 #if defined(CONFIG_CAM5200) && defined(CONFIG_CAM5200_NIOSFLASH)
361 #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max num of flash banks
363 #define CONFIG_SYS_FLASH_WORD_SIZE unsigned int /* main flash device with */
364 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
365 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
367 #define CONFIG_SYS_FLASH_ADDR0 0x555
368 #define CONFIG_SYS_FLASH_ADDR1 0x2AA
369 #define CONFIG_SYS_FLASH_2ND_16BIT_DEV 1 /* NIOS flash is a 16bit device */
370 #define CONFIG_SYS_MAX_FLASH_SECT 128
372 /* use CFI flash driver */
373 #define CONFIG_SYS_FLASH_CFI 1 /* Flash is CFI conformant */
374 #define CONFIG_FLASH_CFI_DRIVER 1 /* Use the common driver */
375 #define CONFIG_FLASH_CFI_MTD /* with MTD support */
376 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_BOOTCS_START }
377 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks
379 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max num of sects on one chip */
382 #define CONFIG_SYS_FLASH_EMPTY_INFO
383 #define CONFIG_SYS_FLASH_SIZE 0x04000000 /* 64 MByte */
384 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
386 #if defined (CONFIG_CAM5200)
387 # define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00040000)
388 #elif defined(CONFIG_TQM5200_B)
389 # define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00080000)
391 # define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00060000)
394 /* Dynamic MTD partition support */
395 #define CONFIG_CMD_MTDPARTS
396 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
397 #define MTDIDS_DEFAULT "nor0=fc000000.flash"
399 #if defined(CONFIG_STK52XX)
400 # if defined(CONFIG_TQM5200_B)
401 # if defined(CONFIG_SYS_LOWBOOT)
402 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:1m(firmware)," \
409 # else /* highboot */
410 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:2560k(kernel),"\
416 # endif /* CONFIG_SYS_LOWBOOT */
417 # else /* !CONFIG_TQM5200_B */
418 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:640k(firmware),"\
425 # endif /* CONFIG_TQM5200_B */
426 #elif defined (CONFIG_CAM5200)
427 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:768k(firmware),"\
431 #elif defined (CONFIG_CHARON)
432 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:640k(firmware),"\
438 #elif defined (CONFIG_FO300)
439 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:640k(firmware),"\
446 # error "Unknown Carrier Board"
447 #endif /* CONFIG_STK52XX */
450 * Environment settings
452 #define CONFIG_ENV_IS_IN_FLASH 1
453 #define CONFIG_ENV_SIZE 0x4000 /* 16 k - keep small for fast booting */
454 #if defined(CONFIG_TQM5200_B) || defined (CONFIG_CAM5200)
455 #define CONFIG_ENV_SECT_SIZE 0x40000
457 #define CONFIG_ENV_SECT_SIZE 0x20000
458 #endif /* CONFIG_TQM5200_B */
459 #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
460 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
465 #define CONFIG_SYS_MBAR 0xF0000000
466 #define CONFIG_SYS_SDRAM_BASE 0x00000000
467 #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
469 /* Use ON-Chip SRAM until RAM will be available */
470 #define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
472 /* preserve space for the post_word at end of on-chip SRAM */
473 #define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_POST_SIZE
475 #define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE
478 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
479 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
481 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
482 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
483 # define CONFIG_SYS_RAMBOOT 1
486 #if defined (CONFIG_CAM5200)
487 # define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
488 #elif defined(CONFIG_TQM5200_B)
489 # define CONFIG_SYS_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */
491 # define CONFIG_SYS_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
494 #define CONFIG_SYS_MALLOC_LEN (1024 << 10) /* Reserve 1024 kB for malloc() */
495 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
498 * Ethernet configuration
500 #define CONFIG_MPC5xxx_FEC 1
501 #define CONFIG_MPC5xxx_FEC_MII100
503 * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
505 /* #define CONFIG_MPC5xxx_FEC_MII10 */
506 #define CONFIG_PHY_ADDR 0x00
511 * use CS1: Bit 0 (mask: 0x80000000):
512 * 1 -> Pin gpio_wkup_6 as second SDRAM chip select (mem_cs1).
513 * use ALT CAN position: Bits 2-3 (mask: 0x30000000):
514 * 00 -> No Alternatives, CAN1/2 on PSC2 according to PSC2 setting.
515 * SPI on PSC3 according to PSC3 setting. Use for CAM5200.
516 * 01 -> CAN1 on I2C1, CAN2 on Tmr0/1.
517 * Use for REV200 STK52XX boards and FO300 boards. Do not use
518 * with REV100 modules (because, there I2C1 is used as I2C bus).
519 * use ATA: Bits 6-7 (mask 0x03000000):
520 * 00 -> No ATA chip selects, csb_4/5 used as normal chip selects.
521 * Use for CAM5200 board.
522 * 01 -> ATA cs0/1 on csb_4/5. Use for the remaining boards.
523 * use PSC6: Bits 9-11 (mask 0x00700000):
524 * 000 -> use PSC6_0 to PSC6_3 as GPIO, PSC6 could not be used as
525 * UART, CODEC or IrDA.
526 * GPIO on PSC6_3 is used in post_hotkeys_pressed() to
527 * enable extended POST tests.
528 * Use for MINI-FAP and TQM5200_IB boards.
529 * 101 -> use PSC6 as UART. Pins PSC6_0 to PSC6_3 are used.
530 * Extended POST test is not available.
531 * Use for STK52xx, FO300 and CAM5200 boards.
532 * WARNING: When the extended POST is enabled, these bits will
533 * be overridden by this code as GPIOs!
534 * use PCI_DIS: Bit 16 (mask 0x00008000):
535 * 1 -> disable PCI controller (on CAM5200 board).
536 * use USB: Bits 18-19 (mask 0x00003000):
537 * 10 -> two UARTs (on FO300 and CAM5200).
538 * use PSC3: Bits 20-23 (mask: 0x00000f00):
539 * 0000 -> All PSC3 pins are GPIOs.
540 * 1100 -> UART/SPI (on FO300 board).
541 * 0100 -> UART (on CAM5200 board).
542 * use PSC2: Bits 25:27 (mask: 0x00000030):
543 * 000 -> All PSC2 pins are GPIOs.
544 * 100 -> UART (on CAM5200 board).
545 * 001 -> CAN1/2 on PSC2 pins.
546 * Use for REV100 STK52xx boards
547 * 01x -> Use AC97 (on FO300 board).
548 * use PSC1: Bits 29-31 (mask: 0x00000007):
549 * 100 -> UART (on all boards).
551 #if !defined(CONFIG_SYS_GPS_PORT_CONFIG)
552 #if defined (CONFIG_MINIFAP)
553 # define CONFIG_SYS_GPS_PORT_CONFIG 0x91000004
554 #elif defined (CONFIG_STK52XX)
555 # if defined (CONFIG_STK52XX_REV100)
556 # define CONFIG_SYS_GPS_PORT_CONFIG 0x81500014
557 # else /* STK52xx REV200 and above */
558 # if defined (CONFIG_TQM5200_REV100)
559 # error TQM5200 REV100 not supported on STK52XX REV200 or above
560 # else/* TQM5200 REV200 and above */
561 # define CONFIG_SYS_GPS_PORT_CONFIG 0x91500404
564 #elif defined (CONFIG_FO300)
565 # define CONFIG_SYS_GPS_PORT_CONFIG 0x91502c24
566 #elif defined (CONFIG_CAM5200)
567 # define CONFIG_SYS_GPS_PORT_CONFIG 0x8050A444
568 #else /* TMQ5200 Inbetriebnahme-Board */
569 # define CONFIG_SYS_GPS_PORT_CONFIG 0x81000004
576 #if defined (CONFIG_STK52XX) && !defined (CONFIG_STK52XX_REV100)
577 # define CONFIG_RTC_M41T11 1
578 # define CONFIG_SYS_I2C_RTC_ADDR 0x68
579 # define CONFIG_SYS_M41T11_BASE_YEAR 1900 /* because Linux uses the same base
582 # define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
586 * Miscellaneous configurable options
588 #define CONFIG_SYS_LONGHELP /* undef to save memory */
590 #define CONFIG_CMDLINE_EDITING 1 /* add command line history */
592 #define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
593 #if defined(CONFIG_CMD_KGDB)
594 #define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
597 #if defined(CONFIG_CMD_KGDB)
598 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
600 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
602 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
603 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
604 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
606 /* Enable an alternate, more extensive memory test */
607 #define CONFIG_SYS_ALT_MEMTEST
609 #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
610 #define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
612 #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
615 * Various low-level settings
617 #define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
618 #define CONFIG_SYS_HID0_FINAL HID0_ICE
620 #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
621 #define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
622 #ifdef CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2
623 #define CONFIG_SYS_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */
625 #define CONFIG_SYS_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */
627 #define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
628 #define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
630 #define CONFIG_LAST_STAGE_INIT
633 * SRAM - Do not map below 2 GB in address space, because this area is used
634 * for SDRAM autosizing.
636 #define CONFIG_SYS_CS2_START 0xE5000000
637 #define CONFIG_SYS_CS2_SIZE 0x100000 /* 1 MByte */
638 #define CONFIG_SYS_CS2_CFG 0x0004D930
641 * Grafic controller - Do not map below 2 GB in address space, because this
642 * area is used for SDRAM autosizing.
644 #define SM501_FB_BASE 0xE0000000
645 #define CONFIG_SYS_CS1_START (SM501_FB_BASE)
646 #define CONFIG_SYS_CS1_SIZE 0x4000000 /* 64 MByte */
647 #define CONFIG_SYS_CS1_CFG 0x8F48FF70
648 #define SM501_MMIO_BASE CONFIG_SYS_CS1_START + 0x03E00000
650 #define CONFIG_SYS_CS_BURST 0x00000000
651 #define CONFIG_SYS_CS_DEADCYCLE 0x33333311 /* 1 dead cycle for flash and SM501 */
653 #if defined(CONFIG_CAM5200)
654 #define CONFIG_SYS_CS4_START 0xB0000000
655 #define CONFIG_SYS_CS4_SIZE 0x00010000
656 #define CONFIG_SYS_CS4_CFG 0x01019C10
658 #define CONFIG_SYS_CS5_START 0xD0000000
659 #define CONFIG_SYS_CS5_SIZE 0x01208000
660 #define CONFIG_SYS_CS5_CFG 0x1414BF10
663 #define CONFIG_SYS_RESET_ADDRESS 0xff000000
665 /*-----------------------------------------------------------------------
667 *-----------------------------------------------------------------------
669 #define CONFIG_USB_CLOCK 0x0001BBBB
670 #define CONFIG_USB_CONFIG 0x00001000
672 /*-----------------------------------------------------------------------
673 * IDE/ATA stuff Supports IDE harddisk
674 *-----------------------------------------------------------------------
677 #undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
679 #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
680 #undef CONFIG_IDE_LED /* LED for ide not supported */
682 #define CONFIG_IDE_RESET /* reset for ide supported */
683 #define CONFIG_IDE_PREINIT
685 #define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
686 #define CONFIG_SYS_IDE_MAXDEVICE 2 /* max. 2 drives per IDE bus */
688 #define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
690 #define CONFIG_SYS_ATA_BASE_ADDR MPC5XXX_ATA
692 /* Offset for data I/O */
693 #define CONFIG_SYS_ATA_DATA_OFFSET (0x0060)
695 /* Offset for normal register accesses */
696 #define CONFIG_SYS_ATA_REG_OFFSET (CONFIG_SYS_ATA_DATA_OFFSET)
698 /* Offset for alternate registers */
699 #define CONFIG_SYS_ATA_ALT_OFFSET (0x005C)
701 /* Interval between registers */
702 #define CONFIG_SYS_ATA_STRIDE 4
704 /* Support ATAPI devices */
705 #define CONFIG_ATAPI 1
707 /*-----------------------------------------------------------------------
708 * Open firmware flat tree support
709 *-----------------------------------------------------------------------
711 #define OF_CPU "PowerPC,5200@0"
712 #define OF_SOC "soc5200@f0000000"
713 #define OF_TBCLK (bd->bi_busfreq / 4)
714 #define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
716 #endif /* __CONFIG_H */