2 * (C) Copyright 2002-2005
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * Configuration settings for the PCIPPC-6 board.
30 /* ------------------------------------------------------------------------- */
33 * board/config.h - configuration options, board specific
40 * High Level Configuration Options
44 #define CONFIG_PCIPPC2 1 /* this is a PCIPPC2 board */
46 #define CONFIG_BOARD_EARLY_INIT_F 1
47 #define CONFIG_MISC_INIT_R 1
49 #define CONFIG_CONS_INDEX 1
50 #define CONFIG_BAUDRATE 9600
51 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
53 #define CONFIG_PREBOOT ""
54 #define CONFIG_BOOTDELAY 5
59 #define CONFIG_BOOTP_SUBNETMASK
60 #define CONFIG_BOOTP_GATEWAY
61 #define CONFIG_BOOTP_HOSTNAME
62 #define CONFIG_BOOTP_BOOTPATH
63 #define CONFIG_BOOTP_BOOTFILESIZE
65 #define CONFIG_MAC_PARTITION
66 #define CONFIG_DOS_PARTITION
70 * Command line configuration.
72 #include <config_cmd_default.h>
74 #define CONFIG_CMD_ASKENV
75 #define CONFIG_CMD_BSP
76 #define CONFIG_CMD_DATE
77 #define CONFIG_CMD_DHCP
78 #define CONFIG_CMD_DOC
79 #define CONFIG_CMD_ELF
80 #define CONFIG_CMD_NFS
81 #define CONFIG_CMD_PCI
82 #define CONFIG_CMD_SCSI
83 #define CONFIG_CMD_SNTP
87 #define CONFIG_PCI_PNP 1 /* PCI plug-and-play */
89 #define CONFIG_NAND_LEGACY
92 * Miscellaneous configurable options
94 #define CONFIG_SYS_LONGHELP /* undef to save memory */
95 #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
97 #define CONFIG_SYS_HUSH_PARSER 1 /* use "hush" command parser */
98 #ifdef CONFIG_SYS_HUSH_PARSER
99 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
101 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
105 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
107 #define CONFIG_SYS_MAXARGS 64 /* max number of command args */
108 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
109 #define CONFIG_SYS_LOAD_ADDR 0x00100000 /* Default load address */
111 /*-----------------------------------------------------------------------
112 * Start addresses for the final memory configuration
113 * (Set up by the startup code)
114 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
116 #define CONFIG_SYS_SDRAM_BASE 0x00000000
117 #define CONFIG_SYS_FLASH_BASE 0xFFF00000
118 #define CONFIG_SYS_FLASH_MAX_SIZE 0x00100000
119 /* Maximum amount of RAM.
121 #define CONFIG_SYS_MAX_RAM_SIZE 0x20000000 /* 512Mb */
123 #define CONFIG_SYS_RESET_ADDRESS 0xFFF00100
125 #define CONFIG_SYS_MONITOR_BASE TEXT_BASE
127 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
128 #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
130 #if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_SDRAM_BASE && \
131 CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_MAX_RAM_SIZE
132 #define CONFIG_SYS_RAMBOOT
134 #undef CONFIG_SYS_RAMBOOT
137 #define CONFIG_SYS_MEMTEST_START 0x00004000 /* memtest works on */
138 #define CONFIG_SYS_MEMTEST_END 0x02000000 /* 0 ... 32 MB in DRAM */
140 /*-----------------------------------------------------------------------
141 * Definitions for initial stack pointer and data area
144 /* Size in bytes reserved for initial data
146 #define CONFIG_SYS_GBL_DATA_SIZE 128
148 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
149 #define CONFIG_SYS_INIT_RAM_END 0x8000
150 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
151 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
153 #define CONFIG_SYS_INIT_RAM_LOCK
156 * Temporary buffer for serial data until the real serial driver
157 * is initialised (memtest will destroy this buffer)
159 #define CONFIG_SYS_SCONSOLE_ADDR CONFIG_SYS_INIT_RAM_ADDR
160 #define CONFIG_SYS_SCONSOLE_SIZE 0x0002000
164 #define CONFIG_SYS_DBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
165 #define CONFIG_SYS_DBAT0U (CONFIG_SYS_SDRAM_BASE | \
166 BATU_BL_256M | BATU_VS | BATU_VP)
169 #define CONFIG_SYS_DBAT1L ((CONFIG_SYS_SDRAM_BASE + 0x10000000) | \
170 BATL_PP_10 | BATL_MEMCOHERENCE)
171 #define CONFIG_SYS_DBAT1U ((CONFIG_SYS_SDRAM_BASE + 0x10000000) | \
172 BATU_BL_256M | BATU_VS | BATU_VP)
174 /* Init RAM in the CPU DCache (no backing memory)
176 #define CONFIG_SYS_DBAT2L (CONFIG_SYS_INIT_RAM_ADDR | \
177 BATL_PP_10 | BATL_MEMCOHERENCE)
178 #define CONFIG_SYS_DBAT2U (CONFIG_SYS_INIT_RAM_ADDR | \
179 BATU_BL_128K | BATU_VS | BATU_VP)
181 /* I/O and PCI memory at 0xf0000000
183 #define CONFIG_SYS_DBAT3L (0xf0000000 | BATL_PP_10 | BATL_CACHEINHIBIT)
184 #define CONFIG_SYS_DBAT3U (0xf0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
186 #define CONFIG_SYS_IBAT0L CONFIG_SYS_DBAT0L
187 #define CONFIG_SYS_IBAT0U CONFIG_SYS_DBAT0U
188 #define CONFIG_SYS_IBAT1L CONFIG_SYS_DBAT1L
189 #define CONFIG_SYS_IBAT1U CONFIG_SYS_DBAT1U
190 #define CONFIG_SYS_IBAT2L CONFIG_SYS_DBAT2L
191 #define CONFIG_SYS_IBAT2U CONFIG_SYS_DBAT2U
192 #define CONFIG_SYS_IBAT3L CONFIG_SYS_DBAT3L
193 #define CONFIG_SYS_IBAT3U CONFIG_SYS_DBAT3U
196 * Low Level Configuration Settings
197 * (address mappings, register initial values, etc.)
198 * You should know what you are doing if you make changes here.
199 * For the detail description refer to the PCIPPC2 user's manual.
201 #define CONFIG_SYS_HZ 1000
202 #define CONFIG_SYS_BUS_HZ 100000000 /* bus speed - 100 mhz */
203 #define CONFIG_SYS_CPU_CLK 300000000
204 #define CONFIG_SYS_BUS_CLK 100000000
207 * For booting Linux, the board info and command line data
208 * have to be in the first 8 MB of memory, since this is
209 * the maximum mapped by the Linux kernel during initialization.
211 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
213 /*-----------------------------------------------------------------------
216 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* Max number of flash banks */
217 #define CONFIG_SYS_MAX_FLASH_SECT 16 /* Max number of sectors in one bank */
219 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
220 #define CONFIG_SYS_FLASH_WRITE_TOUT 1000 /* Timeout for Flash Write (in ms) */
223 * Note: environment is not EMBEDDED in the U-Boot code.
224 * It's stored in flash separately.
226 #define CONFIG_ENV_IS_IN_FLASH 1
227 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x70000)
228 #define CONFIG_ENV_SIZE 0x1000 /* Size of the Environment */
229 #define CONFIG_ENV_SECT_SIZE 0x10000 /* Size of the Environment Sector */
231 /*-----------------------------------------------------------------------
232 * Cache Configuration
234 #define CONFIG_SYS_CACHELINE_SIZE 32
235 #if defined(CONFIG_CMD_KGDB)
236 # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
243 #define L2_INIT (L2CR_L2SIZ_2M | L2CR_L2CLK_3 | L2CR_L2RAM_BURST | \
244 L2CR_L2OH_5 | L2CR_L2CTL | L2CR_L2WT)
245 #define L2_ENABLE (L2_INIT | L2CR_L2E)
248 * Internal Definitions
252 #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
253 #define BOOTFLAG_WARM 0x02 /* Software reboot */
255 /*-----------------------------------------------------------------------
256 * Disk-On-Chip configuration
259 #define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Max number of DOC devices */
261 #define CONFIG_SYS_DOC_SUPPORT_2000
262 #undef CONFIG_SYS_DOC_SUPPORT_MILLENNIUM
264 /*-----------------------------------------------------------------------
267 #define CONFIG_RTC_MK48T59
269 #define CONFIG_WATCHDOG
271 #define CONFIG_NET_MULTI /* Multi ethernet cards support */
273 #define CONFIG_EEPRO100
274 #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
278 #define CONFIG_SCSI_SYM53C8XX
279 #define CONFIG_SCSI_DEV_ID 0x000B /* 53c896 */
280 #define CONFIG_SYS_SCSI_MAX_LUN 8 /* number of supported LUNs */
281 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 15 /* maximum SCSI ID (0..6) */
282 #define CONFIG_SYS_SCSI_MAX_DEVICE CONFIG_SYS_SCSI_MAX_SCSI_ID * CONFIG_SYS_SCSI_MAX_LUN /* maximum Target devices */
283 #define CONFIG_SYS_SCSI_SPIN_UP_TIME 2
284 #define CONFIG_SYS_SCSI_SCAN_BUS_REVERSE 0
285 #define CONFIG_DOS_PARTITION
286 #define CONFIG_MAC_PARTITION
287 #define CONFIG_ISO_PARTITION
289 #endif /* __CONFIG_H */