include/configs/MVSMR.h

   1 /*
   2  * (C) Copyright 2003-2004
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * (C) Copyright 2004-2010
   6  * Matrix-Vision GmbH, andre.schwarz@matrix-vision.de
   7  *
   8  * See file CREDITS for list of people who contributed to this
   9  * project.
  10  *
  11  * This program is free software; you can redistribute it and/or
  12  * modify it under the terms of the GNU General Public License as
  13  * published by the Free Software Foundation; either version 2 of
  14  * the License, or (at your option) any later version.
  15  *
  16  * This program is distributed in the hope that it will be useful,
  17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  * GNU General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24  * MA 02111-1307 USA
  25  */
  26
  27 #ifndef __CONFIG_H
  28 #define __CONFIG_H
  29
  30 #include <version.h>
  31
  32 #define CONFIG_MPC5xxx  1
  33 #define CONFIG_MPC5200  1
  34
  35 #define CONFIG_SYS_MPC5XXX_CLKIN        33000000
  36
  37 #define BOOTFLAG_COLD           0x01
  38 #define BOOTFLAG_WARM           0x02
  39
  40 #define CONFIG_MISC_INIT_R      1
  41
  42 #define CONFIG_SYS_CACHELINE_SIZE       32
  43 #ifdef CONFIG_CMD_KGDB
  44 #define CONFIG_SYS_CACHELINE_SHIFT      5
  45 #endif
  46
  47 #define CONFIG_PSC_CONSOLE      1
  48 #define CONFIG_BAUDRATE         115200
  49 #define CONFIG_SYS_BAUDRATE_TABLE       {9600, 19200, 38400, 57600, 115200,\
  50                                                 230400}
  51
  52 #define CONFIG_PCI              1
  53 #define CONFIG_PCI_PNP          1
  54 #undef  CONFIG_PCI_SCAN_SHOW
  55 #define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
  56
  57 #define CONFIG_PCI_MEM_BUS      0x40000000
  58 #define CONFIG_PCI_MEM_PHYS     CONFIG_PCI_MEM_BUS
  59 #define CONFIG_PCI_MEM_SIZE     0x10000000
  60
  61 #define CONFIG_PCI_IO_BUS       0x50000000
  62 #define CONFIG_PCI_IO_PHYS      CONFIG_PCI_IO_BUS
  63 #define CONFIG_PCI_IO_SIZE      0x01000000
  64
  65 #define CONFIG_SYS_XLB_PIPELINING       1
  66 #define CONFIG_HIGH_BATS        1
  67
  68 #define MV_CI                   mvSMR
  69 #define MV_VCI                  mvSMR
  70 #define MV_FPGA_DATA            0xff840000
  71 #define MV_FPGA_SIZE            0x1ff88
  72 #define MV_KERNEL_ADDR          0xfff00000
  73 #define MV_SCRIPT_ADDR          0xff806000
  74 #define MV_INITRD_ADDR          0xff880000
  75 #define MV_INITRD_LENGTH        0x00240000
  76 #define MV_SCRATCH_ADDR         0xffcc0000
  77 #define MV_SCRATCH_LENGTH       MV_INITRD_LENGTH
  78
  79 #define CONFIG_SHOW_BOOT_PROGRESS 1
  80
  81 #define MV_KERNEL_ADDR_RAM      0x00100000
  82 #define MV_INITRD_ADDR_RAM      0x00400000
  83
  84 /*
  85  * Supported commands
  86  */
  87 #include <config_cmd_default.h>
  88
  89 #define CONFIG_CMD_CACHE
  90 #define CONFIG_CMD_DHCP
  91 #define CONFIG_CMD_FPGA
  92 #define CONFIG_CMD_I2C
  93 #define CONFIG_CMD_MII
  94 #define CONFIG_CMD_NET
  95 #define CONFIG_CMD_PCI
  96 #define CONFIG_CMD_PING
  97 #define CONFIG_CMD_SDRAM
  98
  99 #define CONFIG_BOOTP_BOOTFILESIZE
 100 #define CONFIG_BOOTP_BOOTPATH
 101 #define CONFIG_BOOTP_DNS
 102 #define CONFIG_BOOTP_DNS2
 103 #define CONFIG_BOOTP_GATEWAY
 104 #define CONFIG_BOOTP_HOSTNAME
 105 #define CONFIG_BOOTP_NTPSERVER
 106 #define CONFIG_BOOTP_RANDOM_DELAY
 107 #define CONFIG_BOOTP_SEND_HOSTNAME
 108 #define CONFIG_BOOTP_SUBNETMASK
 109 #define CONFIG_BOOTP_VENDOREX
 110
 111 /*
 112  * Autoboot
 113  */
 114 #define CONFIG_BOOTDELAY                1
 115 #define CONFIG_AUTOBOOT_KEYED
 116 #define CONFIG_AUTOBOOT_STOP_STR        "abcdefg"
 117 #define CONFIG_ZERO_BOOTDELAY_CHECK
 118
 119 #define CONFIG_BOOTCOMMAND      "source ${script_addr}"
 120 #define CONFIG_BOOTARGS         "root=/dev/ram ro rootfstype=squashfs" \
 121                                         " allocate=6M"
 122
 123 #define XMK_STR(x)      #x
 124 #define MK_STR(x)       XMK_STR(x)
 125
 126 #define CONFIG_EXTRA_ENV_SETTINGS                               \
 127         "console_nr=0\0"                                        \
 128         "console=no\0"                                          \
 129         "stdin=serial\0"                                        \
 130         "stdout=serial\0"                                       \
 131         "stderr=serial\0"                                       \
 132         "fpga=0\0"                                              \
 133         "fpgadata=" MK_STR(MV_FPGA_DATA) "\0"                   \
 134         "fpgadatasize=" MK_STR(MV_FPGA_SIZE) "\0"               \
 135         "mv_kernel_addr=" MK_STR(MV_KERNEL_ADDR) "\0"           \
 136         "mv_kernel_addr_ram=" MK_STR(MV_KERNEL_ADDR_RAM) "\0"   \
 137         "script_addr=" MK_STR(MV_SCRIPT_ADDR) "\0"              \
 138         "mv_initrd_addr=" MK_STR(MV_INITRD_ADDR) "\0"           \
 139         "mv_initrd_addr_ram=" MK_STR(MV_INITRD_ADDR_RAM) "\0"   \
 140         "mv_initrd_length=" MK_STR(MV_INITRD_LENGTH) "\0"       \
 141         "mv_scratch_addr=" MK_STR(MV_SCRATCH_ADDR) "\0"         \
 142         "mv_scratch_length=" MK_STR(MV_SCRATCH_LENGTH) "\0"     \
 143         "mv_version=" U_BOOT_VERSION "\0"                       \
 144         "dhcp_client_id=" MK_STR(MV_CI) "\0"                    \
 145         "dhcp_vendor-class-identifier=" MK_STR(MV_VCI) "\0"     \
 146         "netretry=no\0"                                         \
 147         "use_static_ipaddr=no\0"                                \
 148         "static_ipaddr=192.168.0.101\0"                         \
 149         "static_netmask=255.255.255.0\0"                        \
 150         "static_gateway=0.0.0.0\0"                              \
 151         "initrd_name=uInitrd.mvsmr-rfs\0"                       \
 152         "zcip=yes\0"                                            \
 153         "netboot=no\0"                                          \
 154         ""
 155
 156 #undef XMK_STR
 157 #undef MK_STR
 158
 159 /*
 160  * IPB Bus clocking configuration.
 161  */
 162 #define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK
 163
 164 /*
 165  * Flash configuration
 166  */
 167 #undef  CONFIG_FLASH_16BIT
 168 #define CONFIG_SYS_FLASH_CFI
 169 #define CONFIG_FLASH_CFI_DRIVER
 170 #define CONFIG_SYS_FLASH_CFI_AMD_RESET 1
 171 #define CONFIG_SYS_FLASH_EMPTY_INFO
 172
 173 #define CONFIG_SYS_FLASH_ERASE_TOUT     50000
 174 #define CONFIG_SYS_FLASH_WRITE_TOUT     1000
 175
 176 #define CONFIG_SYS_MAX_FLASH_BANKS      1
 177 #define CONFIG_SYS_MAX_FLASH_SECT       256
 178
 179 #define CONFIG_SYS_LOWBOOT
 180 #define CONFIG_SYS_FLASH_BASE           TEXT_BASE
 181 #define CONFIG_SYS_FLASH_SIZE           0x00800000
 182
 183 /*
 184  * Environment settings
 185  */
 186 #define CONFIG_ENV_IS_IN_FLASH
 187 #undef  CONFIG_SYS_FLASH_PROTECTION
 188 #define CONFIG_HAS_UID
 189 #define CONFIG_OVERWRITE_ETHADDR_ONCE
 190
 191 #define CONFIG_ENV_OFFSET       0x8000
 192 #define CONFIG_ENV_SIZE         0x2000
 193 #define CONFIG_ENV_SECT_SIZE    0x2000
 194
 195 /* used by linker script to wrap code around */
 196 #define CONFIG_SCRIPT_OFFSET    0x6000
 197 #define CONFIG_SCRIPT_SECT_SIZE 0x2000
 198
 199 /*
 200  * Memory map
 201  */
 202 #define CONFIG_SYS_MBAR         0xF0000000
 203 #define CONFIG_SYS_SDRAM_BASE   0x00000000
 204 #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
 205
 206 #define CONFIG_SYS_INIT_RAM_ADDR        MPC5XXX_SRAM
 207 #define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_SIZE
 208
 209 #define CONFIG_SYS_GBL_DATA_SIZE        128
 210 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_END - \
 211                                                 CONFIG_SYS_GBL_DATA_SIZE)
 212 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 213
 214 #define CONFIG_SYS_MONITOR_BASE TEXT_BASE
 215 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
 216 #define CONFIG_SYS_RAMBOOT              1
 217 #endif
 218
 219 /* CONFIG_SYS_MONITOR_LEN must be a multiple of CONFIG_ENV_SECT_SIZE */
 220 #define CONFIG_SYS_MONITOR_LEN          (512 << 10)
 221 #define CONFIG_SYS_MALLOC_LEN           (512 << 10)
 222 #define CONFIG_SYS_BOOTMAPSZ            (8 << 20)
 223
 224 /*
 225  * I2C configuration
 226  */
 227 #define CONFIG_HARD_I2C         1
 228 #define CONFIG_SYS_I2C_MODULE   1
 229 #define CONFIG_SYS_I2C_SPEED    86000
 230 #define CONFIG_SYS_I2C_SLAVE    0x7F
 231
 232 /*
 233  * Ethernet configuration
 234  */
 235 #define CONFIG_NET_RETRY_COUNT 5
 236
 237 #define CONFIG_MPC5xxx_FEC
 238 #define CONFIG_MPC5xxx_FEC_MII100
 239 #define CONFIG_PHY_ADDR         0x00
 240 #define CONFIG_NETDEV           eth0
 241
 242 /*
 243  * Miscellaneous configurable options
 244  */
 245 #define CONFIG_SYS_HUSH_PARSER
 246 #define CONFIG_CMDLINE_EDITING
 247 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
 248 #undef  CONFIG_SYS_LONGHELP
 249 #define CONFIG_SYS_PROMPT               "=> "
 250 #ifdef CONFIG_CMD_KGDB
 251 #define CONFIG_SYS_CBSIZE               1024
 252 #else
 253 #define CONFIG_SYS_CBSIZE               256
 254 #endif
 255 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
 256 #define CONFIG_SYS_MAXARGS              16
 257 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
 258
 259 #define CONFIG_SYS_MEMTEST_START        0x00800000
 260 #define CONFIG_SYS_MEMTEST_END          0x02f00000
 261
 262 #define CONFIG_SYS_HZ                   1000
 263
 264 /* default load address */
 265 #define CONFIG_SYS_LOAD_ADDR            0x02000000
 266 /* default location for tftp and bootm */
 267 #define CONFIG_LOADADDR                 0x00200000
 268
 269 /*
 270  * Various low-level settings
 271  */
 272 #define CONFIG_SYS_GPS_PORT_CONFIG      0x00050044
 273
 274 #define CONFIG_SYS_HID0_INIT            (HID0_ICE | HID0_ICFI)
 275 #define CONFIG_SYS_HID0_FINAL           HID0_ICE
 276
 277 #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
 278 #define CONFIG_SYS_BOOTCS_SIZE          CONFIG_SYS_FLASH_SIZE
 279 #define CONFIG_SYS_BOOTCS_CFG           0x00047800
 280 #define CONFIG_SYS_CS0_START            CONFIG_SYS_FLASH_BASE
 281 #define CONFIG_SYS_CS0_SIZE             CONFIG_SYS_FLASH_SIZE
 282
 283 #define CONFIG_SYS_CS_BURST             0x000000f0
 284 #define CONFIG_SYS_CS_DEADCYCLE         0x33333303
 285
 286 #define CONFIG_SYS_RESET_ADDRESS        0x00000100
 287
 288 #undef FPGA_DEBUG
 289 #undef CONFIG_SYS_FPGA_PROG_FEEDBACK
 290 #define CONFIG_FPGA             CONFIG_SYS_XILINX_SPARTAN2
 291 #define CONFIG_FPGA_XILINX      1
 292 #define CONFIG_FPGA_SPARTAN2    1
 293 #define CONFIG_FPGA_COUNT       1
 294
 295 #endif