1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Configuation settings for the Freescale MCF53017EVB.
5 * Copyright (C) 2004-2008 Freescale Semiconductor, Inc.
6 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
10 * board/config.h - configuration options, board specific
17 * High Level Configuration Options
21 #define CONFIG_SYS_UART_PORT (0)
23 #define CONFIG_WATCHDOG_TIMEOUT 5000
26 # define CONFIG_SYS_TX_ETH_BUFFER 8
27 # define CONFIG_SYS_FEC_BUF_USE_SRAM
30 #define CONFIG_SYS_RTC_CNT (0x8000)
31 #define CONFIG_SYS_RTC_SETUP (RTC_OCEN_OSCBYP | RTC_OCEN_CLKEN)
36 # define CONFIG_IPADDR 192.162.1.2
37 # define CONFIG_NETMASK 255.255.255.0
38 # define CONFIG_SERVERIP 192.162.1.1
39 # define CONFIG_GATEWAYIP 192.162.1.1
42 #define CONFIG_HOSTNAME "M53017"
43 #define CONFIG_EXTRA_ENV_SETTINGS \
45 "loadaddr=40010000\0" \
46 "u-boot=u-boot.bin\0" \
47 "load=tftp ${loadaddr) ${u-boot}\0" \
48 "upd=run load; run prog\0" \
49 "prog=prot off 0 3ffff;" \
51 "cp.b ${loadaddr} 0 ${filesize};" \
55 #define CONFIG_PRAM 512 /* 512 KB */
57 #define CONFIG_SYS_CLK 80000000
58 #define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 3
60 #define CONFIG_SYS_MBAR 0xFC000000
63 * Low Level Configuration Settings
64 * (address mappings, register initial values, etc.)
65 * You should know what you are doing if you make changes here.
68 * Definitions for initial stack pointer and data area (in DPRAM)
70 #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000
71 #define CONFIG_SYS_INIT_RAM_SIZE 0x20000 /* Size of used area in internal SRAM */
72 #define CONFIG_SYS_INIT_RAM_CTRL 0x221
75 * Start addresses for the final memory configuration
76 * (Set up by the startup code)
77 * Please note that CFG_SYS_SDRAM_BASE _must_ start at 0
79 #define CFG_SYS_SDRAM_BASE 0x40000000
80 #define CFG_SYS_SDRAM_SIZE 64 /* SDRAM size in MB */
81 #define CFG_SYS_SDRAM_CFG1 0x43711630
82 #define CFG_SYS_SDRAM_CFG2 0x56670000
83 #define CFG_SYS_SDRAM_CTRL 0xE1092000
84 #define CFG_SYS_SDRAM_EMOD 0x80010000
85 #define CFG_SYS_SDRAM_MODE 0x00CD0000
88 * For booting Linux, the board info and command line data
89 * have to be in the first 8 MB of memory, since this is
90 * the maximum mapped by the Linux kernel during initialization ??
92 #define CONFIG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20))
94 /*-----------------------------------------------------------------------
97 #ifdef CONFIG_SYS_FLASH_CFI
98 # define CONFIG_FLASH_SPANSION_S29WS_N 1
99 # define CONFIG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */
102 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
104 /* Configuration for environment
105 * Environment is embedded in u-boot in the second sector of the flash
108 #define LDS_BOARD_TEXT \
109 . = DEFINED(env_offset) ? env_offset : .; \
110 env/embedded.o(.text*)
112 /*-----------------------------------------------------------------------
113 * Cache Configuration
116 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
117 CONFIG_SYS_INIT_RAM_SIZE - 8)
118 #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
119 CONFIG_SYS_INIT_RAM_SIZE - 4)
120 #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINVA)
121 #define CONFIG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \
122 CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \
123 CF_ACR_EN | CF_ACR_SM_ALL)
124 #define CONFIG_SYS_CACHE_ICACR (CF_CACR_EC | CF_CACR_CINVA | \
127 /*-----------------------------------------------------------------------
128 * Chipselect bank definitions
138 #define CONFIG_SYS_CS0_BASE 0
139 #define CONFIG_SYS_CS0_MASK 0x00FF0001
140 #define CONFIG_SYS_CS0_CTRL 0x00001FA0
142 #define CONFIG_SYS_CS1_BASE 0xC0000000
143 #define CONFIG_SYS_CS1_MASK 0x00070001
144 #define CONFIG_SYS_CS1_CTRL 0x00001FA0
146 #endif /* _M53017EVB_H */