900b0b53434b33beea5a7f7d9fbd1778d52f4c9c
[platform/kernel/u-boot.git] / include / configs / M5282EVB.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Configuation settings for the Motorola MC5282EVB board.
4  *
5  * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
6  */
7
8 /*
9  * board/config.h - configuration options, board specific
10  */
11
12 #ifndef _CONFIG_M5282EVB_H
13 #define _CONFIG_M5282EVB_H
14
15 /*
16  * High Level Configuration Options
17  * (easy to change)
18  */
19
20 #define CONFIG_SYS_UART_PORT            (0)
21
22 #undef  CONFIG_MONITOR_IS_IN_RAM        /* define if monitor is started from a pre-loader */
23
24 /* Configuration for environment
25  * Environment is embedded in u-boot in the second sector of the flash
26  */
27
28 #define LDS_BOARD_TEXT \
29         . = DEFINED(env_offset) ? env_offset : .; \
30         env/embedded.o(.text*);
31
32 #ifdef CONFIG_MCFFEC
33 #       define CONFIG_IPADDR    192.162.1.2
34 #       define CONFIG_NETMASK   255.255.255.0
35 #       define CONFIG_SERVERIP  192.162.1.1
36 #       define CONFIG_GATEWAYIP 192.162.1.1
37 #endif                          /* CONFIG_MCFFEC */
38
39 #define CONFIG_HOSTNAME         "M5282EVB"
40 #define CONFIG_EXTRA_ENV_SETTINGS               \
41         "netdev=eth0\0"                         \
42         "loadaddr=10000\0"                      \
43         "u-boot=u-boot.bin\0"                   \
44         "load=tftp ${loadaddr) ${u-boot}\0"     \
45         "upd=run load; run prog\0"              \
46         "prog=prot off ffe00000 ffe3ffff;"      \
47         "era ffe00000 ffe3ffff;"                \
48         "cp.b ${loadaddr} ffe00000 ${filesize};"\
49         "save\0"                                \
50         ""
51
52 #define CONFIG_SYS_CLK                  64000000
53
54 /* PLL Configuration: Ext Clock * 6 (see table 9-4 of MCF user manual) */
55
56 #define CONFIG_SYS_MFD                  0x02    /* PLL Multiplication Factor Devider */
57 #define CONFIG_SYS_RFD                  0x00    /* PLL Reduce Frecuency Devider */
58
59 /*
60  * Low Level Configuration Settings
61  * (address mappings, register initial values, etc.)
62  * You should know what you are doing if you make changes here.
63  */
64 #define CONFIG_SYS_MBAR         0x40000000
65
66 /*-----------------------------------------------------------------------
67  * Definitions for initial stack pointer and data area (in DPRAM)
68  */
69 #define CONFIG_SYS_INIT_RAM_ADDR        0x20000000
70 #define CONFIG_SYS_INIT_RAM_SIZE        0x10000 /* Size of used area in internal SRAM    */
71
72 /*-----------------------------------------------------------------------
73  * Start addresses for the final memory configuration
74  * (Set up by the startup code)
75  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
76  */
77 #define CONFIG_SYS_SDRAM_BASE           0x00000000
78 #define CONFIG_SYS_SDRAM_SIZE           16      /* SDRAM size in MB */
79 #define CONFIG_SYS_FLASH_BASE           CONFIG_SYS_CS0_BASE
80 #define CONFIG_SYS_INT_FLASH_BASE       0xf0000000
81 #define CONFIG_SYS_INT_FLASH_ENABLE     0x21
82
83 #define CONFIG_SYS_MONITOR_LEN          0x20000
84
85 /*
86  * For booting Linux, the board info and command line data
87  * have to be in the first 8 MB of memory, since this is
88  * the maximum mapped by the Linux kernel during initialization ??
89  */
90 #define CONFIG_SYS_BOOTMAPSZ            (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
91
92 /*-----------------------------------------------------------------------
93  * FLASH organization
94  */
95 #ifdef CONFIG_SYS_FLASH_CFI
96
97 #       define CONFIG_SYS_FLASH_SIZE            0x1000000       /* Max size that the board might have */
98 #       define CONFIG_SYS_FLASH_BANKS_LIST      { CONFIG_SYS_FLASH_BASE }
99 #endif
100
101 /*-----------------------------------------------------------------------
102  * Cache Configuration
103  */
104
105 #define ICACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
106                                          CONFIG_SYS_INIT_RAM_SIZE - 8)
107 #define DCACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
108                                          CONFIG_SYS_INIT_RAM_SIZE - 4)
109 #define CONFIG_SYS_ICACHE_INV           (CF_CACR_CINV + CF_CACR_DCM)
110 #define CONFIG_SYS_CACHE_ACR0           (CONFIG_SYS_SDRAM_BASE | \
111                                          CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
112                                          CF_ACR_EN | CF_ACR_SM_ALL)
113 #define CONFIG_SYS_CACHE_ICACR          (CF_CACR_CENB | CF_CACR_DISD | \
114                                          CF_CACR_CEIB | CF_CACR_DBWE | \
115                                          CF_CACR_EUSP)
116
117 /*-----------------------------------------------------------------------
118  * Memory bank definitions
119  */
120 #define CONFIG_SYS_CS0_BASE             0xFFE00000
121 #define CONFIG_SYS_CS0_CTRL             0x00001980
122 #define CONFIG_SYS_CS0_MASK             0x001F0001
123
124 /*-----------------------------------------------------------------------
125  * Port configuration
126  */
127 #define CONFIG_SYS_PACNT                0x0000000       /* Port A D[31:24] */
128 #define CONFIG_SYS_PADDR                0x0000000
129 #define CONFIG_SYS_PADAT                0x0000000
130
131 #define CONFIG_SYS_PBCNT                0x0000000       /* Port B D[23:16] */
132 #define CONFIG_SYS_PBDDR                0x0000000
133 #define CONFIG_SYS_PBDAT                0x0000000
134
135 #define CONFIG_SYS_PCCNT                0x0000000       /* Port C D[15:08] */
136 #define CONFIG_SYS_PCDDR                0x0000000
137 #define CONFIG_SYS_PCDAT                0x0000000
138
139 #define CONFIG_SYS_PDCNT                0x0000000       /* Port D D[07:00] */
140 #define CONFIG_SYS_PCDDR                0x0000000
141 #define CONFIG_SYS_PCDAT                0x0000000
142
143 #define CONFIG_SYS_PEHLPAR              0xC0
144 #define CONFIG_SYS_PUAPAR               0x0F    /* UA0..UA3 = Uart 0 +1 */
145 #define CONFIG_SYS_DDRUA                0x05
146 #define CONFIG_SYS_PJPAR                0xFF
147
148 #endif                          /* _CONFIG_M5282EVB_H */