Remove CONFIG_HAS_ETH0 et al symbols
[platform/kernel/u-boot.git] / include / configs / M5275EVB.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Configuation settings for the Motorola MC5275EVB board.
4  *
5  * By Arthur Shipkowski <art@videon-central.com>
6  * Copyright (C) 2005 Videon Central, Inc.
7  *
8  * Based off of M5272C3 board code by Josef Baumgartner
9  * <josef.baumgartner@telex.de>
10  */
11
12 /*
13  * board/config.h - configuration options, board specific
14  */
15
16 #ifndef _M5275EVB_H
17 #define _M5275EVB_H
18
19 /*
20  * High Level Configuration Options
21  * (easy to change)
22  */
23
24 #define CONFIG_MCFTMR
25
26 #define CONFIG_SYS_UART_PORT            (0)
27
28 /* Configuration for environment
29  * Environment is embedded in u-boot in the second sector of the flash
30  */
31
32 #define LDS_BOARD_TEXT \
33         . = DEFINED(env_offset) ? env_offset : .; \
34         env/embedded.o(.text);
35
36 /* Available command configuration */
37
38 #ifdef CONFIG_MCFFEC
39 #define CONFIG_MII_INIT         1
40 #define CONFIG_SYS_DISCOVER_PHY
41 #define CONFIG_SYS_RX_ETH_BUFFER        8
42 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
43 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
44 #ifndef CONFIG_SYS_DISCOVER_PHY
45 #define FECDUPLEX               FULL
46 #define FECSPEED                _100BASET
47 #else
48 #ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
49 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
50 #endif
51 #endif
52 #endif
53
54 /* I2C */
55 #define CONFIG_SYS_I2C_PINMUX_REG       (gpio_reg->par_feci2c)
56 #define CONFIG_SYS_I2C_PINMUX_CLR       (0xFFF0)
57 #define CONFIG_SYS_I2C_PINMUX_SET       (0x000F)
58
59 #ifdef CONFIG_MCFFEC
60 #       define CONFIG_OVERWRITE_ETHADDR_ONCE
61 #endif                          /* FEC_ENET */
62
63 #define CONFIG_EXTRA_ENV_SETTINGS               \
64         "netdev=eth0\0"                         \
65         "loadaddr=10000\0"                      \
66         "uboot=u-boot.bin\0"                    \
67         "load=tftp ${loadaddr} ${uboot}\0"      \
68         "upd=run load; run prog\0"              \
69         "prog=prot off ffe00000 ffe3ffff;"      \
70         "era ffe00000 ffe3ffff;"                \
71         "cp.b ${loadaddr} ffe00000 ${filesize};"\
72         "save\0"                                \
73         ""
74
75 #define CONFIG_SYS_CLK                  150000000
76
77 /*
78  * Low Level Configuration Settings
79  * (address mappings, register initial values, etc.)
80  * You should know what you are doing if you make changes here.
81  */
82
83 #define CONFIG_SYS_MBAR         0x40000000
84
85 /*-----------------------------------------------------------------------
86  * Definitions for initial stack pointer and data area (in DPRAM)
87  */
88 #define CONFIG_SYS_INIT_RAM_ADDR        0x20000000
89 #define CONFIG_SYS_INIT_RAM_SIZE        0x10000 /* Size of used area in internal SRAM */
90 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
91 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
92
93 /*-----------------------------------------------------------------------
94  * Start addresses for the final memory configuration
95  * (Set up by the startup code)
96  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
97  */
98 #define CONFIG_SYS_SDRAM_BASE           0x00000000
99 #define CONFIG_SYS_SDRAM_SIZE           16      /* SDRAM size in MB */
100 #define CONFIG_SYS_FLASH_BASE           CONFIG_SYS_CS0_BASE
101
102 #ifdef CONFIG_MONITOR_IS_IN_RAM
103 #define CONFIG_SYS_MONITOR_BASE 0x20000
104 #else
105 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
106 #endif
107
108 #define CONFIG_SYS_MONITOR_LEN          0x20000
109 #define CONFIG_SYS_BOOTPARAMS_LEN       64*1024
110
111 /*
112  * For booting Linux, the board info and command line data
113  * have to be in the first 8 MB of memory, since this is
114  * the maximum mapped by the Linux kernel during initialization ??
115  */
116 #define CONFIG_SYS_BOOTMAPSZ            (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
117 #define CONFIG_SYS_BOOTM_LEN            (CONFIG_SYS_SDRAM_SIZE << 20)
118
119 /*-----------------------------------------------------------------------
120  * FLASH organization
121  */
122 #define CONFIG_SYS_MAX_FLASH_SECT       11      /* max number of sectors on one chip */
123 #define CONFIG_SYS_FLASH_ERASE_TOUT     1000
124
125 #define CONFIG_SYS_FLASH_SIZE           0x200000
126
127 /*-----------------------------------------------------------------------
128  * Cache Configuration
129  */
130
131 #define ICACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
132                                          CONFIG_SYS_INIT_RAM_SIZE - 8)
133 #define DCACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
134                                          CONFIG_SYS_INIT_RAM_SIZE - 4)
135 #define CONFIG_SYS_ICACHE_INV           (CF_CACR_CINV | CF_CACR_INVI)
136 #define CONFIG_SYS_CACHE_ACR0           (CONFIG_SYS_SDRAM_BASE | \
137                                          CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
138                                          CF_ACR_EN | CF_ACR_SM_ALL)
139 #define CONFIG_SYS_CACHE_ICACR          (CF_CACR_CENB | CF_CACR_CINV | \
140                                          CF_CACR_DISD | CF_CACR_INVI | \
141                                          CF_CACR_CEIB | CF_CACR_DCM | \
142                                          CF_CACR_EUSP)
143
144 /*-----------------------------------------------------------------------
145  * Memory bank definitions
146  */
147 #define CONFIG_SYS_CS0_BASE             0xffe00000
148 #define CONFIG_SYS_CS0_CTRL             0x00001980
149 #define CONFIG_SYS_CS0_MASK             0x001F0001
150
151 #define CONFIG_SYS_CS1_BASE             0x30000000
152 #define CONFIG_SYS_CS1_CTRL             0x00001900
153 #define CONFIG_SYS_CS1_MASK             0x00070001
154
155 /*-----------------------------------------------------------------------
156  * Port configuration
157  */
158 #define CONFIG_SYS_FECI2C               0x0FA0
159
160 #endif  /* _M5275EVB_H */