1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Configuation settings for the Motorola MC5275EVB board.
5 * By Arthur Shipkowski <art@videon-central.com>
6 * Copyright (C) 2005 Videon Central, Inc.
8 * Based off of M5272C3 board code by Josef Baumgartner
9 * <josef.baumgartner@telex.de>
13 * board/config.h - configuration options, board specific
20 * High Level Configuration Options
26 #define CONFIG_SYS_UART_PORT (0)
28 /* Configuration for environment
29 * Environment is embedded in u-boot in the second sector of the flash
32 #define LDS_BOARD_TEXT \
33 . = DEFINED(env_offset) ? env_offset : .; \
34 env/embedded.o(.text);
39 #define CONFIG_BOOTP_BOOTFILESIZE
41 /* Available command configuration */
44 #define CONFIG_MII_INIT 1
45 #define CONFIG_SYS_DISCOVER_PHY
46 #define CONFIG_SYS_RX_ETH_BUFFER 8
47 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
48 #define CONFIG_HAS_ETH1
49 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
50 #ifndef CONFIG_SYS_DISCOVER_PHY
51 #define FECDUPLEX FULL
52 #define FECSPEED _100BASET
54 #ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
55 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
61 #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
62 #define CONFIG_SYS_I2C_PINMUX_REG (gpio_reg->par_feci2c)
63 #define CONFIG_SYS_I2C_PINMUX_CLR (0xFFF0)
64 #define CONFIG_SYS_I2C_PINMUX_SET (0x000F)
67 # define CONFIG_NET_RETRY_COUNT 5
68 # define CONFIG_OVERWRITE_ETHADDR_ONCE
71 #define CONFIG_EXTRA_ENV_SETTINGS \
74 "uboot=u-boot.bin\0" \
75 "load=tftp ${loadaddr} ${uboot}\0" \
76 "upd=run load; run prog\0" \
77 "prog=prot off ffe00000 ffe3ffff;" \
78 "era ffe00000 ffe3ffff;" \
79 "cp.b ${loadaddr} ffe00000 ${filesize};"\
83 #define CONFIG_SYS_CLK 150000000
86 * Low Level Configuration Settings
87 * (address mappings, register initial values, etc.)
88 * You should know what you are doing if you make changes here.
91 #define CONFIG_SYS_MBAR 0x40000000
93 /*-----------------------------------------------------------------------
94 * Definitions for initial stack pointer and data area (in DPRAM)
96 #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
97 #define CONFIG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */
98 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
99 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
101 /*-----------------------------------------------------------------------
102 * Start addresses for the final memory configuration
103 * (Set up by the startup code)
104 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
106 #define CONFIG_SYS_SDRAM_BASE 0x00000000
107 #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */
108 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
110 #ifdef CONFIG_MONITOR_IS_IN_RAM
111 #define CONFIG_SYS_MONITOR_BASE 0x20000
113 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
116 #define CONFIG_SYS_MONITOR_LEN 0x20000
117 #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
120 * For booting Linux, the board info and command line data
121 * have to be in the first 8 MB of memory, since this is
122 * the maximum mapped by the Linux kernel during initialization ??
124 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
125 #define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
127 /*-----------------------------------------------------------------------
130 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
131 #define CONFIG_SYS_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
132 #define CONFIG_SYS_FLASH_ERASE_TOUT 1000
134 #define CONFIG_SYS_FLASH_SIZE 0x200000
136 /*-----------------------------------------------------------------------
137 * Cache Configuration
140 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
141 CONFIG_SYS_INIT_RAM_SIZE - 8)
142 #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
143 CONFIG_SYS_INIT_RAM_SIZE - 4)
144 #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI)
145 #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
146 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
147 CF_ACR_EN | CF_ACR_SM_ALL)
148 #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \
149 CF_CACR_DISD | CF_CACR_INVI | \
150 CF_CACR_CEIB | CF_CACR_DCM | \
153 /*-----------------------------------------------------------------------
154 * Memory bank definitions
156 #define CONFIG_SYS_CS0_BASE 0xffe00000
157 #define CONFIG_SYS_CS0_CTRL 0x00001980
158 #define CONFIG_SYS_CS0_MASK 0x001F0001
160 #define CONFIG_SYS_CS1_BASE 0x30000000
161 #define CONFIG_SYS_CS1_CTRL 0x00001900
162 #define CONFIG_SYS_CS1_MASK 0x00070001
164 /*-----------------------------------------------------------------------
167 #define CONFIG_SYS_FECI2C 0x0FA0
169 #endif /* _M5275EVB_H */