1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Configuation settings for the Motorola MC5275EVB board.
5 * By Arthur Shipkowski <art@videon-central.com>
6 * Copyright (C) 2005 Videon Central, Inc.
8 * Based off of M5272C3 board code by Josef Baumgartner
9 * <josef.baumgartner@telex.de>
13 * board/config.h - configuration options, board specific
20 * High Level Configuration Options
26 #define CONFIG_SYS_UART_PORT (0)
28 /* Configuration for environment
29 * Environment is embedded in u-boot in the second sector of the flash
32 #define LDS_BOARD_TEXT \
33 . = DEFINED(env_offset) ? env_offset : .; \
34 env/embedded.o(.text);
36 /* Available command configuration */
39 #define CONFIG_SYS_DISCOVER_PHY
40 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
41 #ifndef CONFIG_SYS_DISCOVER_PHY
42 #define FECDUPLEX FULL
43 #define FECSPEED _100BASET
48 #define CONFIG_SYS_I2C_PINMUX_REG (gpio_reg->par_feci2c)
49 #define CONFIG_SYS_I2C_PINMUX_CLR (0xFFF0)
50 #define CONFIG_SYS_I2C_PINMUX_SET (0x000F)
53 # define CONFIG_OVERWRITE_ETHADDR_ONCE
56 #define CONFIG_EXTRA_ENV_SETTINGS \
59 "uboot=u-boot.bin\0" \
60 "load=tftp ${loadaddr} ${uboot}\0" \
61 "upd=run load; run prog\0" \
62 "prog=prot off ffe00000 ffe3ffff;" \
63 "era ffe00000 ffe3ffff;" \
64 "cp.b ${loadaddr} ffe00000 ${filesize};"\
68 #define CONFIG_SYS_CLK 150000000
71 * Low Level Configuration Settings
72 * (address mappings, register initial values, etc.)
73 * You should know what you are doing if you make changes here.
76 #define CONFIG_SYS_MBAR 0x40000000
78 /*-----------------------------------------------------------------------
79 * Definitions for initial stack pointer and data area (in DPRAM)
81 #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
82 #define CONFIG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */
83 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
84 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
86 /*-----------------------------------------------------------------------
87 * Start addresses for the final memory configuration
88 * (Set up by the startup code)
89 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
91 #define CONFIG_SYS_SDRAM_BASE 0x00000000
92 #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */
93 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
95 #ifdef CONFIG_MONITOR_IS_IN_RAM
96 #define CONFIG_SYS_MONITOR_BASE 0x20000
98 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
101 #define CONFIG_SYS_MONITOR_LEN 0x20000
102 #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
105 * For booting Linux, the board info and command line data
106 * have to be in the first 8 MB of memory, since this is
107 * the maximum mapped by the Linux kernel during initialization ??
109 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
110 #define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
112 /*-----------------------------------------------------------------------
115 #define CONFIG_SYS_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
116 #define CONFIG_SYS_FLASH_ERASE_TOUT 1000
118 #define CONFIG_SYS_FLASH_SIZE 0x200000
120 /*-----------------------------------------------------------------------
121 * Cache Configuration
124 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
125 CONFIG_SYS_INIT_RAM_SIZE - 8)
126 #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
127 CONFIG_SYS_INIT_RAM_SIZE - 4)
128 #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI)
129 #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
130 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
131 CF_ACR_EN | CF_ACR_SM_ALL)
132 #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \
133 CF_CACR_DISD | CF_CACR_INVI | \
134 CF_CACR_CEIB | CF_CACR_DCM | \
137 /*-----------------------------------------------------------------------
138 * Memory bank definitions
140 #define CONFIG_SYS_CS0_BASE 0xffe00000
141 #define CONFIG_SYS_CS0_CTRL 0x00001980
142 #define CONFIG_SYS_CS0_MASK 0x001F0001
144 #define CONFIG_SYS_CS1_BASE 0x30000000
145 #define CONFIG_SYS_CS1_CTRL 0x00001900
146 #define CONFIG_SYS_CS1_MASK 0x00070001
148 /*-----------------------------------------------------------------------
151 #define CONFIG_SYS_FECI2C 0x0FA0
153 #endif /* _M5275EVB_H */