include/configs/M5275EVB.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Configuation settings for the Motorola MC5275EVB board.
   4  *
   5  * By Arthur Shipkowski <art@videon-central.com>
   6  * Copyright (C) 2005 Videon Central, Inc.
   7  *
   8  * Based off of M5272C3 board code by Josef Baumgartner
   9  * <josef.baumgartner@telex.de>
  10  */
  11
  12 /*
  13  * board/config.h - configuration options, board specific
  14  */
  15
  16 #ifndef _M5275EVB_H
  17 #define _M5275EVB_H
  18
  19 /*
  20  * High Level Configuration Options
  21  * (easy to change)
  22  */
  23
  24 #define CONFIG_MCFTMR
  25
  26 #define CONFIG_SYS_UART_PORT            (0)
  27
  28 /* Configuration for environment
  29  * Environment is embedded in u-boot in the second sector of the flash
  30  */
  31
  32 #define LDS_BOARD_TEXT \
  33         . = DEFINED(env_offset) ? env_offset : .; \
  34         env/embedded.o(.text);
  35
  36 /* Available command configuration */
  37
  38 #ifdef CONFIG_MCFFEC
  39 #define CONFIG_MII_INIT         1
  40 #define CONFIG_SYS_DISCOVER_PHY
  41 #define CONFIG_SYS_RX_ETH_BUFFER        8
  42 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
  43 #ifndef CONFIG_SYS_DISCOVER_PHY
  44 #define FECDUPLEX               FULL
  45 #define FECSPEED                _100BASET
  46 #endif
  47 #endif
  48
  49 /* I2C */
  50 #define CONFIG_SYS_I2C_PINMUX_REG       (gpio_reg->par_feci2c)
  51 #define CONFIG_SYS_I2C_PINMUX_CLR       (0xFFF0)
  52 #define CONFIG_SYS_I2C_PINMUX_SET       (0x000F)
  53
  54 #ifdef CONFIG_MCFFEC
  55 #       define CONFIG_OVERWRITE_ETHADDR_ONCE
  56 #endif                          /* FEC_ENET */
  57
  58 #define CONFIG_EXTRA_ENV_SETTINGS               \
  59         "netdev=eth0\0"                         \
  60         "loadaddr=10000\0"                      \
  61         "uboot=u-boot.bin\0"                    \
  62         "load=tftp ${loadaddr} ${uboot}\0"      \
  63         "upd=run load; run prog\0"              \
  64         "prog=prot off ffe00000 ffe3ffff;"      \
  65         "era ffe00000 ffe3ffff;"                \
  66         "cp.b ${loadaddr} ffe00000 ${filesize};"\
  67         "save\0"                                \
  68         ""
  69
  70 #define CONFIG_SYS_CLK                  150000000
  71
  72 /*
  73  * Low Level Configuration Settings
  74  * (address mappings, register initial values, etc.)
  75  * You should know what you are doing if you make changes here.
  76  */
  77
  78 #define CONFIG_SYS_MBAR         0x40000000
  79
  80 /*-----------------------------------------------------------------------
  81  * Definitions for initial stack pointer and data area (in DPRAM)
  82  */
  83 #define CONFIG_SYS_INIT_RAM_ADDR        0x20000000
  84 #define CONFIG_SYS_INIT_RAM_SIZE        0x10000 /* Size of used area in internal SRAM */
  85 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  86 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
  87
  88 /*-----------------------------------------------------------------------
  89  * Start addresses for the final memory configuration
  90  * (Set up by the startup code)
  91  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
  92  */
  93 #define CONFIG_SYS_SDRAM_BASE           0x00000000
  94 #define CONFIG_SYS_SDRAM_SIZE           16      /* SDRAM size in MB */
  95 #define CONFIG_SYS_FLASH_BASE           CONFIG_SYS_CS0_BASE
  96
  97 #ifdef CONFIG_MONITOR_IS_IN_RAM
  98 #define CONFIG_SYS_MONITOR_BASE 0x20000
  99 #else
 100 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
 101 #endif
 102
 103 #define CONFIG_SYS_MONITOR_LEN          0x20000
 104 #define CONFIG_SYS_BOOTPARAMS_LEN       64*1024
 105
 106 /*
 107  * For booting Linux, the board info and command line data
 108  * have to be in the first 8 MB of memory, since this is
 109  * the maximum mapped by the Linux kernel during initialization ??
 110  */
 111 #define CONFIG_SYS_BOOTMAPSZ            (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
 112 #define CONFIG_SYS_BOOTM_LEN            (CONFIG_SYS_SDRAM_SIZE << 20)
 113
 114 /*-----------------------------------------------------------------------
 115  * FLASH organization
 116  */
 117 #define CONFIG_SYS_MAX_FLASH_SECT       11      /* max number of sectors on one chip */
 118 #define CONFIG_SYS_FLASH_ERASE_TOUT     1000
 119
 120 #define CONFIG_SYS_FLASH_SIZE           0x200000
 121
 122 /*-----------------------------------------------------------------------
 123  * Cache Configuration
 124  */
 125
 126 #define ICACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
 127                                          CONFIG_SYS_INIT_RAM_SIZE - 8)
 128 #define DCACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
 129                                          CONFIG_SYS_INIT_RAM_SIZE - 4)
 130 #define CONFIG_SYS_ICACHE_INV           (CF_CACR_CINV | CF_CACR_INVI)
 131 #define CONFIG_SYS_CACHE_ACR0           (CONFIG_SYS_SDRAM_BASE | \
 132                                          CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
 133                                          CF_ACR_EN | CF_ACR_SM_ALL)
 134 #define CONFIG_SYS_CACHE_ICACR          (CF_CACR_CENB | CF_CACR_CINV | \
 135                                          CF_CACR_DISD | CF_CACR_INVI | \
 136                                          CF_CACR_CEIB | CF_CACR_DCM | \
 137                                          CF_CACR_EUSP)
 138
 139 /*-----------------------------------------------------------------------
 140  * Memory bank definitions
 141  */
 142 #define CONFIG_SYS_CS0_BASE             0xffe00000
 143 #define CONFIG_SYS_CS0_CTRL             0x00001980
 144 #define CONFIG_SYS_CS0_MASK             0x001F0001
 145
 146 #define CONFIG_SYS_CS1_BASE             0x30000000
 147 #define CONFIG_SYS_CS1_CTRL             0x00001900
 148 #define CONFIG_SYS_CS1_MASK             0x00070001
 149
 150 /*-----------------------------------------------------------------------
 151  * Port configuration
 152  */
 153 #define CONFIG_SYS_FECI2C               0x0FA0
 154
 155 #endif  /* _M5275EVB_H */