1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Configuation settings for the Motorola MC5275EVB board.
5 * By Arthur Shipkowski <art@videon-central.com>
6 * Copyright (C) 2005 Videon Central, Inc.
8 * Based off of M5272C3 board code by Josef Baumgartner
9 * <josef.baumgartner@telex.de>
13 * board/config.h - configuration options, board specific
20 * High Level Configuration Options
24 #define CONFIG_SYS_UART_PORT (0)
26 /* Configuration for environment
27 * Environment is embedded in u-boot in the second sector of the flash
30 #define LDS_BOARD_TEXT \
31 . = DEFINED(env_offset) ? env_offset : .; \
32 env/embedded.o(.text);
34 /* Available command configuration */
37 #define CONFIG_SYS_DISCOVER_PHY
38 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
39 #ifndef CONFIG_SYS_DISCOVER_PHY
40 #define FECDUPLEX FULL
41 #define FECSPEED _100BASET
46 #define CONFIG_SYS_I2C_PINMUX_REG (gpio_reg->par_feci2c)
47 #define CONFIG_SYS_I2C_PINMUX_CLR (0xFFF0)
48 #define CONFIG_SYS_I2C_PINMUX_SET (0x000F)
51 # define CONFIG_OVERWRITE_ETHADDR_ONCE
54 #define CONFIG_EXTRA_ENV_SETTINGS \
57 "uboot=u-boot.bin\0" \
58 "load=tftp ${loadaddr} ${uboot}\0" \
59 "upd=run load; run prog\0" \
60 "prog=prot off ffe00000 ffe3ffff;" \
61 "era ffe00000 ffe3ffff;" \
62 "cp.b ${loadaddr} ffe00000 ${filesize};"\
66 #define CONFIG_SYS_CLK 150000000
69 * Low Level Configuration Settings
70 * (address mappings, register initial values, etc.)
71 * You should know what you are doing if you make changes here.
74 #define CONFIG_SYS_MBAR 0x40000000
76 /*-----------------------------------------------------------------------
77 * Definitions for initial stack pointer and data area (in DPRAM)
79 #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
80 #define CONFIG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */
81 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
82 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
84 /*-----------------------------------------------------------------------
85 * Start addresses for the final memory configuration
86 * (Set up by the startup code)
87 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
89 #define CONFIG_SYS_SDRAM_BASE 0x00000000
90 #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */
91 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
93 #ifdef CONFIG_MONITOR_IS_IN_RAM
94 #define CONFIG_SYS_MONITOR_BASE 0x20000
96 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
99 #define CONFIG_SYS_MONITOR_LEN 0x20000
100 #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
103 * For booting Linux, the board info and command line data
104 * have to be in the first 8 MB of memory, since this is
105 * the maximum mapped by the Linux kernel during initialization ??
107 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
108 #define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
110 /*-----------------------------------------------------------------------
113 #define CONFIG_SYS_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
114 #define CONFIG_SYS_FLASH_ERASE_TOUT 1000
116 #define CONFIG_SYS_FLASH_SIZE 0x200000
118 /*-----------------------------------------------------------------------
119 * Cache Configuration
122 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
123 CONFIG_SYS_INIT_RAM_SIZE - 8)
124 #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
125 CONFIG_SYS_INIT_RAM_SIZE - 4)
126 #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI)
127 #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
128 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
129 CF_ACR_EN | CF_ACR_SM_ALL)
130 #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \
131 CF_CACR_DISD | CF_CACR_INVI | \
132 CF_CACR_CEIB | CF_CACR_DCM | \
135 /*-----------------------------------------------------------------------
136 * Memory bank definitions
138 #define CONFIG_SYS_CS0_BASE 0xffe00000
139 #define CONFIG_SYS_CS0_CTRL 0x00001980
140 #define CONFIG_SYS_CS0_MASK 0x001F0001
142 #define CONFIG_SYS_CS1_BASE 0x30000000
143 #define CONFIG_SYS_CS1_CTRL 0x00001900
144 #define CONFIG_SYS_CS1_MASK 0x00070001
146 /*-----------------------------------------------------------------------
149 #define CONFIG_SYS_FECI2C 0x0FA0
151 #endif /* _M5275EVB_H */