include/configs/M5275EVB.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Configuation settings for the Motorola MC5275EVB board.
   4  *
   5  * By Arthur Shipkowski <art@videon-central.com>
   6  * Copyright (C) 2005 Videon Central, Inc.
   7  *
   8  * Based off of M5272C3 board code by Josef Baumgartner
   9  * <josef.baumgartner@telex.de>
  10  */
  11
  12 /*
  13  * board/config.h - configuration options, board specific
  14  */
  15
  16 #ifndef _M5275EVB_H
  17 #define _M5275EVB_H
  18
  19 /*
  20  * High Level Configuration Options
  21  * (easy to change)
  22  */
  23
  24 #define CONFIG_MCFTMR
  25
  26 #define CONFIG_SYS_UART_PORT            (0)
  27
  28 /* Configuration for environment
  29  * Environment is embedded in u-boot in the second sector of the flash
  30  */
  31
  32 #define LDS_BOARD_TEXT \
  33         . = DEFINED(env_offset) ? env_offset : .; \
  34         env/embedded.o(.text);
  35
  36 /* Available command configuration */
  37
  38 #ifdef CONFIG_MCFFEC
  39 #define CONFIG_MII_INIT         1
  40 #define CONFIG_SYS_DISCOVER_PHY
  41 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
  42 #ifndef CONFIG_SYS_DISCOVER_PHY
  43 #define FECDUPLEX               FULL
  44 #define FECSPEED                _100BASET
  45 #endif
  46 #endif
  47
  48 /* I2C */
  49 #define CONFIG_SYS_I2C_PINMUX_REG       (gpio_reg->par_feci2c)
  50 #define CONFIG_SYS_I2C_PINMUX_CLR       (0xFFF0)
  51 #define CONFIG_SYS_I2C_PINMUX_SET       (0x000F)
  52
  53 #ifdef CONFIG_MCFFEC
  54 #       define CONFIG_OVERWRITE_ETHADDR_ONCE
  55 #endif                          /* FEC_ENET */
  56
  57 #define CONFIG_EXTRA_ENV_SETTINGS               \
  58         "netdev=eth0\0"                         \
  59         "loadaddr=10000\0"                      \
  60         "uboot=u-boot.bin\0"                    \
  61         "load=tftp ${loadaddr} ${uboot}\0"      \
  62         "upd=run load; run prog\0"              \
  63         "prog=prot off ffe00000 ffe3ffff;"      \
  64         "era ffe00000 ffe3ffff;"                \
  65         "cp.b ${loadaddr} ffe00000 ${filesize};"\
  66         "save\0"                                \
  67         ""
  68
  69 #define CONFIG_SYS_CLK                  150000000
  70
  71 /*
  72  * Low Level Configuration Settings
  73  * (address mappings, register initial values, etc.)
  74  * You should know what you are doing if you make changes here.
  75  */
  76
  77 #define CONFIG_SYS_MBAR         0x40000000
  78
  79 /*-----------------------------------------------------------------------
  80  * Definitions for initial stack pointer and data area (in DPRAM)
  81  */
  82 #define CONFIG_SYS_INIT_RAM_ADDR        0x20000000
  83 #define CONFIG_SYS_INIT_RAM_SIZE        0x10000 /* Size of used area in internal SRAM */
  84 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  85 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
  86
  87 /*-----------------------------------------------------------------------
  88  * Start addresses for the final memory configuration
  89  * (Set up by the startup code)
  90  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
  91  */
  92 #define CONFIG_SYS_SDRAM_BASE           0x00000000
  93 #define CONFIG_SYS_SDRAM_SIZE           16      /* SDRAM size in MB */
  94 #define CONFIG_SYS_FLASH_BASE           CONFIG_SYS_CS0_BASE
  95
  96 #ifdef CONFIG_MONITOR_IS_IN_RAM
  97 #define CONFIG_SYS_MONITOR_BASE 0x20000
  98 #else
  99 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
 100 #endif
 101
 102 #define CONFIG_SYS_MONITOR_LEN          0x20000
 103 #define CONFIG_SYS_BOOTPARAMS_LEN       64*1024
 104
 105 /*
 106  * For booting Linux, the board info and command line data
 107  * have to be in the first 8 MB of memory, since this is
 108  * the maximum mapped by the Linux kernel during initialization ??
 109  */
 110 #define CONFIG_SYS_BOOTMAPSZ            (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
 111 #define CONFIG_SYS_BOOTM_LEN            (CONFIG_SYS_SDRAM_SIZE << 20)
 112
 113 /*-----------------------------------------------------------------------
 114  * FLASH organization
 115  */
 116 #define CONFIG_SYS_MAX_FLASH_SECT       11      /* max number of sectors on one chip */
 117 #define CONFIG_SYS_FLASH_ERASE_TOUT     1000
 118
 119 #define CONFIG_SYS_FLASH_SIZE           0x200000
 120
 121 /*-----------------------------------------------------------------------
 122  * Cache Configuration
 123  */
 124
 125 #define ICACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
 126                                          CONFIG_SYS_INIT_RAM_SIZE - 8)
 127 #define DCACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
 128                                          CONFIG_SYS_INIT_RAM_SIZE - 4)
 129 #define CONFIG_SYS_ICACHE_INV           (CF_CACR_CINV | CF_CACR_INVI)
 130 #define CONFIG_SYS_CACHE_ACR0           (CONFIG_SYS_SDRAM_BASE | \
 131                                          CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
 132                                          CF_ACR_EN | CF_ACR_SM_ALL)
 133 #define CONFIG_SYS_CACHE_ICACR          (CF_CACR_CENB | CF_CACR_CINV | \
 134                                          CF_CACR_DISD | CF_CACR_INVI | \
 135                                          CF_CACR_CEIB | CF_CACR_DCM | \
 136                                          CF_CACR_EUSP)
 137
 138 /*-----------------------------------------------------------------------
 139  * Memory bank definitions
 140  */
 141 #define CONFIG_SYS_CS0_BASE             0xffe00000
 142 #define CONFIG_SYS_CS0_CTRL             0x00001980
 143 #define CONFIG_SYS_CS0_MASK             0x001F0001
 144
 145 #define CONFIG_SYS_CS1_BASE             0x30000000
 146 #define CONFIG_SYS_CS1_CTRL             0x00001900
 147 #define CONFIG_SYS_CS1_MASK             0x00070001
 148
 149 /*-----------------------------------------------------------------------
 150  * Port configuration
 151  */
 152 #define CONFIG_SYS_FECI2C               0x0FA0
 153
 154 #endif  /* _M5275EVB_H */