include/configs/M5275EVB.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Configuation settings for the Motorola MC5275EVB board.
   4  *
   5  * By Arthur Shipkowski <art@videon-central.com>
   6  * Copyright (C) 2005 Videon Central, Inc.
   7  *
   8  * Based off of M5272C3 board code by Josef Baumgartner
   9  * <josef.baumgartner@telex.de>
  10  */
  11
  12 /*
  13  * board/config.h - configuration options, board specific
  14  */
  15
  16 #ifndef _M5275EVB_H
  17 #define _M5275EVB_H
  18
  19 /*
  20  * High Level Configuration Options
  21  * (easy to change)
  22  */
  23
  24 #define CONFIG_SYS_UART_PORT            (0)
  25
  26 /* Configuration for environment
  27  * Environment is embedded in u-boot in the second sector of the flash
  28  */
  29
  30 #define LDS_BOARD_TEXT \
  31         . = DEFINED(env_offset) ? env_offset : .; \
  32         env/embedded.o(.text);
  33
  34 /* Available command configuration */
  35
  36 #ifdef CONFIG_MCFFEC
  37 #define CONFIG_SYS_DISCOVER_PHY
  38 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
  39 #ifndef CONFIG_SYS_DISCOVER_PHY
  40 #define FECDUPLEX               FULL
  41 #define FECSPEED                _100BASET
  42 #endif
  43 #endif
  44
  45 /* I2C */
  46 #define CONFIG_SYS_I2C_PINMUX_REG       (gpio_reg->par_feci2c)
  47 #define CONFIG_SYS_I2C_PINMUX_CLR       (0xFFF0)
  48 #define CONFIG_SYS_I2C_PINMUX_SET       (0x000F)
  49
  50 #ifdef CONFIG_MCFFEC
  51 #       define CONFIG_OVERWRITE_ETHADDR_ONCE
  52 #endif                          /* FEC_ENET */
  53
  54 #define CONFIG_EXTRA_ENV_SETTINGS               \
  55         "netdev=eth0\0"                         \
  56         "loadaddr=10000\0"                      \
  57         "uboot=u-boot.bin\0"                    \
  58         "load=tftp ${loadaddr} ${uboot}\0"      \
  59         "upd=run load; run prog\0"              \
  60         "prog=prot off ffe00000 ffe3ffff;"      \
  61         "era ffe00000 ffe3ffff;"                \
  62         "cp.b ${loadaddr} ffe00000 ${filesize};"\
  63         "save\0"                                \
  64         ""
  65
  66 #define CONFIG_SYS_CLK                  150000000
  67
  68 /*
  69  * Low Level Configuration Settings
  70  * (address mappings, register initial values, etc.)
  71  * You should know what you are doing if you make changes here.
  72  */
  73
  74 #define CONFIG_SYS_MBAR         0x40000000
  75
  76 /*-----------------------------------------------------------------------
  77  * Definitions for initial stack pointer and data area (in DPRAM)
  78  */
  79 #define CONFIG_SYS_INIT_RAM_ADDR        0x20000000
  80 #define CONFIG_SYS_INIT_RAM_SIZE        0x10000 /* Size of used area in internal SRAM */
  81
  82 /*-----------------------------------------------------------------------
  83  * Start addresses for the final memory configuration
  84  * (Set up by the startup code)
  85  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
  86  */
  87 #define CONFIG_SYS_SDRAM_BASE           0x00000000
  88 #define CONFIG_SYS_SDRAM_SIZE           16      /* SDRAM size in MB */
  89 #define CONFIG_SYS_FLASH_BASE           CONFIG_SYS_CS0_BASE
  90
  91 #define CONFIG_SYS_MONITOR_LEN          0x20000
  92
  93 /*
  94  * For booting Linux, the board info and command line data
  95  * have to be in the first 8 MB of memory, since this is
  96  * the maximum mapped by the Linux kernel during initialization ??
  97  */
  98 #define CONFIG_SYS_BOOTMAPSZ            (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
  99 #define CONFIG_SYS_BOOTM_LEN            (CONFIG_SYS_SDRAM_SIZE << 20)
 100
 101 /*-----------------------------------------------------------------------
 102  * FLASH organization
 103  */
 104 #define CONFIG_SYS_MAX_FLASH_SECT       11      /* max number of sectors on one chip */
 105 #define CONFIG_SYS_FLASH_ERASE_TOUT     1000
 106
 107 #define CONFIG_SYS_FLASH_SIZE           0x200000
 108
 109 /*-----------------------------------------------------------------------
 110  * Cache Configuration
 111  */
 112
 113 #define ICACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
 114                                          CONFIG_SYS_INIT_RAM_SIZE - 8)
 115 #define DCACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
 116                                          CONFIG_SYS_INIT_RAM_SIZE - 4)
 117 #define CONFIG_SYS_ICACHE_INV           (CF_CACR_CINV | CF_CACR_INVI)
 118 #define CONFIG_SYS_CACHE_ACR0           (CONFIG_SYS_SDRAM_BASE | \
 119                                          CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
 120                                          CF_ACR_EN | CF_ACR_SM_ALL)
 121 #define CONFIG_SYS_CACHE_ICACR          (CF_CACR_CENB | CF_CACR_CINV | \
 122                                          CF_CACR_DISD | CF_CACR_INVI | \
 123                                          CF_CACR_CEIB | CF_CACR_DCM | \
 124                                          CF_CACR_EUSP)
 125
 126 /*-----------------------------------------------------------------------
 127  * Memory bank definitions
 128  */
 129 #define CONFIG_SYS_CS0_BASE             0xffe00000
 130 #define CONFIG_SYS_CS0_CTRL             0x00001980
 131 #define CONFIG_SYS_CS0_MASK             0x001F0001
 132
 133 #define CONFIG_SYS_CS1_BASE             0x30000000
 134 #define CONFIG_SYS_CS1_CTRL             0x00001900
 135 #define CONFIG_SYS_CS1_MASK             0x00070001
 136
 137 /*-----------------------------------------------------------------------
 138  * Port configuration
 139  */
 140 #define CONFIG_SYS_FECI2C               0x0FA0
 141
 142 #endif  /* _M5275EVB_H */