include/configs/M5275EVB.h

   1 /*
   2  * Configuation settings for the Motorola MC5275EVB board.
   3  *
   4  * By Arthur Shipkowski <art@videon-central.com>
   5  * Copyright (C) 2005 Videon Central, Inc.
   6  *
   7  * Based off of M5272C3 board code by Josef Baumgartner
   8  * <josef.baumgartner@telex.de>
   9  *
  10  * SPDX-License-Identifier:     GPL-2.0+
  11  */
  12
  13 /*
  14  * board/config.h - configuration options, board specific
  15  */
  16
  17 #ifndef _M5275EVB_H
  18 #define _M5275EVB_H
  19
  20 /*
  21  * High Level Configuration Options
  22  * (easy to change)
  23  */
  24 #define CONFIG_M5275EVB                 /* define board type */
  25
  26 #define CONFIG_MCFTMR
  27
  28 #define CONFIG_MCFUART
  29 #define CONFIG_SYS_UART_PORT            (0)
  30
  31 /* Configuration for environment
  32  * Environment is embedded in u-boot in the second sector of the flash
  33  */
  34 #ifndef CONFIG_MONITOR_IS_IN_RAM
  35 #define CONFIG_ENV_OFFSET               0x4000
  36 #define CONFIG_ENV_SECT_SIZE    0x2000
  37 #define CONFIG_ENV_IS_IN_FLASH  1
  38 #else
  39 #define CONFIG_ENV_ADDR         0xffe04000
  40 #define CONFIG_ENV_SECT_SIZE    0x2000
  41 #define CONFIG_ENV_IS_IN_FLASH  1
  42 #endif
  43
  44 #define LDS_BOARD_TEXT \
  45         . = DEFINED(env_offset) ? env_offset : .; \
  46         common/env_embedded.o (.text);
  47
  48 /*
  49  * BOOTP options
  50  */
  51 #define CONFIG_BOOTP_BOOTFILESIZE
  52 #define CONFIG_BOOTP_BOOTPATH
  53 #define CONFIG_BOOTP_GATEWAY
  54 #define CONFIG_BOOTP_HOSTNAME
  55
  56 /* Available command configuration */
  57
  58 #define CONFIG_MCFFEC
  59 #ifdef CONFIG_MCFFEC
  60 #define CONFIG_MII              1
  61 #define CONFIG_MII_INIT         1
  62 #define CONFIG_SYS_DISCOVER_PHY
  63 #define CONFIG_SYS_RX_ETH_BUFFER        8
  64 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
  65 #define CONFIG_SYS_FEC0_PINMUX          0
  66 #define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE
  67 #define CONFIG_SYS_FEC1_PINMUX          0
  68 #define CONFIG_SYS_FEC1_MIIBASE CONFIG_SYS_FEC1_IOBASE
  69 #define MCFFEC_TOUT_LOOP        50000
  70 #define CONFIG_HAS_ETH1
  71 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
  72 #ifndef CONFIG_SYS_DISCOVER_PHY
  73 #define FECDUPLEX               FULL
  74 #define FECSPEED                _100BASET
  75 #else
  76 #ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
  77 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
  78 #endif
  79 #endif
  80 #endif
  81
  82 /* I2C */
  83 #define CONFIG_SYS_I2C
  84 #define CONFIG_SYS_I2C_FSL
  85 #define CONFIG_SYS_FSL_I2C_SPEED        80000
  86 #define CONFIG_SYS_FSL_I2C_SLAVE        0x7F
  87 #define CONFIG_SYS_FSL_I2C_OFFSET       0x00000300
  88 #define CONFIG_SYS_IMMR         CONFIG_SYS_MBAR
  89 #define CONFIG_SYS_I2C_PINMUX_REG       (gpio_reg->par_feci2c)
  90 #define CONFIG_SYS_I2C_PINMUX_CLR       (0xFFF0)
  91 #define CONFIG_SYS_I2C_PINMUX_SET       (0x000F)
  92
  93 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
  94
  95 #if (CONFIG_CMD_KGDB)
  96 #       define CONFIG_SYS_CBSIZE        1024
  97 #else
  98 #       define CONFIG_SYS_CBSIZE        256
  99 #endif
 100 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 101 #define CONFIG_SYS_MAXARGS              16
 102 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
 103
 104 #define CONFIG_SYS_LOAD_ADDR            0x800000
 105
 106 #define CONFIG_BOOTCOMMAND      "bootm ffe40000"
 107 #define CONFIG_SYS_MEMTEST_START        0x400
 108 #define CONFIG_SYS_MEMTEST_END          0x380000
 109
 110 #ifdef CONFIG_MCFFEC
 111 #       define CONFIG_NET_RETRY_COUNT   5
 112 #       define CONFIG_OVERWRITE_ETHADDR_ONCE
 113 #endif                          /* FEC_ENET */
 114
 115 #define CONFIG_EXTRA_ENV_SETTINGS               \
 116         "netdev=eth0\0"                         \
 117         "loadaddr=10000\0"                      \
 118         "uboot=u-boot.bin\0"                    \
 119         "load=tftp ${loadaddr} ${uboot}\0"      \
 120         "upd=run load; run prog\0"              \
 121         "prog=prot off ffe00000 ffe3ffff;"      \
 122         "era ffe00000 ffe3ffff;"                \
 123         "cp.b ${loadaddr} ffe00000 ${filesize};"\
 124         "save\0"                                \
 125         ""
 126
 127 #define CONFIG_SYS_CLK                  150000000
 128
 129 /*
 130  * Low Level Configuration Settings
 131  * (address mappings, register initial values, etc.)
 132  * You should know what you are doing if you make changes here.
 133  */
 134
 135 #define CONFIG_SYS_MBAR         0x40000000
 136
 137 /*-----------------------------------------------------------------------
 138  * Definitions for initial stack pointer and data area (in DPRAM)
 139  */
 140 #define CONFIG_SYS_INIT_RAM_ADDR        0x20000000
 141 #define CONFIG_SYS_INIT_RAM_SIZE        0x10000 /* Size of used area in internal SRAM */
 142 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 143 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 144
 145 /*-----------------------------------------------------------------------
 146  * Start addresses for the final memory configuration
 147  * (Set up by the startup code)
 148  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
 149  */
 150 #define CONFIG_SYS_SDRAM_BASE           0x00000000
 151 #define CONFIG_SYS_SDRAM_SIZE           16      /* SDRAM size in MB */
 152 #define CONFIG_SYS_FLASH_BASE           CONFIG_SYS_CS0_BASE
 153
 154 #ifdef CONFIG_MONITOR_IS_IN_RAM
 155 #define CONFIG_SYS_MONITOR_BASE 0x20000
 156 #else
 157 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
 158 #endif
 159
 160 #define CONFIG_SYS_MONITOR_LEN          0x20000
 161 #define CONFIG_SYS_MALLOC_LEN           (256 << 10)
 162 #define CONFIG_SYS_BOOTPARAMS_LEN       64*1024
 163
 164 /*
 165  * For booting Linux, the board info and command line data
 166  * have to be in the first 8 MB of memory, since this is
 167  * the maximum mapped by the Linux kernel during initialization ??
 168  */
 169 #define CONFIG_SYS_BOOTMAPSZ            (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
 170 #define CONFIG_SYS_BOOTM_LEN            (CONFIG_SYS_SDRAM_SIZE << 20)
 171
 172 /*-----------------------------------------------------------------------
 173  * FLASH organization
 174  */
 175 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max number of memory banks */
 176 #define CONFIG_SYS_MAX_FLASH_SECT       11      /* max number of sectors on one chip */
 177 #define CONFIG_SYS_FLASH_ERASE_TOUT     1000
 178
 179 #define CONFIG_SYS_FLASH_CFI            1
 180 #define CONFIG_FLASH_CFI_DRIVER 1
 181 #define CONFIG_SYS_FLASH_SIZE           0x200000
 182
 183 /*-----------------------------------------------------------------------
 184  * Cache Configuration
 185  */
 186 #define CONFIG_SYS_CACHELINE_SIZE       16
 187
 188 #define ICACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
 189                                          CONFIG_SYS_INIT_RAM_SIZE - 8)
 190 #define DCACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
 191                                          CONFIG_SYS_INIT_RAM_SIZE - 4)
 192 #define CONFIG_SYS_ICACHE_INV           (CF_CACR_CINV | CF_CACR_INVI)
 193 #define CONFIG_SYS_CACHE_ACR0           (CONFIG_SYS_SDRAM_BASE | \
 194                                          CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
 195                                          CF_ACR_EN | CF_ACR_SM_ALL)
 196 #define CONFIG_SYS_CACHE_ICACR          (CF_CACR_CENB | CF_CACR_CINV | \
 197                                          CF_CACR_DISD | CF_CACR_INVI | \
 198                                          CF_CACR_CEIB | CF_CACR_DCM | \
 199                                          CF_CACR_EUSP)
 200
 201 /*-----------------------------------------------------------------------
 202  * Memory bank definitions
 203  */
 204 #define CONFIG_SYS_CS0_BASE             0xffe00000
 205 #define CONFIG_SYS_CS0_CTRL             0x00001980
 206 #define CONFIG_SYS_CS0_MASK             0x001F0001
 207
 208 #define CONFIG_SYS_CS1_BASE             0x30000000
 209 #define CONFIG_SYS_CS1_CTRL             0x00001900
 210 #define CONFIG_SYS_CS1_MASK             0x00070001
 211
 212 /*-----------------------------------------------------------------------
 213  * Port configuration
 214  */
 215 #define CONFIG_SYS_FECI2C               0x0FA0
 216
 217 #endif  /* _M5275EVB_H */