include/configs/M5275EVB.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Configuation settings for the Motorola MC5275EVB board.
   4  *
   5  * By Arthur Shipkowski <art@videon-central.com>
   6  * Copyright (C) 2005 Videon Central, Inc.
   7  *
   8  * Based off of M5272C3 board code by Josef Baumgartner
   9  * <josef.baumgartner@telex.de>
  10  */
  11
  12 /*
  13  * board/config.h - configuration options, board specific
  14  */
  15
  16 #ifndef _M5275EVB_H
  17 #define _M5275EVB_H
  18
  19 /*
  20  * High Level Configuration Options
  21  * (easy to change)
  22  */
  23
  24 #define CONFIG_MCFTMR
  25
  26 #define CONFIG_MCFUART
  27 #define CONFIG_SYS_UART_PORT            (0)
  28
  29 /* Configuration for environment
  30  * Environment is embedded in u-boot in the second sector of the flash
  31  */
  32
  33 #define LDS_BOARD_TEXT \
  34         . = DEFINED(env_offset) ? env_offset : .; \
  35         env/embedded.o(.text);
  36
  37 /*
  38  * BOOTP options
  39  */
  40 #define CONFIG_BOOTP_BOOTFILESIZE
  41
  42 /* Available command configuration */
  43
  44 #ifdef CONFIG_MCFFEC
  45 #define CONFIG_MII_INIT         1
  46 #define CONFIG_SYS_DISCOVER_PHY
  47 #define CONFIG_SYS_RX_ETH_BUFFER        8
  48 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
  49 #define CONFIG_HAS_ETH1
  50 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
  51 #ifndef CONFIG_SYS_DISCOVER_PHY
  52 #define FECDUPLEX               FULL
  53 #define FECSPEED                _100BASET
  54 #else
  55 #ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
  56 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
  57 #endif
  58 #endif
  59 #endif
  60
  61 /* I2C */
  62 #define CONFIG_SYS_IMMR         CONFIG_SYS_MBAR
  63 #define CONFIG_SYS_I2C_PINMUX_REG       (gpio_reg->par_feci2c)
  64 #define CONFIG_SYS_I2C_PINMUX_CLR       (0xFFF0)
  65 #define CONFIG_SYS_I2C_PINMUX_SET       (0x000F)
  66
  67 #define CONFIG_BOOTCOMMAND      "bootm ffe40000"
  68
  69 #ifdef CONFIG_MCFFEC
  70 #       define CONFIG_NET_RETRY_COUNT   5
  71 #       define CONFIG_OVERWRITE_ETHADDR_ONCE
  72 #endif                          /* FEC_ENET */
  73
  74 #define CONFIG_EXTRA_ENV_SETTINGS               \
  75         "netdev=eth0\0"                         \
  76         "loadaddr=10000\0"                      \
  77         "uboot=u-boot.bin\0"                    \
  78         "load=tftp ${loadaddr} ${uboot}\0"      \
  79         "upd=run load; run prog\0"              \
  80         "prog=prot off ffe00000 ffe3ffff;"      \
  81         "era ffe00000 ffe3ffff;"                \
  82         "cp.b ${loadaddr} ffe00000 ${filesize};"\
  83         "save\0"                                \
  84         ""
  85
  86 #define CONFIG_SYS_CLK                  150000000
  87
  88 /*
  89  * Low Level Configuration Settings
  90  * (address mappings, register initial values, etc.)
  91  * You should know what you are doing if you make changes here.
  92  */
  93
  94 #define CONFIG_SYS_MBAR         0x40000000
  95
  96 /*-----------------------------------------------------------------------
  97  * Definitions for initial stack pointer and data area (in DPRAM)
  98  */
  99 #define CONFIG_SYS_INIT_RAM_ADDR        0x20000000
 100 #define CONFIG_SYS_INIT_RAM_SIZE        0x10000 /* Size of used area in internal SRAM */
 101 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 102 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 103
 104 /*-----------------------------------------------------------------------
 105  * Start addresses for the final memory configuration
 106  * (Set up by the startup code)
 107  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
 108  */
 109 #define CONFIG_SYS_SDRAM_BASE           0x00000000
 110 #define CONFIG_SYS_SDRAM_SIZE           16      /* SDRAM size in MB */
 111 #define CONFIG_SYS_FLASH_BASE           CONFIG_SYS_CS0_BASE
 112
 113 #ifdef CONFIG_MONITOR_IS_IN_RAM
 114 #define CONFIG_SYS_MONITOR_BASE 0x20000
 115 #else
 116 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
 117 #endif
 118
 119 #define CONFIG_SYS_MONITOR_LEN          0x20000
 120 #define CONFIG_SYS_BOOTPARAMS_LEN       64*1024
 121
 122 /*
 123  * For booting Linux, the board info and command line data
 124  * have to be in the first 8 MB of memory, since this is
 125  * the maximum mapped by the Linux kernel during initialization ??
 126  */
 127 #define CONFIG_SYS_BOOTMAPSZ            (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
 128 #define CONFIG_SYS_BOOTM_LEN            (CONFIG_SYS_SDRAM_SIZE << 20)
 129
 130 /*-----------------------------------------------------------------------
 131  * FLASH organization
 132  */
 133 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max number of memory banks */
 134 #define CONFIG_SYS_MAX_FLASH_SECT       11      /* max number of sectors on one chip */
 135 #define CONFIG_SYS_FLASH_ERASE_TOUT     1000
 136
 137 #define CONFIG_SYS_FLASH_SIZE           0x200000
 138
 139 /*-----------------------------------------------------------------------
 140  * Cache Configuration
 141  */
 142
 143 #define ICACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
 144                                          CONFIG_SYS_INIT_RAM_SIZE - 8)
 145 #define DCACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
 146                                          CONFIG_SYS_INIT_RAM_SIZE - 4)
 147 #define CONFIG_SYS_ICACHE_INV           (CF_CACR_CINV | CF_CACR_INVI)
 148 #define CONFIG_SYS_CACHE_ACR0           (CONFIG_SYS_SDRAM_BASE | \
 149                                          CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
 150                                          CF_ACR_EN | CF_ACR_SM_ALL)
 151 #define CONFIG_SYS_CACHE_ICACR          (CF_CACR_CENB | CF_CACR_CINV | \
 152                                          CF_CACR_DISD | CF_CACR_INVI | \
 153                                          CF_CACR_CEIB | CF_CACR_DCM | \
 154                                          CF_CACR_EUSP)
 155
 156 /*-----------------------------------------------------------------------
 157  * Memory bank definitions
 158  */
 159 #define CONFIG_SYS_CS0_BASE             0xffe00000
 160 #define CONFIG_SYS_CS0_CTRL             0x00001980
 161 #define CONFIG_SYS_CS0_MASK             0x001F0001
 162
 163 #define CONFIG_SYS_CS1_BASE             0x30000000
 164 #define CONFIG_SYS_CS1_CTRL             0x00001900
 165 #define CONFIG_SYS_CS1_MASK             0x00070001
 166
 167 /*-----------------------------------------------------------------------
 168  * Port configuration
 169  */
 170 #define CONFIG_SYS_FECI2C               0x0FA0
 171
 172 #endif  /* _M5275EVB_H */