1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Configuation settings for the Motorola MC5272C3 board.
5 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
9 * board/config.h - configuration options, board specific
16 * High Level Configuration Options
20 #define CFG_SYS_UART_PORT (0)
22 #undef CONFIG_MONITOR_IS_IN_RAM /* define if monitor is started from a pre-loader */
24 /* Configuration for environment
25 * Environment is embedded in u-boot in the second sector of the flash
28 #define LDS_BOARD_TEXT \
29 . = DEFINED(env_offset) ? env_offset : .; \
30 env/embedded.o(.text);
33 # define CONFIG_IPADDR 192.162.1.2
34 # define CONFIG_NETMASK 255.255.255.0
35 # define CONFIG_SERVERIP 192.162.1.1
36 # define CONFIG_GATEWAYIP 192.162.1.1
37 #endif /* CONFIG_MCFFEC */
39 #define CONFIG_HOSTNAME "M5272C3"
40 #define CONFIG_EXTRA_ENV_SETTINGS \
43 "u-boot=u-boot.bin\0" \
44 "load=tftp ${loadaddr) ${u-boot}\0" \
45 "upd=run load; run prog\0" \
46 "prog=prot off ffe00000 ffe3ffff;" \
47 "era ffe00000 ffe3ffff;" \
48 "cp.b ${loadaddr} ffe00000 ${filesize};"\
52 #define CFG_SYS_CLK 66000000
55 * Low Level Configuration Settings
56 * (address mappings, register initial values, etc.)
57 * You should know what you are doing if you make changes here.
59 #define CFG_SYS_MBAR 0x10000000 /* Register Base Addrs */
60 #define CFG_SYS_SCR 0x0003
61 #define CFG_SYS_SPR 0xffff
63 /*-----------------------------------------------------------------------
64 * Definitions for initial stack pointer and data area (in DPRAM)
66 #define CFG_SYS_INIT_RAM_ADDR 0x20000000
67 #define CFG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */
69 /*-----------------------------------------------------------------------
70 * Start addresses for the final memory configuration
71 * (Set up by the startup code)
72 * Please note that CFG_SYS_SDRAM_BASE _must_ start at 0
74 #define CFG_SYS_SDRAM_BASE 0x00000000
75 #define CFG_SYS_SDRAM_SIZE 4 /* SDRAM size in MB */
76 #define CFG_SYS_FLASH_BASE 0xffe00000
79 * For booting Linux, the board info and command line data
80 * have to be in the first 8 MB of memory, since this is
81 * the maximum mapped by the Linux kernel during initialization ??
83 #define CFG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20))
88 #ifdef CONFIG_SYS_FLASH_CFI
89 # define CFG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */
92 /*-----------------------------------------------------------------------
96 #define ICACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
97 CFG_SYS_INIT_RAM_SIZE - 8)
98 #define DCACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
99 CFG_SYS_INIT_RAM_SIZE - 4)
100 #define CFG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI)
101 #define CFG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \
102 CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \
103 CF_ACR_EN | CF_ACR_SM_ALL)
104 #define CFG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \
105 CF_CACR_DISD | CF_CACR_INVI | \
106 CF_CACR_CEIB | CF_CACR_DCM | \
109 /*-----------------------------------------------------------------------
112 #define CFG_SYS_PACNT 0x00000000
113 #define CFG_SYS_PADDR 0x0000
114 #define CFG_SYS_PADAT 0x0000
115 #define CFG_SYS_PBCNT 0x55554155 /* Ethernet/UART configuration */
116 #define CFG_SYS_PBDDR 0x0000
117 #define CFG_SYS_PBDAT 0x0000
118 #define CFG_SYS_PDCNT 0x00000000
119 #endif /* _M5272C3_H */