include/configs/M5272C3.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Configuation settings for the Motorola MC5272C3 board.
   4  *
   5  * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
   6  */
   7
   8 /*
   9  * board/config.h - configuration options, board specific
  10  */
  11
  12 #ifndef _M5272C3_H
  13 #define _M5272C3_H
  14
  15 /*
  16  * High Level Configuration Options
  17  * (easy to change)
  18  */
  19 #define CONFIG_MCFTMR
  20
  21 #define CONFIG_SYS_UART_PORT            (0)
  22
  23 #define CONFIG_WATCHDOG_TIMEOUT 10000   /* timeout in milliseconds */
  24
  25 #undef CONFIG_MONITOR_IS_IN_RAM /* define if monitor is started from a pre-loader */
  26
  27 /* Configuration for environment
  28  * Environment is embedded in u-boot in the second sector of the flash
  29  */
  30
  31 #define LDS_BOARD_TEXT \
  32         . = DEFINED(env_offset) ? env_offset : .; \
  33         env/embedded.o(.text);
  34
  35 #ifdef CONFIG_MCFFEC
  36 #       define CONFIG_MII_INIT          1
  37 #       define CONFIG_SYS_DISCOVER_PHY
  38 #       define CONFIG_SYS_RX_ETH_BUFFER 8
  39 #       define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
  40 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
  41 #       ifndef CONFIG_SYS_DISCOVER_PHY
  42 #               define FECDUPLEX        FULL
  43 #               define FECSPEED         _100BASET
  44 #       else
  45 #               ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
  46 #                       define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
  47 #               endif
  48 #       endif                   /* CONFIG_SYS_DISCOVER_PHY */
  49 #endif
  50
  51 #ifdef CONFIG_MCFFEC
  52 #       define CONFIG_IPADDR    192.162.1.2
  53 #       define CONFIG_NETMASK   255.255.255.0
  54 #       define CONFIG_SERVERIP  192.162.1.1
  55 #       define CONFIG_GATEWAYIP 192.162.1.1
  56 #endif                          /* CONFIG_MCFFEC */
  57
  58 #define CONFIG_HOSTNAME         "M5272C3"
  59 #define CONFIG_EXTRA_ENV_SETTINGS               \
  60         "netdev=eth0\0"                         \
  61         "loadaddr=10000\0"                      \
  62         "u-boot=u-boot.bin\0"                   \
  63         "load=tftp ${loadaddr) ${u-boot}\0"     \
  64         "upd=run load; run prog\0"              \
  65         "prog=prot off ffe00000 ffe3ffff;"      \
  66         "era ffe00000 ffe3ffff;"                \
  67         "cp.b ${loadaddr} ffe00000 ${filesize};"\
  68         "save\0"                                \
  69         ""
  70
  71 #define CONFIG_SYS_CLK                  66000000
  72
  73 /*
  74  * Low Level Configuration Settings
  75  * (address mappings, register initial values, etc.)
  76  * You should know what you are doing if you make changes here.
  77  */
  78 #define CONFIG_SYS_MBAR         0x10000000      /* Register Base Addrs */
  79 #define CONFIG_SYS_SCR                  0x0003
  80 #define CONFIG_SYS_SPR                  0xffff
  81
  82 /*-----------------------------------------------------------------------
  83  * Definitions for initial stack pointer and data area (in DPRAM)
  84  */
  85 #define CONFIG_SYS_INIT_RAM_ADDR        0x20000000
  86 #define CONFIG_SYS_INIT_RAM_SIZE        0x1000  /* Size of used area in internal SRAM    */
  87 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  88 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
  89
  90 /*-----------------------------------------------------------------------
  91  * Start addresses for the final memory configuration
  92  * (Set up by the startup code)
  93  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
  94  */
  95 #define CONFIG_SYS_SDRAM_BASE           0x00000000
  96 #define CONFIG_SYS_SDRAM_SIZE           4       /* SDRAM size in MB */
  97 #define CONFIG_SYS_FLASH_BASE           0xffe00000
  98
  99 #ifdef  CONFIG_MONITOR_IS_IN_RAM
 100 #define CONFIG_SYS_MONITOR_BASE 0x20000
 101 #else
 102 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
 103 #endif
 104
 105 #define CONFIG_SYS_MONITOR_LEN          0x20000
 106 #define CONFIG_SYS_BOOTPARAMS_LEN       64*1024
 107
 108 /*
 109  * For booting Linux, the board info and command line data
 110  * have to be in the first 8 MB of memory, since this is
 111  * the maximum mapped by the Linux kernel during initialization ??
 112  */
 113 #define CONFIG_SYS_BOOTMAPSZ            (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
 114
 115 /*
 116  * FLASH organization
 117  */
 118 #ifdef CONFIG_SYS_FLASH_CFI
 119 #       define CONFIG_SYS_FLASH_SIZE            0x800000        /* Max size that the board might have */
 120 #       define CONFIG_SYS_FLASH_CFI_WIDTH       FLASH_CFI_16BIT
 121 #       define CONFIG_SYS_MAX_FLASH_SECT        137     /* max number of sectors on one chip */
 122 #endif
 123
 124 /*-----------------------------------------------------------------------
 125  * Cache Configuration
 126  */
 127
 128 #define ICACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
 129                                          CONFIG_SYS_INIT_RAM_SIZE - 8)
 130 #define DCACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
 131                                          CONFIG_SYS_INIT_RAM_SIZE - 4)
 132 #define CONFIG_SYS_ICACHE_INV           (CF_CACR_CINV | CF_CACR_INVI)
 133 #define CONFIG_SYS_CACHE_ACR0           (CONFIG_SYS_SDRAM_BASE | \
 134                                          CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
 135                                          CF_ACR_EN | CF_ACR_SM_ALL)
 136 #define CONFIG_SYS_CACHE_ICACR          (CF_CACR_CENB | CF_CACR_CINV | \
 137                                          CF_CACR_DISD | CF_CACR_INVI | \
 138                                          CF_CACR_CEIB | CF_CACR_DCM | \
 139                                          CF_CACR_EUSP)
 140
 141 /*-----------------------------------------------------------------------
 142  * Port configuration
 143  */
 144 #define CONFIG_SYS_PACNT                0x00000000
 145 #define CONFIG_SYS_PADDR                0x0000
 146 #define CONFIG_SYS_PADAT                0x0000
 147 #define CONFIG_SYS_PBCNT                0x55554155      /* Ethernet/UART configuration */
 148 #define CONFIG_SYS_PBDDR                0x0000
 149 #define CONFIG_SYS_PBDAT                0x0000
 150 #define CONFIG_SYS_PDCNT                0x00000000
 151 #endif                          /* _M5272C3_H */