1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Configuation settings for the Motorola MC5272C3 board.
5 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
9 * board/config.h - configuration options, board specific
16 * High Level Configuration Options
21 #define CONFIG_SYS_UART_PORT (0)
23 #define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */
25 #undef CONFIG_MONITOR_IS_IN_RAM /* define if monitor is started from a pre-loader */
27 /* Configuration for environment
28 * Environment is embedded in u-boot in the second sector of the flash
31 #define LDS_BOARD_TEXT \
32 . = DEFINED(env_offset) ? env_offset : .; \
33 env/embedded.o(.text);
36 # define CONFIG_MII_INIT 1
37 # define CONFIG_SYS_DISCOVER_PHY
38 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
39 # ifndef CONFIG_SYS_DISCOVER_PHY
40 # define FECDUPLEX FULL
41 # define FECSPEED _100BASET
42 # endif /* CONFIG_SYS_DISCOVER_PHY */
46 # define CONFIG_IPADDR 192.162.1.2
47 # define CONFIG_NETMASK 255.255.255.0
48 # define CONFIG_SERVERIP 192.162.1.1
49 # define CONFIG_GATEWAYIP 192.162.1.1
50 #endif /* CONFIG_MCFFEC */
52 #define CONFIG_HOSTNAME "M5272C3"
53 #define CONFIG_EXTRA_ENV_SETTINGS \
56 "u-boot=u-boot.bin\0" \
57 "load=tftp ${loadaddr) ${u-boot}\0" \
58 "upd=run load; run prog\0" \
59 "prog=prot off ffe00000 ffe3ffff;" \
60 "era ffe00000 ffe3ffff;" \
61 "cp.b ${loadaddr} ffe00000 ${filesize};"\
65 #define CONFIG_SYS_CLK 66000000
68 * Low Level Configuration Settings
69 * (address mappings, register initial values, etc.)
70 * You should know what you are doing if you make changes here.
72 #define CONFIG_SYS_MBAR 0x10000000 /* Register Base Addrs */
73 #define CONFIG_SYS_SCR 0x0003
74 #define CONFIG_SYS_SPR 0xffff
76 /*-----------------------------------------------------------------------
77 * Definitions for initial stack pointer and data area (in DPRAM)
79 #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
80 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */
81 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
82 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
84 /*-----------------------------------------------------------------------
85 * Start addresses for the final memory configuration
86 * (Set up by the startup code)
87 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
89 #define CONFIG_SYS_SDRAM_BASE 0x00000000
90 #define CONFIG_SYS_SDRAM_SIZE 4 /* SDRAM size in MB */
91 #define CONFIG_SYS_FLASH_BASE 0xffe00000
93 #ifdef CONFIG_MONITOR_IS_IN_RAM
94 #define CONFIG_SYS_MONITOR_BASE 0x20000
96 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
99 #define CONFIG_SYS_MONITOR_LEN 0x20000
100 #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
103 * For booting Linux, the board info and command line data
104 * have to be in the first 8 MB of memory, since this is
105 * the maximum mapped by the Linux kernel during initialization ??
107 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
112 #ifdef CONFIG_SYS_FLASH_CFI
113 # define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */
114 # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
115 # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */
118 /*-----------------------------------------------------------------------
119 * Cache Configuration
122 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
123 CONFIG_SYS_INIT_RAM_SIZE - 8)
124 #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
125 CONFIG_SYS_INIT_RAM_SIZE - 4)
126 #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI)
127 #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
128 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
129 CF_ACR_EN | CF_ACR_SM_ALL)
130 #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \
131 CF_CACR_DISD | CF_CACR_INVI | \
132 CF_CACR_CEIB | CF_CACR_DCM | \
135 /*-----------------------------------------------------------------------
138 #define CONFIG_SYS_PACNT 0x00000000
139 #define CONFIG_SYS_PADDR 0x0000
140 #define CONFIG_SYS_PADAT 0x0000
141 #define CONFIG_SYS_PBCNT 0x55554155 /* Ethernet/UART configuration */
142 #define CONFIG_SYS_PBDDR 0x0000
143 #define CONFIG_SYS_PBDAT 0x0000
144 #define CONFIG_SYS_PDCNT 0x00000000
145 #endif /* _M5272C3_H */