2 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
3 * Hayden Fraser (Hayden.Fraser@freescale.com)
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 #define CONFIG_MCF52x2 /* define processor family */
28 #define CONFIG_M5253 /* define processor type */
29 #define CONFIG_M5253EVBE /* define board type */
33 #define CONFIG_MCFUART
34 #define CONFIG_SYS_UART_PORT (0)
35 #define CONFIG_BAUDRATE 115200
36 #define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
38 #undef CONFIG_WATCHDOG /* disable watchdog */
40 #define CONFIG_BOOTDELAY 5
42 /* Configuration for environment
43 * Environment is embedded in u-boot in the second sector of the flash
45 #ifndef CONFIG_MONITOR_IS_IN_RAM
46 #define CONFIG_ENV_OFFSET 0x4000
47 #define CONFIG_ENV_SECT_SIZE 0x2000
48 #define CONFIG_ENV_IS_IN_FLASH 1
50 #define CONFIG_ENV_ADDR 0xffe04000
51 #define CONFIG_ENV_SECT_SIZE 0x2000
52 #define CONFIG_ENV_IS_IN_FLASH 1
58 #undef CONFIG_BOOTP_BOOTFILESIZE
59 #undef CONFIG_BOOTP_BOOTPATH
60 #undef CONFIG_BOOTP_GATEWAY
61 #undef CONFIG_BOOTP_HOSTNAME
64 * Command line configuration.
66 #include <config_cmd_default.h>
68 #define CONFIG_CMD_LOADB
69 #define CONFIG_CMD_LOADS
70 #define CONFIG_CMD_EXT2
71 #define CONFIG_CMD_FAT
72 #define CONFIG_CMD_IDE
73 #define CONFIG_CMD_MEMORY
74 #define CONFIG_CMD_MISC
77 #define CONFIG_DOS_PARTITION
78 #define CONFIG_MAC_PARTITION
79 #define CONFIG_IDE_RESET 1
80 #define CONFIG_IDE_PREINIT 1
84 #define CONFIG_SYS_IDE_MAXBUS 1
85 #define CONFIG_SYS_IDE_MAXDEVICE 2
87 #define CONFIG_SYS_ATA_BASE_ADDR (CONFIG_SYS_MBAR2 + 0x800)
88 #define CONFIG_SYS_ATA_IDE0_OFFSET 0
90 #define CONFIG_SYS_ATA_DATA_OFFSET 0xA0 /* Offset for data I/O */
91 #define CONFIG_SYS_ATA_REG_OFFSET 0xA0 /* Offset for normal register accesses */
92 #define CONFIG_SYS_ATA_ALT_OFFSET 0xC0 /* Offset for alternate registers */
93 #define CONFIG_SYS_ATA_STRIDE 4 /* Interval between registers */
95 #define CONFIG_SYS_PROMPT "=> "
96 #define CONFIG_SYS_LONGHELP /* undef to save memory */
98 #if defined(CONFIG_CMD_KGDB)
99 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
101 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
103 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
104 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
105 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
107 #define CONFIG_SYS_LOAD_ADDR 0x00100000
109 #define CONFIG_SYS_MEMTEST_START 0x400
110 #define CONFIG_SYS_MEMTEST_END 0x380000
112 #define CONFIG_SYS_HZ 1000
114 #undef CONFIG_SYS_PLL_BYPASS /* bypass PLL for test purpose */
115 #define CONFIG_SYS_FAST_CLK
116 #ifdef CONFIG_SYS_FAST_CLK
117 # define CONFIG_SYS_PLLCR 0x1243E054
118 # define CONFIG_SYS_CLK 140000000
120 # define CONFIG_SYS_PLLCR 0x135a4140
121 # define CONFIG_SYS_CLK 70000000
125 * Low Level Configuration Settings
126 * (address mappings, register initial values, etc.)
127 * You should know what you are doing if you make changes here.
130 #define CONFIG_SYS_MBAR 0x10000000 /* Register Base Addrs */
131 #define CONFIG_SYS_MBAR2 0x80000000 /* Module Base Addrs 2 */
134 * Definitions for initial stack pointer and data area (in DPRAM)
136 #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
137 #define CONFIG_SYS_INIT_RAM_END 0x10000 /* End of used area in internal SRAM */
138 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
139 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
140 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
143 * Start addresses for the final memory configuration
144 * (Set up by the startup code)
145 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
147 #define CONFIG_SYS_SDRAM_BASE 0x00000000
148 #define CONFIG_SYS_SDRAM_SIZE 8 /* SDRAM size in MB */
150 #ifdef CONFIG_MONITOR_IS_IN_RAM
151 #define CONFIG_SYS_MONITOR_BASE 0x20000
153 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
156 #define CONFIG_SYS_MONITOR_LEN 0x40000
157 #define CONFIG_SYS_MALLOC_LEN (256 << 10)
158 #define CONFIG_SYS_BOOTPARAMS_LEN (64*1024)
161 * For booting Linux, the board info and command line data
162 * have to be in the first 8 MB of memory, since this is
163 * the maximum mapped by the Linux kernel during initialization ??
165 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
166 #define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
168 /* FLASH organization */
169 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
170 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
171 #define CONFIG_SYS_MAX_FLASH_SECT 35 /* max number of sectors on one chip */
172 #define CONFIG_SYS_FLASH_ERASE_TOUT 1000
174 #define CONFIG_SYS_FLASH_CFI 1
175 #define CONFIG_FLASH_CFI_DRIVER 1
176 #define CONFIG_SYS_FLASH_SIZE 0x200000
177 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
179 /* Cache Configuration */
180 #define CONFIG_SYS_CACHELINE_SIZE 16
182 /* Port configuration */
183 #define CONFIG_SYS_FECI2C 0xF0
185 #define CONFIG_SYS_CS0_BASE 0xFFE00000
186 #define CONFIG_SYS_CS0_MASK 0x001F0021
187 #define CONFIG_SYS_CS0_CTRL 0x00001D80
189 /*-----------------------------------------------------------------------
192 #define CONFIG_SYS_GPIO_FUNC 0x00000008 /* Set gpio pins: none */
193 #define CONFIG_SYS_GPIO1_FUNC 0x00df00f0 /* 36-39(SWITCH),48-52(FPGAs),54 */
194 #define CONFIG_SYS_GPIO_EN 0x00000008 /* Set gpio output enable */
195 #define CONFIG_SYS_GPIO1_EN 0x00c70000 /* Set gpio output enable */
196 #define CONFIG_SYS_GPIO_OUT 0x00000008 /* Set outputs to default state */
197 #define CONFIG_SYS_GPIO1_OUT 0x00c70000 /* Set outputs to default state */
198 #define CONFIG_SYS_GPIO1_LED 0x00400000 /* user led */
200 #endif /* _M5253EVB_H */