2 * Configuation settings for the Freescale MCF52277 EVB board.
4 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
5 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 * board/config.h - configuration options, board specific
34 * High Level Configuration Options
37 #define CONFIG_MCF5227x /* define processor family */
38 #define CONFIG_M52277 /* define processor type */
39 #define CONFIG_M52277EVB /* M52277EVB board */
41 #define CONFIG_MCFUART
42 #define CONFIG_SYS_UART_PORT (0)
43 #define CONFIG_BAUDRATE 115200
44 #define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
46 #undef CONFIG_WATCHDOG
48 #define CONFIG_TIMESTAMP /* Print image info with timestamp */
53 #define CONFIG_BOOTP_BOOTFILESIZE
54 #define CONFIG_BOOTP_BOOTPATH
55 #define CONFIG_BOOTP_GATEWAY
56 #define CONFIG_BOOTP_HOSTNAME
58 /* Command line configuration */
59 #include <config_cmd_default.h>
61 #define CONFIG_CMD_CACHE
62 #define CONFIG_CMD_DATE
63 #define CONFIG_CMD_ELF
64 #define CONFIG_CMD_FLASH
65 #define CONFIG_CMD_I2C
66 #define CONFIG_CMD_JFFS2
67 #define CONFIG_CMD_LOADB
68 #define CONFIG_CMD_LOADS
69 #define CONFIG_CMD_MEMORY
70 #define CONFIG_CMD_MISC
73 #define CONFIG_CMD_REGINFO
76 #define CONFIG_CMD_SPI
79 #define CONFIG_HOSTNAME M52277EVB
80 #define CONFIG_SYS_UBOOT_END 0x3FFFF
81 #define CONFIG_SYS_LOAD_ADDR2 0x40010007
82 #ifdef CONFIG_SYS_STMICRO_BOOT
83 /* ST Micro serial flash */
84 #define CONFIG_EXTRA_ENV_SETTINGS \
85 "inpclk=" MK_STR(CONFIG_SYS_INPUT_CLKSRC) "\0" \
86 "loadaddr=0x40010000\0" \
87 "uboot=u-boot.bin\0" \
88 "load=loadb ${loadaddr} ${baudrate};" \
89 "loadb " MK_STR(CONFIG_SYS_LOAD_ADDR2) " ${baudrate} \0" \
90 "upd=run load; run prog\0" \
91 "prog=sf probe 0:2 10000 1;" \
93 "sf write ${loadaddr} 0 30000;" \
97 #ifdef CONFIG_SYS_SPANSION_BOOT
98 #define CONFIG_EXTRA_ENV_SETTINGS \
99 "inpclk=" MK_STR(CONFIG_SYS_INPUT_CLKSRC) "\0" \
100 "loadaddr=0x40010000\0" \
101 "uboot=u-boot.bin\0" \
102 "load=loadb ${loadaddr} ${baudrate}\0" \
103 "upd=run load; run prog\0" \
104 "prog=prot off " MK_STR(CONFIG_SYS_FLASH_BASE) \
105 " " MK_STR(CONFIG_SYS_UBOOT_END) ";" \
106 "era " MK_STR(CONFIG_SYS_FLASH_BASE) " " \
107 MK_STR(CONFIG_SYS_UBOOT_END) ";" \
108 "cp.b ${loadaddr} " MK_STR(CONFIG_SYS_FLASH_BASE) \
109 " ${filesize}; save\0" \
110 "updsbf=run loadsbf; run progsbf\0" \
111 "loadsbf=loadb ${loadaddr} ${baudrate};" \
112 "loadb " MK_STR(CONFIG_SYS_LOAD_ADDR2) " ${baudrate} \0" \
113 "progsbf=sf probe 0:2 10000 1;" \
114 "sf erase 0 30000;" \
115 "sf write ${loadaddr} 0 30000;" \
119 #define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */
121 #ifdef CONFIG_CMD_BMP
123 #define CONFIG_SPLASH_SCREEN
124 #define CONFIG_LCD_LOGO
125 #define CONFIG_SHARP_LQ035Q7DH06
129 #ifdef CONFIG_CMD_USB
130 #define CONFIG_USB_EHCI
131 #define CONFIG_USB_STORAGE
132 #define CONFIG_DOS_PARTITION
133 #define CONFIG_MAC_PARTITION
134 #define CONFIG_ISO_PARTITION
135 #define CONFIG_SYS_USB_EHCI_REGS_BASE 0xFC0B0000
136 #define CONFIG_SYS_USB_EHCI_CPU_INIT
140 #define CONFIG_MCFRTC
142 #define CONFIG_SYS_RTC_OSCILLATOR (32 * CONFIG_SYS_HZ)
145 #define CONFIG_MCFTMR
149 #define CONFIG_FSL_I2C
150 #define CONFIG_HARD_I2C /* I2C with hardware support */
151 #undef CONFIG_SOFT_I2C /* I2C bit-banged */
152 #define CONFIG_SYS_I2C_SPEED 80000 /* I2C speed and slave address */
153 #define CONFIG_SYS_I2C_SLAVE 0x7F
154 #define CONFIG_SYS_I2C_OFFSET 0x58000
155 #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
157 /* DSPI and Serial Flash */
158 #define CONFIG_CF_SPI
159 #define CONFIG_CF_DSPI
160 #define CONFIG_HARD_SPI
161 #define CONFIG_SYS_SBFHDR_SIZE 0x7
162 #ifdef CONFIG_CMD_SPI
163 # define CONFIG_SYS_DSPI_CS2
164 # define CONFIG_SPI_FLASH
165 # define CONFIG_SPI_FLASH_STMICRO
167 # define CONFIG_SYS_DSPI_CTAR0 (DSPI_CTAR_TRSZ(7) | \
168 DSPI_CTAR_PCSSCK_1CLK | \
169 DSPI_CTAR_PASC(0) | \
171 DSPI_CTAR_CSSCK(0) | \
176 /* Input, PCI, Flexbus, and VCO */
177 #define CONFIG_EXTRA_CLOCK
179 #define CONFIG_SYS_INPUT_CLKSRC 16000000
181 #define CONFIG_PRAM 2048 /* 2048 KB */
183 #define CONFIG_SYS_PROMPT "-> "
184 #define CONFIG_SYS_LONGHELP /* undef to save memory */
186 #if defined(CONFIG_CMD_KGDB)
187 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
189 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
191 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
192 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
193 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
195 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x10000)
197 #define CONFIG_SYS_HZ 1000
199 #define CONFIG_SYS_MBAR 0xFC000000
202 * Low Level Configuration Settings
203 * (address mappings, register initial values, etc.)
204 * You should know what you are doing if you make changes here.
208 * Definitions for initial stack pointer and data area (in DPRAM)
210 #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000
211 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* Size of used area in internal SRAM */
212 #define CONFIG_SYS_INIT_RAM_CTRL 0x221
213 #define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - 32)
214 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 32)
215 #define CONFIG_SYS_SBFHDR_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - 32)
218 * Start addresses for the final memory configuration
219 * (Set up by the startup code)
220 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
222 #define CONFIG_SYS_SDRAM_BASE 0x40000000
223 #define CONFIG_SYS_SDRAM_SIZE 64 /* SDRAM size in MB */
224 #define CONFIG_SYS_SDRAM_CFG1 0x43711630
225 #define CONFIG_SYS_SDRAM_CFG2 0x56670000
226 #define CONFIG_SYS_SDRAM_CTRL 0xE1092000
227 #define CONFIG_SYS_SDRAM_EMOD 0x81810000
228 #define CONFIG_SYS_SDRAM_MODE 0x00CD0000
229 #define CONFIG_SYS_SDRAM_DRV_STRENGTH 0x00
231 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400
232 #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
235 # define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)
237 # define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
239 #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
240 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
241 #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
243 /* Initial Memory map for Linux */
244 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
245 #define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
248 * Configuration for environment
249 * Environment is not embedded in u-boot. First time runing may have env
250 * crc error warning if there is no correct environment on the flash.
253 # define CONFIG_ENV_IS_IN_SPI_FLASH
254 # define CONFIG_ENV_SPI_CS 2
256 # define CONFIG_ENV_IS_IN_FLASH 1
258 #define CONFIG_ENV_OVERWRITE 1
260 /*-----------------------------------------------------------------------
263 #ifdef CONFIG_SYS_STMICRO_BOOT
264 # define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
265 # define CONFIG_SYS_FLASH0_BASE CONFIG_SYS_CS0_BASE
266 # define CONFIG_ENV_OFFSET 0x30000
267 # define CONFIG_ENV_SIZE 0x1000
268 # define CONFIG_ENV_SECT_SIZE 0x10000
270 #ifdef CONFIG_SYS_SPANSION_BOOT
271 # define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
272 # define CONFIG_SYS_FLASH0_BASE CONFIG_SYS_CS0_BASE
273 # define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x40000)
274 # define CONFIG_ENV_SIZE 0x1000
275 # define CONFIG_ENV_SECT_SIZE 0x8000
278 #define CONFIG_SYS_FLASH_CFI
279 #ifdef CONFIG_SYS_FLASH_CFI
280 # define CONFIG_FLASH_CFI_DRIVER 1
281 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
282 # define CONFIG_FLASH_SPANSION_S29WS_N 1
283 # define CONFIG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */
284 # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
285 # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
286 # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */
287 # define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
288 # define CONFIG_SYS_FLASH_CHECKSUM
289 # define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_CS0_BASE }
293 * This is setting for JFFS2 support in u-boot.
294 * NOTE: Enable CONFIG_CMD_JFFS2 for JFFS2 support.
296 #ifdef CONFIG_CMD_JFFS2
297 # define CONFIG_JFFS2_DEV "nor0"
298 # define CONFIG_JFFS2_PART_SIZE (0x01000000 - 0x40000)
299 # define CONFIG_JFFS2_PART_OFFSET (CONFIG_SYS_FLASH0_BASE + 0x40000)
302 /*-----------------------------------------------------------------------
303 * Cache Configuration
305 #define CONFIG_SYS_CACHELINE_SIZE 16
307 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
308 CONFIG_SYS_INIT_RAM_SIZE - 8)
309 #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
310 CONFIG_SYS_INIT_RAM_SIZE - 4)
311 #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI)
312 #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
313 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
314 CF_ACR_EN | CF_ACR_SM_ALL)
315 #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \
316 CF_CACR_DISD | CF_CACR_INVI | \
317 CF_CACR_CEIB | CF_CACR_DCM | \
320 /*-----------------------------------------------------------------------
321 * Memory bank definitions
333 #define CONFIG_SYS_CS0_BASE 0x04000000
334 #define CONFIG_SYS_CS0_MASK 0x00FF0001
335 #define CONFIG_SYS_CS0_CTRL 0x00001FA0
337 #define CONFIG_SYS_CS0_BASE 0x00000000
338 #define CONFIG_SYS_CS0_MASK 0x00FF0001
339 #define CONFIG_SYS_CS0_CTRL 0x00001FA0
342 #endif /* _M52277EVB_H */