include/configs/M52277EVB.h

   1 /*
   2  * Configuation settings for the Freescale MCF52277 EVB board.
   3  *
   4  * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
   5  * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 /*
  11  * board/config.h - configuration options, board specific
  12  */
  13
  14 #ifndef _M52277EVB_H
  15 #define _M52277EVB_H
  16
  17 /*
  18  * High Level Configuration Options
  19  * (easy to change)
  20  */
  21 #define CONFIG_M52277EVB        /* M52277EVB board */
  22
  23 #define CONFIG_MCFUART
  24 #define CONFIG_SYS_UART_PORT            (0)
  25 #define CONFIG_BAUDRATE                 115200
  26
  27 #undef CONFIG_WATCHDOG
  28
  29 #define CONFIG_TIMESTAMP        /* Print image info with timestamp */
  30
  31 /*
  32  * BOOTP options
  33  */
  34 #define CONFIG_BOOTP_BOOTFILESIZE
  35 #define CONFIG_BOOTP_BOOTPATH
  36 #define CONFIG_BOOTP_GATEWAY
  37 #define CONFIG_BOOTP_HOSTNAME
  38
  39 /* Command line configuration */
  40 #define CONFIG_CMD_DATE
  41 #define CONFIG_CMD_JFFS2
  42 #define CONFIG_CMD_REGINFO
  43 #undef CONFIG_CMD_BMP
  44
  45 #define CONFIG_HOSTNAME                 M52277EVB
  46 #define CONFIG_SYS_UBOOT_END            0x3FFFF
  47 #define CONFIG_SYS_LOAD_ADDR2           0x40010007
  48 #ifdef CONFIG_SYS_STMICRO_BOOT
  49 /* ST Micro serial flash */
  50 #define CONFIG_EXTRA_ENV_SETTINGS               \
  51         "inpclk=" __stringify(CONFIG_SYS_INPUT_CLKSRC) "\0"     \
  52         "loadaddr=0x40010000\0"                 \
  53         "uboot=u-boot.bin\0"                    \
  54         "load=loadb ${loadaddr} ${baudrate};"   \
  55         "loadb " __stringify(CONFIG_SYS_LOAD_ADDR2) " ${baudrate} \0"   \
  56         "upd=run load; run prog\0"              \
  57         "prog=sf probe 0:2 10000 1;"            \
  58         "sf erase 0 30000;"                     \
  59         "sf write ${loadaddr} 0 30000;"         \
  60         "save\0"                                \
  61         ""
  62 #endif
  63 #ifdef CONFIG_SYS_SPANSION_BOOT
  64 #define CONFIG_EXTRA_ENV_SETTINGS               \
  65         "inpclk=" __stringify(CONFIG_SYS_INPUT_CLKSRC) "\0"     \
  66         "loadaddr=0x40010000\0"                 \
  67         "uboot=u-boot.bin\0"                    \
  68         "load=loadb ${loadaddr} ${baudrate}\0"  \
  69         "upd=run load; run prog\0"              \
  70         "prog=prot off " __stringify(CONFIG_SYS_FLASH_BASE)     \
  71         " " __stringify(CONFIG_SYS_UBOOT_END) ";"               \
  72         "era " __stringify(CONFIG_SYS_FLASH_BASE) " "           \
  73         __stringify(CONFIG_SYS_UBOOT_END) ";"                   \
  74         "cp.b ${loadaddr} " __stringify(CONFIG_SYS_FLASH_BASE)  \
  75         " ${filesize}; save\0"                  \
  76         "updsbf=run loadsbf; run progsbf\0"     \
  77         "loadsbf=loadb ${loadaddr} ${baudrate};"        \
  78         "loadb " __stringify(CONFIG_SYS_LOAD_ADDR2) " ${baudrate} \0"   \
  79         "progsbf=sf probe 0:2 10000 1;"         \
  80         "sf erase 0 30000;"                     \
  81         "sf write ${loadaddr} 0 30000;"         \
  82         ""
  83 #endif
  84
  85 /* LCD */
  86 #ifdef CONFIG_CMD_BMP
  87 #define CONFIG_SPLASH_SCREEN
  88 #define CONFIG_LCD_LOGO
  89 #define CONFIG_SHARP_LQ035Q7DH06
  90 #endif
  91
  92 /* USB */
  93 #ifdef CONFIG_CMD_USB
  94 #define CONFIG_USB_EHCI
  95 #define CONFIG_SYS_USB_EHCI_REGS_BASE   0xFC0B0000
  96 #define CONFIG_SYS_USB_EHCI_CPU_INIT
  97 #endif
  98
  99 /* Realtime clock */
 100 #define CONFIG_MCFRTC
 101 #undef RTC_DEBUG
 102 #define CONFIG_SYS_RTC_OSCILLATOR       (32 * CONFIG_SYS_HZ)
 103
 104 /* Timer */
 105 #define CONFIG_MCFTMR
 106 #undef CONFIG_MCFPIT
 107
 108 /* I2c */
 109 #define CONFIG_SYS_I2C
 110 #define CONFIG_SYS_I2C_FSL
 111 #define CONFIG_SYS_FSL_I2C_SPEED        80000
 112 #define CONFIG_SYS_FSL_I2C_SLAVE        0x7F
 113 #define CONFIG_SYS_FSL_I2C_OFFSET       0x58000
 114 #define CONFIG_SYS_IMMR                 CONFIG_SYS_MBAR
 115
 116 /* DSPI and Serial Flash */
 117 #define CONFIG_CF_SPI
 118 #define CONFIG_CF_DSPI
 119 #define CONFIG_HARD_SPI
 120 #define CONFIG_SYS_SBFHDR_SIZE          0x7
 121 #ifdef CONFIG_CMD_SPI
 122 #       define CONFIG_SYS_DSPI_CS2
 123
 124 #       define CONFIG_SYS_DSPI_CTAR0    (DSPI_CTAR_TRSZ(7) | \
 125                                          DSPI_CTAR_PCSSCK_1CLK | \
 126                                          DSPI_CTAR_PASC(0) | \
 127                                          DSPI_CTAR_PDT(0) | \
 128                                          DSPI_CTAR_CSSCK(0) | \
 129                                          DSPI_CTAR_ASC(0) | \
 130                                          DSPI_CTAR_DT(1))
 131 #endif
 132
 133 /* Input, PCI, Flexbus, and VCO */
 134 #define CONFIG_EXTRA_CLOCK
 135
 136 #define CONFIG_SYS_INPUT_CLKSRC 16000000
 137
 138 #define CONFIG_PRAM             2048    /* 2048 KB */
 139
 140 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 141
 142 #if defined(CONFIG_CMD_KGDB)
 143 #define CONFIG_SYS_CBSIZE       1024    /* Console I/O Buffer Size */
 144 #else
 145 #define CONFIG_SYS_CBSIZE       256     /* Console I/O Buffer Size */
 146 #endif
 147 #define CONFIG_SYS_PBSIZE       (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)        /* Print Buffer Size */
 148 #define CONFIG_SYS_MAXARGS      16      /* max number of command args */
 149 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size    */
 150
 151 #define CONFIG_SYS_LOAD_ADDR    (CONFIG_SYS_SDRAM_BASE + 0x10000)
 152
 153 #define CONFIG_SYS_MBAR         0xFC000000
 154
 155 /*
 156  * Low Level Configuration Settings
 157  * (address mappings, register initial values, etc.)
 158  * You should know what you are doing if you make changes here.
 159  */
 160
 161 /*
 162  * Definitions for initial stack pointer and data area (in DPRAM)
 163  */
 164 #define CONFIG_SYS_INIT_RAM_ADDR        0x80000000
 165 #define CONFIG_SYS_INIT_RAM_SIZE                0x8000  /* Size of used area in internal SRAM */
 166 #define CONFIG_SYS_INIT_RAM_CTRL        0x221
 167 #define CONFIG_SYS_GBL_DATA_OFFSET      ((CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - 32)
 168 #define CONFIG_SYS_INIT_SP_OFFSET       (CONFIG_SYS_GBL_DATA_OFFSET - 32)
 169 #define CONFIG_SYS_SBFHDR_DATA_OFFSET   (CONFIG_SYS_INIT_RAM_SIZE - 32)
 170
 171 /*
 172  * Start addresses for the final memory configuration
 173  * (Set up by the startup code)
 174  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
 175  */
 176 #define CONFIG_SYS_SDRAM_BASE           0x40000000
 177 #define CONFIG_SYS_SDRAM_SIZE           64      /* SDRAM size in MB */
 178 #define CONFIG_SYS_SDRAM_CFG1           0x43711630
 179 #define CONFIG_SYS_SDRAM_CFG2           0x56670000
 180 #define CONFIG_SYS_SDRAM_CTRL           0xE1092000
 181 #define CONFIG_SYS_SDRAM_EMOD           0x81810000
 182 #define CONFIG_SYS_SDRAM_MODE           0x00CD0000
 183 #define CONFIG_SYS_SDRAM_DRV_STRENGTH   0x00
 184
 185 #define CONFIG_SYS_MEMTEST_START        CONFIG_SYS_SDRAM_BASE + 0x400
 186 #define CONFIG_SYS_MEMTEST_END          ((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
 187
 188 #ifdef CONFIG_CF_SBF
 189 #       define CONFIG_SYS_MONITOR_BASE  (CONFIG_SYS_TEXT_BASE + 0x400)
 190 #else
 191 #       define CONFIG_SYS_MONITOR_BASE  (CONFIG_SYS_FLASH_BASE + 0x400)
 192 #endif
 193 #define CONFIG_SYS_BOOTPARAMS_LEN       64*1024
 194 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 256 kB for Monitor */
 195 #define CONFIG_SYS_MALLOC_LEN           (128 << 10)     /* Reserve 128 kB for malloc() */
 196
 197 /* Initial Memory map for Linux */
 198 #define CONFIG_SYS_BOOTMAPSZ            (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
 199 #define CONFIG_SYS_BOOTM_LEN            (CONFIG_SYS_SDRAM_SIZE << 20)
 200
 201 /*
 202  * Configuration for environment
 203  * Environment is not embedded in u-boot. First time runing may have env
 204  * crc error warning if there is no correct environment on the flash.
 205  */
 206 #ifdef CONFIG_CF_SBF
 207 #       define CONFIG_ENV_IS_IN_SPI_FLASH
 208 #       define CONFIG_ENV_SPI_CS        2
 209 #else
 210 #       define CONFIG_ENV_IS_IN_FLASH   1
 211 #endif
 212 #define CONFIG_ENV_OVERWRITE            1
 213
 214 /*-----------------------------------------------------------------------
 215  * FLASH organization
 216  */
 217 #ifdef CONFIG_SYS_STMICRO_BOOT
 218 #       define CONFIG_SYS_FLASH_BASE    CONFIG_SYS_CS0_BASE
 219 #       define CONFIG_SYS_FLASH0_BASE   CONFIG_SYS_CS0_BASE
 220 #       define CONFIG_ENV_OFFSET        0x30000
 221 #       define CONFIG_ENV_SIZE          0x1000
 222 #       define CONFIG_ENV_SECT_SIZE     0x10000
 223 #endif
 224 #ifdef CONFIG_SYS_SPANSION_BOOT
 225 #       define CONFIG_SYS_FLASH_BASE    CONFIG_SYS_CS0_BASE
 226 #       define CONFIG_SYS_FLASH0_BASE   CONFIG_SYS_CS0_BASE
 227 #       define CONFIG_ENV_ADDR          (CONFIG_SYS_FLASH_BASE + 0x40000)
 228 #       define CONFIG_ENV_SIZE          0x1000
 229 #       define CONFIG_ENV_SECT_SIZE     0x8000
 230 #endif
 231
 232 #define CONFIG_SYS_FLASH_CFI
 233 #ifdef CONFIG_SYS_FLASH_CFI
 234 #       define CONFIG_FLASH_CFI_DRIVER  1
 235 #       define CONFIG_SYS_FLASH_USE_BUFFER_WRITE        1
 236 #       define CONFIG_FLASH_SPANSION_S29WS_N    1
 237 #       define CONFIG_SYS_FLASH_SIZE            0x1000000       /* Max size that the board might have */
 238 #       define CONFIG_SYS_FLASH_CFI_WIDTH       FLASH_CFI_16BIT
 239 #       define CONFIG_SYS_MAX_FLASH_BANKS       1       /* max number of memory banks */
 240 #       define CONFIG_SYS_MAX_FLASH_SECT        137     /* max number of sectors on one chip */
 241 #       define CONFIG_SYS_FLASH_PROTECTION      /* "Real" (hardware) sectors protection */
 242 #       define CONFIG_SYS_FLASH_CHECKSUM
 243 #       define CONFIG_SYS_FLASH_BANKS_LIST      { CONFIG_SYS_CS0_BASE }
 244 #endif
 245
 246 #define LDS_BOARD_TEXT \
 247         arch/m68k/cpu/mcf5227x/built-in.o   (.text*) \
 248         arch/m68k/lib/built-in.o            (.text*)
 249
 250 /*
 251  * This is setting for JFFS2 support in u-boot.
 252  * NOTE: Enable CONFIG_CMD_JFFS2 for JFFS2 support.
 253  */
 254 #ifdef CONFIG_CMD_JFFS2
 255 #       define CONFIG_JFFS2_DEV         "nor0"
 256 #       define CONFIG_JFFS2_PART_SIZE   (0x01000000 - 0x40000)
 257 #       define CONFIG_JFFS2_PART_OFFSET (CONFIG_SYS_FLASH0_BASE + 0x40000)
 258 #endif
 259
 260 /*-----------------------------------------------------------------------
 261  * Cache Configuration
 262  */
 263 #define CONFIG_SYS_CACHELINE_SIZE       16
 264
 265 #define ICACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
 266                                          CONFIG_SYS_INIT_RAM_SIZE - 8)
 267 #define DCACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
 268                                          CONFIG_SYS_INIT_RAM_SIZE - 4)
 269 #define CONFIG_SYS_ICACHE_INV           (CF_CACR_CINV | CF_CACR_INVI)
 270 #define CONFIG_SYS_CACHE_ACR0           (CONFIG_SYS_SDRAM_BASE | \
 271                                          CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
 272                                          CF_ACR_EN | CF_ACR_SM_ALL)
 273 #define CONFIG_SYS_CACHE_ICACR          (CF_CACR_CENB | CF_CACR_CINV | \
 274                                          CF_CACR_DISD | CF_CACR_INVI | \
 275                                          CF_CACR_CEIB | CF_CACR_DCM | \
 276                                          CF_CACR_EUSP)
 277
 278 /*-----------------------------------------------------------------------
 279  * Memory bank definitions
 280  */
 281 /*
 282  * CS0 - NOR Flash
 283  * CS1 - Available
 284  * CS2 - Available
 285  * CS3 - Available
 286  * CS4 - Available
 287  * CS5 - Available
 288  */
 289
 290 #ifdef CONFIG_CF_SBF
 291 #define CONFIG_SYS_CS0_BASE             0x04000000
 292 #define CONFIG_SYS_CS0_MASK             0x00FF0001
 293 #define CONFIG_SYS_CS0_CTRL             0x00001FA0
 294 #else
 295 #define CONFIG_SYS_CS0_BASE             0x00000000
 296 #define CONFIG_SYS_CS0_MASK             0x00FF0001
 297 #define CONFIG_SYS_CS0_CTRL             0x00001FA0
 298 #endif
 299
 300 #endif                          /* _M52277EVB_H */