Merge tag 'dm-pull-18mar22' of https://source.denx.de/u-boot/custodians/u-boot-dm...
[platform/kernel/u-boot.git] / include / configs / M5208EVBE.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Configuation settings for the Freescale MCF5208EVBe.
4  *
5  * Copyright (C) 2004-2008 Freescale Semiconductor, Inc.
6  * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
7  */
8
9 #ifndef _M5208EVBE_H
10 #define _M5208EVBE_H
11
12 /*
13  * High Level Configuration Options
14  * (easy to change)
15  */
16 #define CONFIG_SYS_UART_PORT            (0)
17
18 #define CONFIG_WATCHDOG_TIMEOUT         5000
19
20 #ifdef CONFIG_MCFFEC
21 #       define CONFIG_MII_INIT          1
22 #       define CONFIG_SYS_DISCOVER_PHY
23 #       define CONFIG_SYS_RX_ETH_BUFFER 8
24 #       define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
25 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
26 #       ifndef CONFIG_SYS_DISCOVER_PHY
27 #               define FECDUPLEX        FULL
28 #               define FECSPEED         _100BASET
29 #       else
30 #               ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
31 #                       define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
32 #               endif
33 #       endif                   /* CONFIG_SYS_DISCOVER_PHY */
34 #endif
35
36 /* Timer */
37 #define CONFIG_MCFTMR
38
39 /* I2C */
40
41 #ifdef CONFIG_MCFFEC
42 #       define CONFIG_IPADDR    192.162.1.2
43 #       define CONFIG_NETMASK   255.255.255.0
44 #       define CONFIG_SERVERIP  192.162.1.1
45 #       define CONFIG_GATEWAYIP 192.162.1.1
46 #endif                          /* CONFIG_MCFFEC */
47
48 #define CONFIG_HOSTNAME         "M5208EVBe"
49 #define CONFIG_EXTRA_ENV_SETTINGS               \
50         "netdev=eth0\0"                         \
51         "loadaddr=40010000\0"                   \
52         "u-boot=u-boot.bin\0"                   \
53         "load=tftp ${loadaddr) ${u-boot}\0"     \
54         "upd=run load; run prog\0"              \
55         "prog=prot off 0 3ffff;"                \
56         "era 0 3ffff;"                          \
57         "cp.b ${loadaddr} 0 ${filesize};"       \
58         "save\0"                                \
59         ""
60
61 #define CONFIG_PRAM             512     /* 512 KB */
62
63 #define CONFIG_SYS_CLK          166666666       /* CPU Core Clock */
64 #define CONFIG_SYS_PLL_ODR      0x36
65 #define CONFIG_SYS_PLL_FDR      0x7D
66
67 #define CONFIG_SYS_MBAR         0xFC000000
68
69 /*
70  * Low Level Configuration Settings
71  * (address mappings, register initial values, etc.)
72  * You should know what you are doing if you make changes here.
73  */
74 /* Definitions for initial stack pointer and data area (in DPRAM) */
75 #define CONFIG_SYS_INIT_RAM_ADDR        0x80000000
76 #define CONFIG_SYS_INIT_RAM_SIZE                0x4000  /* Size of used area in internal SRAM */
77 #define CONFIG_SYS_INIT_RAM_CTRL        0x221
78 #define CONFIG_SYS_GBL_DATA_OFFSET      ((CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - 0x10)
79 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
80
81 /*
82  * Start addresses for the final memory configuration
83  * (Set up by the startup code)
84  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
85  */
86 #define CONFIG_SYS_SDRAM_BASE           0x40000000
87 #define CONFIG_SYS_SDRAM_SIZE           32      /* SDRAM size in MB */
88 #define CONFIG_SYS_SDRAM_CFG1           0x43711630
89 #define CONFIG_SYS_SDRAM_CFG2           0x56670000
90 #define CONFIG_SYS_SDRAM_CTRL           0xE1002000
91 #define CONFIG_SYS_SDRAM_EMOD           0x80010000
92 #define CONFIG_SYS_SDRAM_MODE           0x00CD0000
93
94 #define CONFIG_SYS_MONITOR_BASE         (CONFIG_SYS_FLASH_BASE + 0x400)
95 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 256 kB for Monitor */
96
97 #define CONFIG_SYS_BOOTPARAMS_LEN       64*1024
98
99 /*
100  * For booting Linux, the board info and command line data
101  * have to be in the first 8 MB of memory, since this is
102  * the maximum mapped by the Linux kernel during initialization ??
103  */
104 #define CONFIG_SYS_BOOTMAPSZ            (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
105 #define CONFIG_SYS_BOOTM_LEN            (CONFIG_SYS_SDRAM_SIZE << 20)
106
107 /* FLASH organization */
108 #ifdef CONFIG_SYS_FLASH_CFI
109 #       define CONFIG_SYS_FLASH_SIZE            0x800000        /* Max size that the board might have */
110 #       define CONFIG_SYS_FLASH_CFI_WIDTH       FLASH_CFI_16BIT
111 #       define CONFIG_SYS_MAX_FLASH_SECT        254     /* max number of sectors on one chip */
112 #endif
113
114 #define CONFIG_SYS_FLASH_BASE           CONFIG_SYS_CS0_BASE
115
116 /*
117  * Configuration for environment
118  * Environment is embedded in u-boot in the second sector of the flash
119  */
120
121 #define LDS_BOARD_TEXT \
122         . = DEFINED(env_offset) ? env_offset : .; \
123         env/embedded.o(.text*);
124
125 /* Cache Configuration */
126
127 #define ICACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
128                                          CONFIG_SYS_INIT_RAM_SIZE - 8)
129 #define DCACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
130                                          CONFIG_SYS_INIT_RAM_SIZE - 4)
131 #define CONFIG_SYS_ICACHE_INV           (CF_CACR_CINV | CF_CACR_INVI)
132 #define CONFIG_SYS_CACHE_ACR0           (CONFIG_SYS_SDRAM_BASE | \
133                                          CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
134                                          CF_ACR_EN | CF_ACR_SM_ALL)
135 #define CONFIG_SYS_CACHE_ICACR          (CF_CACR_CENB | CF_CACR_CINV | \
136                                          CF_CACR_DISD | CF_CACR_INVI | \
137                                          CF_CACR_CEIB | CF_CACR_DCM | \
138                                          CF_CACR_EUSP)
139
140 /* Chipselect bank definitions */
141 /*
142  * CS0 - NOR Flash
143  * CS1 - Available
144  * CS2 - Available
145  * CS3 - Available
146  * CS4 - Available
147  * CS5 - Available
148  */
149 #define CONFIG_SYS_CS0_BASE             0
150 #define CONFIG_SYS_CS0_MASK             0x007F0001
151 #define CONFIG_SYS_CS0_CTRL             0x00001FA0
152
153 #endif                          /* _M5208EVBE_H */