include/configs/M5208EVBE.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Configuation settings for the Freescale MCF5208EVBe.
   4  *
   5  * Copyright (C) 2004-2008 Freescale Semiconductor, Inc.
   6  * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
   7  */
   8
   9 #ifndef _M5208EVBE_H
  10 #define _M5208EVBE_H
  11
  12 /*
  13  * High Level Configuration Options
  14  * (easy to change)
  15  */
  16 #define CONFIG_SYS_UART_PORT            (0)
  17
  18 #define CONFIG_WATCHDOG_TIMEOUT         5000
  19
  20 #ifdef CONFIG_MCFFEC
  21 #       define CONFIG_SYS_DISCOVER_PHY
  22 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
  23 #       ifndef CONFIG_SYS_DISCOVER_PHY
  24 #               define FECDUPLEX        FULL
  25 #               define FECSPEED         _100BASET
  26 #       endif                   /* CONFIG_SYS_DISCOVER_PHY */
  27 #endif
  28
  29 /* I2C */
  30
  31 #ifdef CONFIG_MCFFEC
  32 #       define CONFIG_IPADDR    192.162.1.2
  33 #       define CONFIG_NETMASK   255.255.255.0
  34 #       define CONFIG_SERVERIP  192.162.1.1
  35 #       define CONFIG_GATEWAYIP 192.162.1.1
  36 #endif                          /* CONFIG_MCFFEC */
  37
  38 #define CONFIG_HOSTNAME         "M5208EVBe"
  39 #define CONFIG_EXTRA_ENV_SETTINGS               \
  40         "netdev=eth0\0"                         \
  41         "loadaddr=40010000\0"                   \
  42         "u-boot=u-boot.bin\0"                   \
  43         "load=tftp ${loadaddr) ${u-boot}\0"     \
  44         "upd=run load; run prog\0"              \
  45         "prog=prot off 0 3ffff;"                \
  46         "era 0 3ffff;"                          \
  47         "cp.b ${loadaddr} 0 ${filesize};"       \
  48         "save\0"                                \
  49         ""
  50
  51 #define CONFIG_PRAM             512     /* 512 KB */
  52
  53 #define CONFIG_SYS_CLK          166666666       /* CPU Core Clock */
  54 #define CONFIG_SYS_PLL_ODR      0x36
  55 #define CONFIG_SYS_PLL_FDR      0x7D
  56
  57 #define CONFIG_SYS_MBAR         0xFC000000
  58
  59 /*
  60  * Low Level Configuration Settings
  61  * (address mappings, register initial values, etc.)
  62  * You should know what you are doing if you make changes here.
  63  */
  64 /* Definitions for initial stack pointer and data area (in DPRAM) */
  65 #define CONFIG_SYS_INIT_RAM_ADDR        0x80000000
  66 #define CONFIG_SYS_INIT_RAM_SIZE                0x4000  /* Size of used area in internal SRAM */
  67 #define CONFIG_SYS_INIT_RAM_CTRL        0x221
  68
  69 /*
  70  * Start addresses for the final memory configuration
  71  * (Set up by the startup code)
  72  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
  73  */
  74 #define CONFIG_SYS_SDRAM_BASE           0x40000000
  75 #define CONFIG_SYS_SDRAM_SIZE           32      /* SDRAM size in MB */
  76 #define CONFIG_SYS_SDRAM_CFG1           0x43711630
  77 #define CONFIG_SYS_SDRAM_CFG2           0x56670000
  78 #define CONFIG_SYS_SDRAM_CTRL           0xE1002000
  79 #define CONFIG_SYS_SDRAM_EMOD           0x80010000
  80 #define CONFIG_SYS_SDRAM_MODE           0x00CD0000
  81
  82 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 256 kB for Monitor */
  83
  84 /*
  85  * For booting Linux, the board info and command line data
  86  * have to be in the first 8 MB of memory, since this is
  87  * the maximum mapped by the Linux kernel during initialization ??
  88  */
  89 #define CONFIG_SYS_BOOTMAPSZ            (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
  90 #define CONFIG_SYS_BOOTM_LEN            (CONFIG_SYS_SDRAM_SIZE << 20)
  91
  92 /* FLASH organization */
  93 #ifdef CONFIG_SYS_FLASH_CFI
  94 #       define CONFIG_SYS_FLASH_SIZE            0x800000        /* Max size that the board might have */
  95 #       define CONFIG_SYS_MAX_FLASH_SECT        254     /* max number of sectors on one chip */
  96 #endif
  97
  98 #define CONFIG_SYS_FLASH_BASE           CONFIG_SYS_CS0_BASE
  99
 100 /*
 101  * Configuration for environment
 102  * Environment is embedded in u-boot in the second sector of the flash
 103  */
 104
 105 #define LDS_BOARD_TEXT \
 106         . = DEFINED(env_offset) ? env_offset : .; \
 107         env/embedded.o(.text*);
 108
 109 /* Cache Configuration */
 110
 111 #define ICACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
 112                                          CONFIG_SYS_INIT_RAM_SIZE - 8)
 113 #define DCACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
 114                                          CONFIG_SYS_INIT_RAM_SIZE - 4)
 115 #define CONFIG_SYS_ICACHE_INV           (CF_CACR_CINV | CF_CACR_INVI)
 116 #define CONFIG_SYS_CACHE_ACR0           (CONFIG_SYS_SDRAM_BASE | \
 117                                          CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
 118                                          CF_ACR_EN | CF_ACR_SM_ALL)
 119 #define CONFIG_SYS_CACHE_ICACR          (CF_CACR_CENB | CF_CACR_CINV | \
 120                                          CF_CACR_DISD | CF_CACR_INVI | \
 121                                          CF_CACR_CEIB | CF_CACR_DCM | \
 122                                          CF_CACR_EUSP)
 123
 124 /* Chipselect bank definitions */
 125 /*
 126  * CS0 - NOR Flash
 127  * CS1 - Available
 128  * CS2 - Available
 129  * CS3 - Available
 130  * CS4 - Available
 131  * CS5 - Available
 132  */
 133 #define CONFIG_SYS_CS0_BASE             0
 134 #define CONFIG_SYS_CS0_MASK             0x007F0001
 135 #define CONFIG_SYS_CS0_CTRL             0x00001FA0
 136
 137 #endif                          /* _M5208EVBE_H */