1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Configuation settings for the Freescale MCF5208EVBe.
5 * Copyright (C) 2004-2008 Freescale Semiconductor, Inc.
6 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
13 * High Level Configuration Options
16 #define CFG_SYS_UART_PORT (0)
20 #define CONFIG_EXTRA_ENV_SETTINGS \
22 "loadaddr=40010000\0" \
23 "u-boot=u-boot.bin\0" \
24 "load=tftp ${loadaddr) ${u-boot}\0" \
25 "upd=run load; run prog\0" \
26 "prog=prot off 0 3ffff;" \
28 "cp.b ${loadaddr} 0 ${filesize};" \
32 #define CONFIG_PRAM 512 /* 512 KB */
34 #define CFG_SYS_CLK 166666666 /* CPU Core Clock */
35 #define CFG_SYS_PLL_ODR 0x36
36 #define CFG_SYS_PLL_FDR 0x7D
38 #define CFG_SYS_MBAR 0xFC000000
41 * Low Level Configuration Settings
42 * (address mappings, register initial values, etc.)
43 * You should know what you are doing if you make changes here.
45 /* Definitions for initial stack pointer and data area (in DPRAM) */
46 #define CFG_SYS_INIT_RAM_ADDR 0x80000000
47 #define CFG_SYS_INIT_RAM_SIZE 0x4000 /* Size of used area in internal SRAM */
48 #define CFG_SYS_INIT_RAM_CTRL 0x221
51 * Start addresses for the final memory configuration
52 * (Set up by the startup code)
53 * Please note that CFG_SYS_SDRAM_BASE _must_ start at 0
55 #define CFG_SYS_SDRAM_BASE 0x40000000
56 #define CFG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */
57 #define CFG_SYS_SDRAM_CFG1 0x43711630
58 #define CFG_SYS_SDRAM_CFG2 0x56670000
59 #define CFG_SYS_SDRAM_CTRL 0xE1002000
60 #define CFG_SYS_SDRAM_EMOD 0x80010000
61 #define CFG_SYS_SDRAM_MODE 0x00CD0000
64 * For booting Linux, the board info and command line data
65 * have to be in the first 8 MB of memory, since this is
66 * the maximum mapped by the Linux kernel during initialization ??
68 #define CFG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20))
70 /* FLASH organization */
71 #ifdef CONFIG_SYS_FLASH_CFI
72 # define CFG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */
75 #define CFG_SYS_FLASH_BASE CFG_SYS_CS0_BASE
78 * Configuration for environment
79 * Environment is embedded in u-boot in the second sector of the flash
82 #define LDS_BOARD_TEXT \
83 . = DEFINED(env_offset) ? env_offset : .; \
84 env/embedded.o(.text*);
86 /* Cache Configuration */
88 #define ICACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
89 CFG_SYS_INIT_RAM_SIZE - 8)
90 #define DCACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
91 CFG_SYS_INIT_RAM_SIZE - 4)
92 #define CFG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI)
93 #define CFG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \
94 CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \
95 CF_ACR_EN | CF_ACR_SM_ALL)
96 #define CFG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \
97 CF_CACR_DISD | CF_CACR_INVI | \
98 CF_CACR_CEIB | CF_CACR_DCM | \
101 /* Chipselect bank definitions */
110 #define CFG_SYS_CS0_BASE 0
111 #define CFG_SYS_CS0_MASK 0x007F0001
112 #define CFG_SYS_CS0_CTRL 0x00001FA0
114 #endif /* _M5208EVBE_H */