2 * (C) Copyright 2000-2004
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * board/config.h - configuration options, board specific
32 * High Level Configuration Options
36 #define CONFIG_405GP 1 /* This is a PPC405GP CPU */
37 #define CONFIG_4xx 1 /* ...member of PPC4xx family */
38 #define CONFIG_EXBITGEN 1 /* on a Exbit Generic board */
40 #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
42 #define CONFIG_SYS_CLK_FREQ 25000000 /* external frequency to pll */
44 /* I2C configuration */
45 #define CONFIG_HARD_I2C 1 /* I2C with hardware support */
46 #define CFG_I2C_SPEED 40000 /* I2C speed */
47 #define CFG_I2C_SLAVE 0x7F /* I2C slave address */
49 /* environment is in EEPROM */
50 #define CFG_ENV_IS_IN_EEPROM 1
51 #undef CFG_ENV_IS_IN_FLASH
52 #undef CFG_ENV_IS_IN_NVRAM
54 #ifdef CFG_ENV_IS_IN_EEPROM
55 #define CFG_I2C_EEPROM_ADDR 0x56 /* 1010110 */
56 #define CFG_I2C_EEPROM_ADDR_LEN 1 /* 8-bit internal addressing */
57 #define CFG_I2C_EEPROM_ADDR_OVERFLOW 1 /* ... and 1 bit in I2C address */
58 #define CFG_EEPROM_PAGE_WRITE_BITS 3 /* 4 bytes per page */
59 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 40 /* write takes up to 40 msec */
60 #define CFG_ENV_OFFSET 4 /* Offset of Environment Sector */
61 #define CFG_ENV_SIZE 350 /* that is 350 bytes only! */
64 #define CONFIG_BOOTDELAY 10 /* autoboot after 10 seconds */
66 autbooting is altogether disabled and cannot be
67 enabled if CONFIG_BOOTDELAY is negative.
68 If you want shorter bootdelay, then
69 - "setenv bootdelay <delay>" to the proper value
72 #define CONFIG_BOOTCOMMAND "bootm 20400000 20800000"
74 #define CONFIG_BOOTARGS "root=/dev/ram " \
75 "ramdisk_size=32768 " \
76 "console=ttyS0,115200 " \
79 #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
80 #define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
82 #define CONFIG_MII 1 /* MII PHY management */
83 #define CONFIG_PHY_ADDR 0 /* PHY address */
89 #define CONFIG_BOOTP_BOOTFILESIZE
90 #define CONFIG_BOOTP_BOOTPATH
91 #define CONFIG_BOOTP_GATEWAY
92 #define CONFIG_BOOTP_HOSTNAME
96 * Command line configuration.
98 #include <config_cmd_default.h>
101 #undef CONFIG_WATCHDOG /* watchdog disabled */
104 * Miscellaneous configurable options
106 #define CFG_LONGHELP /* undef to save memory */
107 #define CFG_PROMPT "=> " /* Monitor Command Prompt */
108 #if defined(CONFIG_CMD_KGDB)
109 #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
111 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
113 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
114 #define CFG_MAXARGS 16 /* max number of command args */
115 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
117 #define CFG_MEMTEST_START 0x0400000 /* memtest works on */
118 #define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
120 /* UART configuration */
121 #define CFG_BASE_BAUD 691200
123 /* Default baud rate */
124 #define CONFIG_BAUDRATE 115200
126 /* The following table includes the supported baudrates */
127 #define CFG_BAUDRATE_TABLE \
128 { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \
129 57600, 115200, 230400, 460800, 921600 }
131 #define CFG_CLKS_IN_HZ 1 /* everything, incl board info, in Hz */
133 #define CFG_LOAD_ADDR 0x100000 /* default load address */
134 #define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */
136 #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
138 /*-----------------------------------------------------------------------
140 *-----------------------------------------------------------------------
142 #undef CONFIG_PCI /* no pci support */
144 /*-----------------------------------------------------------------------
145 * External peripheral base address
146 *-----------------------------------------------------------------------
148 #undef CONFIG_IDE_PCMCIA /* no pcmcia interface required */
149 #undef CONFIG_IDE_LED /* no led for ide supported */
150 #undef CONFIG_IDE_RESET /* no reset for ide supported */
152 #define CFG_KEY_REG_BASE_ADDR 0xF0100000
153 #define CFG_IR_REG_BASE_ADDR 0xF0200000
154 #define CFG_FPGA_REG_BASE_ADDR 0xF0300000
156 /*-----------------------------------------------------------------------
157 * Start addresses for the final memory configuration
158 * (Set up by the startup code)
159 * Please note that CFG_SDRAM_BASE _must_ start at 0
161 #define CFG_SDRAM_BASE 0x00000000
162 #define CFG_FLASH0_BASE 0xFFF80000
163 #define CFG_FLASH0_SIZE 0x00080000
164 #define CFG_FLASH1_BASE 0x20000000
165 #define CFG_FLASH1_SIZE 0x02000000
166 #define CFG_FLASH_BASE CFG_FLASH0_BASE
167 #define CFG_FLASH_SIZE CFG_FLASH0_SIZE
168 #define CFG_MONITOR_BASE TEXT_BASE
169 #define CFG_MONITOR_LEN (192 * 1024) /* Reserve 196 kB for Monitor */
170 #define CFG_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */
172 #if CFG_MONITOR_BASE < CFG_FLASH0_BASE
177 * For booting Linux, the board info and command line data
178 * have to be in the first 8 MB of memory, since this is
179 * the maximum mapped by the Linux kernel during initialization.
181 #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
182 /*-----------------------------------------------------------------------
185 #define CFG_MAX_FLASH_BANKS 5 /* max number of memory banks */
186 #define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
188 #define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
189 #define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
191 #ifdef CFG_ENV_IS_IN_FLASH
192 #define CFG_ENV_OFFSET 0x00060000 /* Offset of Environment Sector */
193 #define CFG_ENV_SIZE 0x00010000 /* Total Size of Environment Sector */
194 #define CFG_ENV_SECT_SIZE 0x00010000 /* see README - env sector total size */
197 /* On Chip Memory location/size */
198 #define CFG_OCM_DATA_ADDR 0xF8000000
199 #define CFG_OCM_DATA_SIZE 0x1000
201 /* Global info and initial stack */
202 #define CFG_INIT_RAM_ADDR CFG_OCM_DATA_ADDR /* inside of on-chip SRAM */
203 #define CFG_INIT_RAM_END CFG_OCM_DATA_SIZE /* End of used area in RAM */
204 #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
205 #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
206 #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
208 /* Cache configuration */
209 #define CFG_DCACHE_SIZE 8192
210 #define CFG_CACHELINE_SIZE 32
213 * Internal Definitions
217 #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
218 #define BOOTFLAG_WARM 0x02 /* Software reboot */
220 #if defined(CONFIG_CMD_KGDB)
221 #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
222 #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
224 #endif /* __CONFIG_H */