2 * (C) Copyright 2003, Li-Pro.Net <www.li-pro.net>
3 * Stephan Linz <linz@li-pro.net>
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 /***********************************************************************
28 * Include the whole NIOS CPU configuration.
30 * !!! HAVE TO BE HERE !!! DON'T MOVE THIS PART !!!
32 ***********************************************************************/
34 #if defined(CONFIG_NIOS_SAFE_32)
35 #include <configs/DK1S10_safe_32.h>
36 #elif defined(CONFIG_NIOS_STANDARD_32)
37 #include <configs/DK1S10_standard_32.h>
38 #elif defined(CONFIG_NIOS_MTX_LDK_20)
39 #include <configs/DK1S10_mtx_ldk_20.h>
41 #error *** CFG_ERROR: you have to setup right NIOS CPU configuration
44 /*------------------------------------------------------------------------
45 * BOARD/CPU -- TOP-LEVEL
46 *----------------------------------------------------------------------*/
47 #define CONFIG_NIOS 1 /* NIOS-32 core */
48 #define CONFIG_DK1S10 1 /* Stratix DK-1S10 board*/
49 #define CONFIG_SYS_CLK_FREQ CFG_NIOS_CPU_CLK/* 50 MHz core clock */
50 #define CFG_HZ 1000 /* 1 msec time tick */
52 #define CONFIG_BOARD_EARLY_INIT_F 1 /* enable early board-spec. init*/
54 /*------------------------------------------------------------------------
55 * BASE ADDRESSES / SIZE (Flash, SRAM, SDRAM)
56 *----------------------------------------------------------------------*/
57 #if (CFG_NIOS_CPU_SDRAM_SIZE != 0)
59 #define CFG_SDRAM_BASE CFG_NIOS_CPU_SDRAM_BASE
60 #define CFG_SDRAM_SIZE CFG_NIOS_CPU_SDRAM_SIZE
63 #error *** CFG_ERROR: you have to setup any SDRAM in NIOS CPU config
66 #if defined(CFG_NIOS_CPU_SRAM_BASE) && defined(CFG_NIOS_CPU_SRAM_SIZE)
68 #define CFG_SRAM_BASE CFG_NIOS_CPU_SRAM_BASE
69 #define CFG_SRAM_SIZE CFG_NIOS_CPU_SRAM_SIZE
78 #define CFG_VECT_BASE CFG_NIOS_CPU_VEC_BASE
80 /*------------------------------------------------------------------------
81 * MEMORY ORGANIZATION - For the most part, you can put things pretty
82 * much anywhere. This is pretty flexible for Nios. So here we make some
83 * arbitrary choices & assume that the monitor is placed at the end of
84 * a memory resource (so you must make sure TEXT_BASE is chosen
87 * -The heap is placed below the monitor.
88 * -Global data is placed below the heap.
89 * -The stack is placed below global data (&grows down).
90 *----------------------------------------------------------------------*/
91 #define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256k */
92 #define CFG_GBL_DATA_SIZE 128 /* Global data size rsvd*/
93 #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
95 #define CFG_MONITOR_BASE TEXT_BASE
96 #define CFG_MALLOC_BASE (CFG_MONITOR_BASE - CFG_MALLOC_LEN)
97 #define CFG_GBL_DATA_OFFSET (CFG_MALLOC_BASE - CFG_GBL_DATA_SIZE)
98 #define CFG_INIT_SP CFG_GBL_DATA_OFFSET
100 /*------------------------------------------------------------------------
102 *----------------------------------------------------------------------*/
103 #if (CFG_NIOS_CPU_FLASH_SIZE != 0)
105 #define CFG_FLASH_BASE CFG_NIOS_CPU_FLASH_BASE
106 #define CFG_FLASH_SIZE CFG_NIOS_CPU_FLASH_SIZE
107 #define CFG_MAX_FLASH_SECT 128 /* Max # sects per bank */
108 #define CFG_MAX_FLASH_BANKS 1 /* Max # of flash banks */
109 #define CFG_FLASH_ERASE_TOUT 8000 /* Erase timeout (msec) */
110 #define CFG_FLASH_WRITE_TOUT 100 /* Write timeout (msec) */
111 #define CFG_FLASH_WORD_SIZE unsigned char /* flash word size */
114 #error *** CFG_ERROR: you have to setup any Flash memory in NIOS CPU config
117 /*------------------------------------------------------------------------
119 *----------------------------------------------------------------------*/
120 #if (CFG_NIOS_CPU_FLASH_SIZE != 0)
122 #define CFG_ENV_IS_IN_FLASH 1 /* Environment in flash */
124 #if defined(CONFIG_NIOS_STANDARD_32)
125 #define CFG_ENV_ADDR CFG_FLASH_BASE /* Mem addr of env */
126 #elif defined(CONFIG_NIOS_MTX_LDK_20)
127 #define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_MONITOR_LEN)
129 #error *** CFG_ERROR: you have to setup the environment base address CFG_ENV_ADDR
132 #define CFG_ENV_SIZE (64 * 1024) /* 64 KByte (1 sector) */
133 #define CONFIG_ENV_OVERWRITE /* Serial/eth change Ok */
136 #define CFG_ENV_IS_NOWHERE 1 /* NO Environment */
139 /*------------------------------------------------------------------------
141 *----------------------------------------------------------------------*/
142 #if (CFG_NIOS_CPU_UART_NUMS != 0)
144 #define CFG_NIOS_CONSOLE CFG_NIOS_CPU_UART0 /* 1st UART is Cons. */
146 #if (CFG_NIOS_CPU_UART0_BR != 0)
147 #define CFG_NIOS_FIXEDBAUD 1 /* Baudrate is fixed */
148 #define CONFIG_BAUDRATE CFG_NIOS_CPU_UART0_BR
150 #undef CFG_NIOS_FIXEDBAUD
151 #define CONFIG_BAUDRATE 115200
154 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
157 #error *** CFG_ERROR: you have to setup at least one UART in NIOS CPU config
160 /*------------------------------------------------------------------------
161 * TIMER FOR TIMEBASE -- Nios doesn't have the equivalent of ppc PIT,
162 * so an avalon bus timer is required.
163 *----------------------------------------------------------------------*/
164 #if (CFG_NIOS_CPU_TIMER_NUMS != 0) && defined(CFG_NIOS_CPU_TICK_TIMER)
166 #if (CFG_NIOS_CPU_TICK_TIMER == 0)
168 #define CFG_NIOS_TMRBASE CFG_NIOS_CPU_TIMER0 /* TIMER0 as tick */
169 #define CFG_NIOS_TMRIRQ CFG_NIOS_CPU_TIMER0_IRQ
171 #if (CFG_NIOS_CPU_TIMER0_PER >= CFG_HZ)
172 #define CFG_NIOS_TMRMS (CFG_NIOS_CPU_TIMER0_PER / CFG_HZ)
174 #error *** CFG_ERROR: you have to use a timer periode of more than CFG_HZ
177 #elif (CFG_NIOS_CPU_TICK_TIMER == 1)
179 #define CFG_NIOS_TMRBASE CFG_NIOS_CPU_TIMER1 /* TIMER1 as tick */
180 #define CFG_NIOS_TMRIRQ CFG_NIOS_CPU_TIMER1_IRQ
182 #if (CFG_NIOS_CPU_TIMER1_PER >= CFG_HZ)
183 #define CFG_NIOS_TMRMS (CFG_NIOS_CPU_TIMER1_PER / CFG_HZ)
185 #error *** CFG_ERROR: you have to use a timer periode of more than CFG_HZ
188 #endif /* CFG_NIOS_CPU_TICK_TIMER */
191 #error *** CFG_ERROR: you have to setup at least one TIMER in NIOS CPU config
194 /*------------------------------------------------------------------------
195 * Ethernet -- needs work!
196 *----------------------------------------------------------------------*/
197 #if (CFG_NIOS_CPU_LAN_NUMS == 1)
199 #if (CFG_NIOS_CPU_LAN0_TYPE == 0) /* LAN91C111 */
201 #define CONFIG_DRIVER_SMC91111 /* Using SMC91c111 */
202 #undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */
203 #define CONFIG_SMC91111_BASE (CFG_NIOS_CPU_LAN0_BASE + CFG_NIOS_CPU_LAN0_OFFS)
205 #if (CFG_NIOS_CPU_LAN0_BUSW == 32)
206 #define CONFIG_SMC_USE_32_BIT 1
208 #undef CONFIG_SMC_USE_32_BIT
211 #elif (CFG_NIOS_CPU_LAN0_TYPE == 1) /* CS8900A */
213 /********************************************/
214 /* !!! CS8900 is __not__ tested on NIOS !!! */
215 /********************************************/
216 #define CONFIG_DRIVER_CS8900 /* Using CS8900 */
217 #define CS8900_BASE (CFG_NIOS_CPU_LAN0_BASE + CFG_NIOS_CPU_LAN0_OFFS)
219 #if (CFG_NIOS_CPU_LAN0_BUSW == 32)
221 #define CS8900_BUS32 1
223 #define CS8900_BUS16 1
228 #error *** CFG_ERROR: invalid LAN0 chip type, check your NIOS CPU config
231 #define CONFIG_ETHADDR 08:00:3e:26:0a:5b
232 #define CONFIG_NETMASK 255.255.255.0
233 #define CONFIG_IPADDR 192.168.2.21
234 #define CONFIG_SERVERIP 192.168.2.16
237 #error *** CFG_ERROR: you have to setup just one LAN only or expand your config.h
240 /*------------------------------------------------------------------------
242 *----------------------------------------------------------------------*/
243 #if (CFG_NIOS_CPU_PIO_NUMS != 0) && defined(CFG_NIOS_CPU_LED_PIO)
245 #if (CFG_NIOS_CPU_LED_PIO == 0)
247 #error *** CFG_ERROR: status LEDs at PIO0 not supported, expand your config.h
249 #elif (CFG_NIOS_CPU_LED_PIO == 1)
251 #error *** CFG_ERROR: status LEDs at PIO1 not supported, expand your config.h
253 #elif (CFG_NIOS_CPU_LED_PIO == 2)
255 #define STATUS_LED_BASE CFG_NIOS_CPU_PIO2
256 #define STATUS_LED_BITS CFG_NIOS_CPU_PIO2_BITS
257 #define STATUS_LED_ACTIVE 1 /* LED on for bit == 1 */
259 #if (CFG_NIOS_CPU_PIO2_TYPE == 1)
260 #define STATUS_LED_WRONLY 1
262 #undef STATUS_LED_WRONLY
265 #elif (CFG_NIOS_CPU_LED_PIO == 3)
267 #error *** CFG_ERROR: status LEDs at PIO3 not supported, expand your config.h
269 #elif (CFG_NIOS_CPU_LED_PIO == 4)
271 #error *** CFG_ERROR: status LEDs at PIO4 not supported, expand your config.h
273 #elif (CFG_NIOS_CPU_LED_PIO == 5)
275 #error *** CFG_ERROR: status LEDs at PIO5 not supported, expand your config.h
277 #elif (CFG_NIOS_CPU_LED_PIO == 6)
279 #error *** CFG_ERROR: status LEDs at PIO6 not supported, expand your config.h
281 #elif (CFG_NIOS_CPU_LED_PIO == 7)
283 #error *** CFG_ERROR: status LEDs at PIO7 not supported, expand your config.h
285 #elif (CFG_NIOS_CPU_LED_PIO == 8)
287 #error *** CFG_ERROR: status LEDs at PIO8 not supported, expand your config.h
289 #elif (CFG_NIOS_CPU_LED_PIO == 9)
291 #error *** CFG_ERROR: status LEDs at PIO9 not supported, expand your config.h
294 #error *** CFG_ERROR: you have to set CFG_NIOS_CPU_LED_PIO in right case
297 #define CONFIG_STATUS_LED 1 /* enable status led driver */
299 #define STATUS_LED_BIT (1 << 0) /* LED[0] */
300 #define STATUS_LED_STATE STATUS_LED_BLINKING
301 #define STATUS_LED_BOOT_STATE STATUS_LED_OFF
302 #define STATUS_LED_PERIOD (CFG_HZ / 10) /* ca. 1 Hz */
303 #define STATUS_LED_BOOT 0 /* boot LED */
305 #if (STATUS_LED_BITS > 1)
306 #define STATUS_LED_BIT1 (1 << 1) /* LED[1] */
307 #define STATUS_LED_STATE1 STATUS_LED_OFF
308 #define STATUS_LED_PERIOD1 (CFG_HZ / 50) /* ca. 5 Hz */
309 #define STATUS_LED_RED 1 /* fail LED */
312 #if (STATUS_LED_BITS > 2)
313 #define STATUS_LED_BIT2 (1 << 2) /* LED[2] */
314 #define STATUS_LED_STATE2 STATUS_LED_OFF
315 #define STATUS_LED_PERIOD2 (CFG_HZ / 10) /* ca. 1 Hz */
316 #define STATUS_LED_YELLOW 2 /* info LED */
319 #if (STATUS_LED_BITS > 3)
320 #define STATUS_LED_BIT3 (1 << 3) /* LED[3] */
321 #define STATUS_LED_STATE3 STATUS_LED_OFF
322 #define STATUS_LED_PERIOD3 (CFG_HZ / 10) /* ca. 1 Hz */
323 #define STATUS_LED_GREEN 3 /* info LED */
326 #define STATUS_LED_PAR 1 /* makes status_led.h happy */
328 #endif /* CFG_NIOS_CPU_PIO_NUMS */
330 /*------------------------------------------------------------------------
331 * SEVEN SEGMENT LED DISPLAY
332 *----------------------------------------------------------------------*/
333 #if (CFG_NIOS_CPU_PIO_NUMS != 0) && defined(CFG_NIOS_CPU_SEVENSEG_PIO)
335 #if (CFG_NIOS_CPU_SEVENSEG_PIO == 0)
337 #error *** CFG_ERROR: seven segment display at PIO0 not supported, expand your config.h
339 #elif (CFG_NIOS_CPU_SEVENSEG_PIO == 1)
341 #error *** CFG_ERROR: seven segment display at PIO1 not supported, expand your config.h
343 #elif (CFG_NIOS_CPU_SEVENSEG_PIO == 2)
345 #error *** CFG_ERROR: seven segment display at PIO2 not supported, expand your config.h
347 #elif (CFG_NIOS_CPU_SEVENSEG_PIO == 3)
349 #define SEVENSEG_BASE CFG_NIOS_CPU_PIO3
350 #define SEVENSEG_BITS CFG_NIOS_CPU_PIO3_BITS
351 #define SEVENSEG_ACTIVE 0 /* LED on for bit == 1 */
353 #if (CFG_NIOS_CPU_PIO3_TYPE == 1)
354 #define SEVENSEG_WRONLY 1
356 #undef SEVENSEG_WRONLY
359 #elif (CFG_NIOS_CPU_SEVENSEG_PIO == 4)
361 #error *** CFG_ERROR: seven segment display at PIO4 not supported, expand your config.h
363 #elif (CFG_NIOS_CPU_SEVENSEG_PIO == 5)
365 #error *** CFG_ERROR: seven segment display at PIO5 not supported, expand your config.h
367 #elif (CFG_NIOS_CPU_SEVENSEG_PIO == 6)
369 #error *** CFG_ERROR: seven segment display at PIO6 not supported, expand your config.h
371 #elif (CFG_NIOS_CPU_SEVENSEG_PIO == 7)
373 #error *** CFG_ERROR: seven segment display at PIO7 not supported, expand your config.h
375 #elif (CFG_NIOS_CPU_SEVENSEG_PIO == 8)
377 #error *** CFG_ERROR: seven segment display at PIO8 not supported, expand your config.h
379 #elif (CFG_NIOS_CPU_SEVENSEG_PIO == 9)
381 #error *** CFG_ERROR: seven segment display at PIO9 not supported, expand your config.h
384 #error *** CFG_ERROR: you have to set CFG_NIOS_CPU_SEVENSEG_PIO in right case
387 #define CONFIG_SEVENSEG 1 /* enable seven segment led driver */
390 * Dual 7-Segment Display pin assignment -- read more in your
391 * "Nios Development Board Reference Manual"
394 * (U8) HI:D[15..8] (U9) LO:D[7..0]
399 * |______| |______| ___
400 * | D8 | | D0 | | A |
402 * D10| |D12 D2| |D4 | G |
403 * |______| |______| E|___|C
408 #define SEVENSEG_DIGIT_HI_LO_EQUAL 1 /* high nibble equal low nibble */
409 #define SEVENSEG_DIGIT_A (1 << 6) /* bit 6 is segment A */
410 #define SEVENSEG_DIGIT_B (1 << 5) /* bit 5 is segment B */
411 #define SEVENSEG_DIGIT_C (1 << 4) /* bit 4 is segment C */
412 #define SEVENSEG_DIGIT_D (1 << 3) /* bit 3 is segment D */
413 #define SEVENSEG_DIGIT_E (1 << 2) /* bit 2 is segment E */
414 #define SEVENSEG_DIGIT_F (1 << 1) /* bit 1 is segment F */
415 #define SEVENSEG_DIGIT_G (1 << 0) /* bit 0 is segment G */
416 #define SEVENSEG_DIGIT_DP (1 << 7) /* bit 7 is decimal point */
418 #endif /* CFG_NIOS_CPU_PIO_NUMS */
420 /*------------------------------------------------------------------------
422 *----------------------------------------------------------------------*/
423 #define CONFIG_COMMANDS (CFG_CMD_ALL & ~( \
453 #include <cmd_confdefs.h>
455 /*------------------------------------------------------------------------
457 *----------------------------------------------------------------------*/
458 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
459 #define CONFIG_KGDB_BAUDRATE 9600
462 /*------------------------------------------------------------------------
464 *----------------------------------------------------------------------*/
465 #define CFG_LONGHELP /* undef to save memory */
466 #define CFG_PROMPT "DK1S10 > " /* Monitor Command Prompt */
467 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
468 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
469 #define CFG_MAXARGS 16 /* max number of command args*/
470 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
472 /* Default load address */
473 #if (CFG_SRAM_SIZE != 0)
475 /* default in SRAM */
476 #define CFG_LOAD_ADDR CFG_SRAM_BASE
478 #elif (CFG_SDRAM_SIZE != 0)
480 /* default in SDRAM */
481 #if (CFG_SDRAM_BASE == CFG_NIOS_CPU_VEC_BASE)
482 #define CFG_LOAD_ADDR (CFG_SDRAM_BASE + CFG_NIOS_CPU_VEC_SIZE)
484 #define CFG_LOAD_ADDR CFG_SDRAM_BASE
488 #undef CFG_LOAD_ADDR /* force error break */
493 #if (CFG_SDRAM_SIZE != 0)
495 /* SDRAM begin to stack area (1MB stack) */
496 #if (CFG_SDRAM_BASE == CFG_NIOS_CPU_VEC_BASE)
497 #define CFG_MEMTEST_START (CFG_SDRAM_BASE + CFG_NIOS_CPU_VEC_SIZE)
498 #define CFG_MEMTEST_END (CFG_INIT_SP - (1024 * 1024))
500 #define CFG_MEMTEST_START CFG_SDRAM_BASE
501 #define CFG_MEMTEST_END (CFG_INIT_SP - (1024 * 1024))
505 #undef CFG_MEMTEST_START /* force error break */
506 #undef CFG_MEMTEST_END
510 #endif /* __CONFIG_H */