1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Header file for AT91/AT32 LCD Controller
5 * Data structure and register user interface
7 * Copyright (C) 2007 Atmel Corporation
9 #ifndef __ATMEL_LCDC_H__
10 #define __ATMEL_LCDC_H__
12 #define ATMEL_LCDC_DMABADDR1 0x00
13 #define ATMEL_LCDC_DMABADDR2 0x04
14 #define ATMEL_LCDC_DMAFRMPT1 0x08
15 #define ATMEL_LCDC_DMAFRMPT2 0x0c
16 #define ATMEL_LCDC_DMAFRMADD1 0x10
17 #define ATMEL_LCDC_DMAFRMADD2 0x14
19 #define ATMEL_LCDC_DMAFRMCFG 0x18
20 #define ATMEL_LCDC_FRSIZE (0x7fffff << 0)
21 #define ATMEL_LCDC_BLENGTH_OFFSET 24
22 #define ATMEL_LCDC_BLENGTH (0x7f << ATMEL_LCDC_BLENGTH_OFFSET)
24 #define ATMEL_LCDC_DMACON 0x1c
25 #define ATMEL_LCDC_DMAEN (0x1 << 0)
26 #define ATMEL_LCDC_DMARST (0x1 << 1)
27 #define ATMEL_LCDC_DMABUSY (0x1 << 2)
28 #define ATMEL_LCDC_DMAUPDT (0x1 << 3)
29 #define ATMEL_LCDC_DMA2DEN (0x1 << 4)
31 #define ATMEL_LCDC_DMA2DCFG 0x20
32 #define ATMEL_LCDC_ADDRINC_OFFSET 0
33 #define ATMEL_LCDC_ADDRINC (0xffff)
34 #define ATMEL_LCDC_PIXELOFF_OFFSET 24
35 #define ATMEL_LCDC_PIXELOFF (0x1f << 24)
37 #define ATMEL_LCDC_LCDCON1 0x0800
38 #define ATMEL_LCDC_BYPASS (1 << 0)
39 #define ATMEL_LCDC_CLKVAL_OFFSET 12
40 #define ATMEL_LCDC_CLKVAL (0x1ff << ATMEL_LCDC_CLKVAL_OFFSET)
41 #define ATMEL_LCDC_LINCNT (0x7ff << 21)
43 #define ATMEL_LCDC_LCDCON2 0x0804
44 #define ATMEL_LCDC_DISTYPE (3 << 0)
45 #define ATMEL_LCDC_DISTYPE_STNMONO (0 << 0)
46 #define ATMEL_LCDC_DISTYPE_STNCOLOR (1 << 0)
47 #define ATMEL_LCDC_DISTYPE_TFT (2 << 0)
48 #define ATMEL_LCDC_SCANMOD (1 << 2)
49 #define ATMEL_LCDC_SCANMOD_SINGLE (0 << 2)
50 #define ATMEL_LCDC_SCANMOD_DUAL (1 << 2)
51 #define ATMEL_LCDC_IFWIDTH (3 << 3)
52 #define ATMEL_LCDC_IFWIDTH_4 (0 << 3)
53 #define ATMEL_LCDC_IFWIDTH_8 (1 << 3)
54 #define ATMEL_LCDC_IFWIDTH_16 (2 << 3)
55 #define ATMEL_LCDC_PIXELSIZE (7 << 5)
56 #define ATMEL_LCDC_PIXELSIZE_1 (0 << 5)
57 #define ATMEL_LCDC_PIXELSIZE_2 (1 << 5)
58 #define ATMEL_LCDC_PIXELSIZE_4 (2 << 5)
59 #define ATMEL_LCDC_PIXELSIZE_8 (3 << 5)
60 #define ATMEL_LCDC_PIXELSIZE_16 (4 << 5)
61 #define ATMEL_LCDC_PIXELSIZE_24 (5 << 5)
62 #define ATMEL_LCDC_PIXELSIZE_32 (6 << 5)
63 #define ATMEL_LCDC_INVVD (1 << 8)
64 #define ATMEL_LCDC_INVVD_NORMAL (0 << 8)
65 #define ATMEL_LCDC_INVVD_INVERTED (1 << 8)
66 #define ATMEL_LCDC_INVFRAME (1 << 9 )
67 #define ATMEL_LCDC_INVFRAME_NORMAL (0 << 9)
68 #define ATMEL_LCDC_INVFRAME_INVERTED (1 << 9)
69 #define ATMEL_LCDC_INVLINE (1 << 10)
70 #define ATMEL_LCDC_INVLINE_NORMAL (0 << 10)
71 #define ATMEL_LCDC_INVLINE_INVERTED (1 << 10)
72 #define ATMEL_LCDC_INVCLK (1 << 11)
73 #define ATMEL_LCDC_INVCLK_NORMAL (0 << 11)
74 #define ATMEL_LCDC_INVCLK_INVERTED (1 << 11)
75 #define ATMEL_LCDC_INVDVAL (1 << 12)
76 #define ATMEL_LCDC_INVDVAL_NORMAL (0 << 12)
77 #define ATMEL_LCDC_INVDVAL_INVERTED (1 << 12)
78 #define ATMEL_LCDC_CLKMOD (1 << 15)
79 #define ATMEL_LCDC_CLKMOD_ACTIVEDISPLAY (0 << 15)
80 #define ATMEL_LCDC_CLKMOD_ALWAYSACTIVE (1 << 15)
81 #define ATMEL_LCDC_MEMOR (1 << 31)
82 #define ATMEL_LCDC_MEMOR_BIG (0 << 31)
83 #define ATMEL_LCDC_MEMOR_LITTLE (1 << 31)
85 #define ATMEL_LCDC_TIM1 0x0808
86 #define ATMEL_LCDC_VFP (0xffU << 0)
87 #define ATMEL_LCDC_VBP_OFFSET 8
88 #define ATMEL_LCDC_VBP (0xffU << ATMEL_LCDC_VBP_OFFSET)
89 #define ATMEL_LCDC_VPW_OFFSET 16
90 #define ATMEL_LCDC_VPW (0x3fU << ATMEL_LCDC_VPW_OFFSET)
91 #define ATMEL_LCDC_VHDLY_OFFSET 24
92 #define ATMEL_LCDC_VHDLY (0xfU << ATMEL_LCDC_VHDLY_OFFSET)
94 #define ATMEL_LCDC_TIM2 0x080c
95 #define ATMEL_LCDC_HBP (0xffU << 0)
96 #define ATMEL_LCDC_HPW_OFFSET 8
97 #define ATMEL_LCDC_HPW (0x3fU << ATMEL_LCDC_HPW_OFFSET)
98 #define ATMEL_LCDC_HFP_OFFSET 21
99 #define ATMEL_LCDC_HFP (0x7ffU << ATMEL_LCDC_HFP_OFFSET)
101 #define ATMEL_LCDC_LCDFRMCFG 0x0810
102 #define ATMEL_LCDC_LINEVAL (0x7ff << 0)
103 #define ATMEL_LCDC_HOZVAL_OFFSET 21
104 #define ATMEL_LCDC_HOZVAL (0x7ff << ATMEL_LCDC_HOZVAL_OFFSET)
106 #define ATMEL_LCDC_FIFO 0x0814
107 #define ATMEL_LCDC_FIFOTH (0xffff)
109 #define ATMEL_LCDC_MVAL 0x0818
111 #define ATMEL_LCDC_DP1_2 0x081c
112 #define ATMEL_LCDC_DP4_7 0x0820
113 #define ATMEL_LCDC_DP3_5 0x0824
114 #define ATMEL_LCDC_DP2_3 0x0828
115 #define ATMEL_LCDC_DP5_7 0x082c
116 #define ATMEL_LCDC_DP3_4 0x0830
117 #define ATMEL_LCDC_DP4_5 0x0834
118 #define ATMEL_LCDC_DP6_7 0x0838
119 #define ATMEL_LCDC_DP1_2_VAL (0xff)
120 #define ATMEL_LCDC_DP4_7_VAL (0xfffffff)
121 #define ATMEL_LCDC_DP3_5_VAL (0xfffff)
122 #define ATMEL_LCDC_DP2_3_VAL (0xfff)
123 #define ATMEL_LCDC_DP5_7_VAL (0xfffffff)
124 #define ATMEL_LCDC_DP3_4_VAL (0xffff)
125 #define ATMEL_LCDC_DP4_5_VAL (0xfffff)
126 #define ATMEL_LCDC_DP6_7_VAL (0xfffffff)
128 #define ATMEL_LCDC_PWRCON 0x083c
129 #define ATMEL_LCDC_PWR (1 << 0)
130 #define ATMEL_LCDC_GUARDT_OFFSET 1
131 #define ATMEL_LCDC_GUARDT (0x7f << ATMEL_LCDC_GUARDT_OFFSET)
132 #define ATMEL_LCDC_BUSY (1 << 31)
134 #define ATMEL_LCDC_CONTRAST_CTR 0x0840
135 #define ATMEL_LCDC_PS (3 << 0)
136 #define ATMEL_LCDC_PS_DIV1 (0 << 0)
137 #define ATMEL_LCDC_PS_DIV2 (1 << 0)
138 #define ATMEL_LCDC_PS_DIV4 (2 << 0)
139 #define ATMEL_LCDC_PS_DIV8 (3 << 0)
140 #define ATMEL_LCDC_POL (1 << 2)
141 #define ATMEL_LCDC_POL_NEGATIVE (0 << 2)
142 #define ATMEL_LCDC_POL_POSITIVE (1 << 2)
143 #define ATMEL_LCDC_ENA (1 << 3)
144 #define ATMEL_LCDC_ENA_PWMDISABLE (0 << 3)
145 #define ATMEL_LCDC_ENA_PWMENABLE (1 << 3)
147 #define ATMEL_LCDC_CONTRAST_VAL 0x0844
148 #define ATMEL_LCDC_CVAL (0xff)
150 #define ATMEL_LCDC_IER 0x0848
151 #define ATMEL_LCDC_IDR 0x084c
152 #define ATMEL_LCDC_IMR 0x0850
153 #define ATMEL_LCDC_ISR 0x0854
154 #define ATMEL_LCDC_ICR 0x0858
155 #define ATMEL_LCDC_LNI (1 << 0)
156 #define ATMEL_LCDC_LSTLNI (1 << 1)
157 #define ATMEL_LCDC_EOFI (1 << 2)
158 #define ATMEL_LCDC_UFLWI (1 << 4)
159 #define ATMEL_LCDC_OWRI (1 << 5)
160 #define ATMEL_LCDC_MERI (1 << 6)
162 #define ATMEL_LCDC_LUT(n) (0x0c00 + ((n)*4))
164 #endif /* __ATMEL_LCDC_H__ */