1 #ifndef __ASM_SH_CACHE_H
2 #define __ASM_SH_CACHE_H
4 #if defined(CONFIG_SH4) || defined(CONFIG_SH4A)
6 int cache_control(unsigned int cmd);
8 #define L1_CACHE_BYTES 32
9 struct __large_struct { unsigned long buf[100]; };
10 #define __m(x) (*(struct __large_struct *)(x))
12 void dcache_wback_range(u32 start, u32 end)
16 start &= ~(L1_CACHE_BYTES - 1);
17 for (v = start; v < end; v += L1_CACHE_BYTES) {
18 asm volatile ("ocbwb %0" : /* no output */
23 void dcache_invalid_range(u32 start, u32 end)
27 start &= ~(L1_CACHE_BYTES - 1);
28 for (v = start; v < end; v += L1_CACHE_BYTES) {
29 asm volatile ("ocbi %0" : /* no output */
33 #endif /* CONFIG_SH4 || CONFIG_SH4A */
35 #endif /* __ASM_SH_CACHE_H */