2 * Cache operations for the cache instruction.
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
8 * (C) Copyright 1996, 1997 by Ralf Baechle
10 #ifndef __ASM_MIPS_CACHEOPS_H
11 #define __ASM_MIPS_CACHEOPS_H
16 #define Index_Invalidate_I 0x00
17 #define Index_Writeback_Inv_D 0x01
18 #define Index_Invalidate_SI 0x02
19 #define Index_Writeback_Inv_SD 0x03
20 #define Index_Load_Tag_I 0x04
21 #define Index_Load_Tag_D 0x05
22 #define Index_Load_Tag_SI 0x06
23 #define Index_Load_Tag_SD 0x07
24 #define Index_Store_Tag_I 0x08
25 #define Index_Store_Tag_D 0x09
26 #define Index_Store_Tag_SI 0x0A
27 #define Index_Store_Tag_SD 0x0B
28 #define Create_Dirty_Excl_D 0x0d
29 #define Create_Dirty_Excl_SD 0x0f
30 #define Hit_Invalidate_I 0x10
31 #define Hit_Invalidate_D 0x11
32 #define Hit_Invalidate_SI 0x12
33 #define Hit_Invalidate_SD 0x13
35 #define Hit_Writeback_Inv_D 0x15
37 #define Hit_Writeback_Inv_SD 0x17
38 #define Hit_Writeback_I 0x18
39 #define Hit_Writeback_D 0x19
41 #define Hit_Writeback_SD 0x1b
44 #define Hit_Set_Virtual_SI 0x1e
45 #define Hit_Set_Virtual_SD 0x1f
47 #endif /* __ASM_MIPS_CACHEOPS_H */