2 * Copyright (c) 2011 The Chromium OS Authors.
4 * (C) Copyright 2000 - 2002
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 ********************************************************************
23 * NOTE: This header file defines an interface to U-Boot. Including
24 * this (unmodified) header file in another file is considered normal
25 * use of U-Boot, and does *not* fall under the heading of "derived
27 ********************************************************************
30 #ifndef __ASM_GENERIC_U_BOOT_H__
31 #define __ASM_GENERIC_U_BOOT_H__
34 * Board information passed to Linux kernel from U-Boot
36 * include/asm-ppc/u-boot.h
41 typedef struct bd_info {
42 unsigned long bi_memstart; /* start of DRAM memory */
43 phys_size_t bi_memsize; /* size of DRAM memory in bytes */
44 unsigned long bi_flashstart; /* start of FLASH memory */
45 unsigned long bi_flashsize; /* size of FLASH memory */
46 unsigned long bi_flashoffset; /* reserved area for startup monitor */
47 unsigned long bi_sramstart; /* start of SRAM memory */
48 unsigned long bi_sramsize; /* size of SRAM memory */
50 unsigned long bi_arm_freq; /* arm frequency */
51 unsigned long bi_dsp_freq; /* dsp core frequency */
52 unsigned long bi_ddr_freq; /* ddr frequency */
54 #if defined(CONFIG_5xx) || defined(CONFIG_8xx) || defined(CONFIG_8260) \
55 || defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
56 unsigned long bi_immr_base; /* base of IMMR register */
58 #if defined(CONFIG_MPC5xxx)
59 unsigned long bi_mbar_base; /* base of internal registers */
61 #if defined(CONFIG_MPC83xx)
62 unsigned long bi_immrbar;
64 #if defined(CONFIG_MPC8220)
65 unsigned long bi_mbar_base; /* base of internal registers */
66 unsigned long bi_inpfreq; /* Input Freq, In MHz */
67 unsigned long bi_pcifreq; /* PCI Freq, in MHz */
68 unsigned long bi_pevfreq; /* PEV Freq, in MHz */
69 unsigned long bi_flbfreq; /* Flexbus Freq, in MHz */
70 unsigned long bi_vcofreq; /* VCO Freq, in MHz */
72 unsigned long bi_bootflags; /* boot / reboot flag (Unused) */
73 unsigned long bi_ip_addr; /* IP Address */
74 unsigned char bi_enetaddr[6]; /* OLD: see README.enetaddr */
75 unsigned short bi_ethspeed; /* Ethernet speed in Mbps */
76 unsigned long bi_intfreq; /* Internal Freq, in MHz */
77 unsigned long bi_busfreq; /* Bus Freq, in MHz */
78 #if defined(CONFIG_CPM2)
79 unsigned long bi_cpmfreq; /* CPM_CLK Freq, in MHz */
80 unsigned long bi_brgfreq; /* BRG_CLK Freq, in MHz */
81 unsigned long bi_sccfreq; /* SCC_CLK Freq, in MHz */
82 unsigned long bi_vco; /* VCO Out from PLL, in MHz */
84 #if defined(CONFIG_MPC512X)
85 unsigned long bi_ipsfreq; /* IPS Bus Freq, in MHz */
86 #endif /* CONFIG_MPC512X */
87 #if defined(CONFIG_MPC5xxx)
88 unsigned long bi_ipbfreq; /* IPB Bus Freq, in MHz */
89 unsigned long bi_pcifreq; /* PCI Bus Freq, in MHz */
91 unsigned int bi_baudrate; /* Console Baudrate */
92 #if defined(CONFIG_405) || \
93 defined(CONFIG_405GP) || \
94 defined(CONFIG_405CR) || \
95 defined(CONFIG_405EP) || \
96 defined(CONFIG_405EZ) || \
97 defined(CONFIG_405EX) || \
99 unsigned char bi_s_version[4]; /* Version of this structure */
100 unsigned char bi_r_version[32]; /* Version of the ROM (AMCC) */
101 unsigned int bi_procfreq; /* CPU (Internal) Freq, in Hz */
102 unsigned int bi_plb_busfreq; /* PLB Bus speed, in Hz */
103 unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */
104 unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */
106 #if defined(CONFIG_HYMOD)
107 hymod_conf_t bi_hymod_conf; /* hymod configuration information */
110 #ifdef CONFIG_HAS_ETH1
111 unsigned char bi_enet1addr[6]; /* OLD: see README.enetaddr */
113 #ifdef CONFIG_HAS_ETH2
114 unsigned char bi_enet2addr[6]; /* OLD: see README.enetaddr */
116 #ifdef CONFIG_HAS_ETH3
117 unsigned char bi_enet3addr[6]; /* OLD: see README.enetaddr */
119 #ifdef CONFIG_HAS_ETH4
120 unsigned char bi_enet4addr[6]; /* OLD: see README.enetaddr */
122 #ifdef CONFIG_HAS_ETH5
123 unsigned char bi_enet5addr[6]; /* OLD: see README.enetaddr */
126 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
127 defined(CONFIG_405EZ) || defined(CONFIG_440GX) || \
128 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
129 defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
130 defined(CONFIG_460EX) || defined(CONFIG_460GT)
131 unsigned int bi_opbfreq; /* OPB clock in Hz */
132 int bi_iic_fast[2]; /* Use fast i2c mode */
134 #if defined(CONFIG_NX823)
135 unsigned char bi_sernum[8];
137 #if defined(CONFIG_4xx)
138 #if defined(CONFIG_440GX) || \
139 defined(CONFIG_460EX) || defined(CONFIG_460GT)
140 int bi_phynum[4]; /* Determines phy mapping */
141 int bi_phymode[4]; /* Determines phy mode */
142 #elif defined(CONFIG_405EP) || defined(CONFIG_405EX) || defined(CONFIG_440)
143 int bi_phynum[2]; /* Determines phy mapping */
144 int bi_phymode[2]; /* Determines phy mode */
146 int bi_phynum[1]; /* Determines phy mapping */
147 int bi_phymode[1]; /* Determines phy mode */
149 #endif /* defined(CONFIG_4xx) */
150 ulong bi_arch_number; /* unique id for this board */
151 ulong bi_boot_params; /* where this board expects params */
152 #ifdef CONFIG_NR_DRAM_BANKS
153 struct { /* RAM configuration */
156 } bi_dram[CONFIG_NR_DRAM_BANKS];
157 #endif /* CONFIG_NR_DRAM_BANKS */
160 #endif /* __ASSEMBLY__ */
162 #endif /* __ASM_GENERIC_U_BOOT_H__ */