1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
2 /******************************************************************************
4 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec)
6 * Copyright (C) 2000 - 2021, Intel Corp.
8 *****************************************************************************/
13 /*******************************************************************************
15 * Additional ACPI Tables (2)
17 * These tables are not consumed directly by the ACPICA subsystem, but are
18 * included here to support device drivers and the AML disassembler.
20 ******************************************************************************/
23 * Values for description table header signatures for tables defined in this
24 * file. Useful because they make it more difficult to inadvertently type in
25 * the wrong signature.
27 #define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */
28 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */
29 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */
30 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */
31 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */
32 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */
33 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */
34 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */
35 #define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */
36 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */
37 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */
38 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */
39 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */
40 #define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */
41 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */
42 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */
43 #define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */
44 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */
45 #define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */
46 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */
47 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */
48 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */
49 #define ACPI_SIG_NHLT "NHLT" /* Non-HDAudio Link Table */
50 #define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */
53 * All tables must be byte-packed to match the ACPI specification, since
54 * the tables are provided by the system BIOS.
59 * Note: C bitfields are not used for this reason:
61 * "Bitfields are great and easy to read, but unfortunately the C language
62 * does not specify the layout of bitfields in memory, which means they are
63 * essentially useless for dealing with packed data in on-disk formats or
64 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me,
65 * this decision was a design error in C. Ritchie could have picked an order
66 * and stuck with it." Norman Ramsey.
67 * See http://stackoverflow.com/a/1053662/41661
70 /*******************************************************************************
72 * BDAT - BIOS Data ACPI Table
74 * Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5
77 ******************************************************************************/
79 struct acpi_table_bdat {
80 struct acpi_table_header header;
81 struct acpi_generic_address gas;
84 /*******************************************************************************
86 * IORT - IO Remapping Table
88 * Conforms to "IO Remapping Table System Software on ARM Platforms",
89 * Document number: ARM DEN 0049E.b, Feb 2021
91 ******************************************************************************/
93 struct acpi_table_iort {
94 struct acpi_table_header header;
103 struct acpi_iort_node {
113 /* Values for subtable Type above */
115 enum acpi_iort_node_type {
116 ACPI_IORT_NODE_ITS_GROUP = 0x00,
117 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01,
118 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02,
119 ACPI_IORT_NODE_SMMU = 0x03,
120 ACPI_IORT_NODE_SMMU_V3 = 0x04,
121 ACPI_IORT_NODE_PMCG = 0x05,
122 ACPI_IORT_NODE_RMR = 0x06,
125 struct acpi_iort_id_mapping {
126 u32 input_base; /* Lowest value in input range */
127 u32 id_count; /* Number of IDs */
128 u32 output_base; /* Lowest value in output range */
129 u32 output_reference; /* A reference to the output node */
133 /* Masks for Flags field above for IORT subtable */
135 #define ACPI_IORT_ID_SINGLE_MAPPING (1)
137 struct acpi_iort_memory_access {
144 /* Values for cache_coherency field above */
146 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */
147 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */
149 /* Masks for Hints field above */
151 #define ACPI_IORT_HT_TRANSIENT (1)
152 #define ACPI_IORT_HT_WRITE (1<<1)
153 #define ACPI_IORT_HT_READ (1<<2)
154 #define ACPI_IORT_HT_OVERRIDE (1<<3)
156 /* Masks for memory_flags field above */
158 #define ACPI_IORT_MF_COHERENCY (1)
159 #define ACPI_IORT_MF_ATTRIBUTES (1<<1)
162 * IORT node specific subtables
164 struct acpi_iort_its_group {
166 u32 identifiers[1]; /* GIC ITS identifier array */
169 struct acpi_iort_named_component {
171 u64 memory_properties; /* Memory access properties */
172 u8 memory_address_limit; /* Memory address size limit */
173 char device_name[1]; /* Path of namespace object */
176 /* Masks for Flags field above */
178 #define ACPI_IORT_NC_STALL_SUPPORTED (1)
179 #define ACPI_IORT_NC_PASID_BITS (31<<1)
181 struct acpi_iort_root_complex {
182 u64 memory_properties; /* Memory access properties */
184 u32 pci_segment_number;
185 u8 memory_address_limit; /* Memory address size limit */
186 u8 reserved[3]; /* Reserved, must be zero */
189 /* Masks for ats_attribute field above */
191 #define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */
192 #define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */
193 #define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */
195 struct acpi_iort_smmu {
196 u64 base_address; /* SMMU base address */
197 u64 span; /* Length of memory range */
200 u32 global_interrupt_offset;
201 u32 context_interrupt_count;
202 u32 context_interrupt_offset;
203 u32 pmu_interrupt_count;
204 u32 pmu_interrupt_offset;
205 u64 interrupts[1]; /* Interrupt array */
208 /* Values for Model field above */
210 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */
211 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */
212 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */
213 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */
214 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */
215 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium thunder_x SMMUv2 */
217 /* Masks for Flags field above */
219 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1)
220 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1)
222 /* Global interrupt format */
224 struct acpi_iort_smmu_gsi {
228 u32 nsg_cfg_irpt_flags;
231 struct acpi_iort_smmu_v3 {
232 u64 base_address; /* SMMUv3 base address */
242 u32 id_mapping_index;
245 /* Values for Model field above */
247 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */
248 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* hi_silicon Hi161x SMMUv3 */
249 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */
251 /* Masks for Flags field above */
253 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1)
254 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1)
255 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3)
257 struct acpi_iort_pmcg {
258 u64 page0_base_address;
261 u64 page1_base_address;
264 struct acpi_iort_rmr {
270 struct acpi_iort_rmr_desc {
276 /*******************************************************************************
278 * IVRS - I/O Virtualization Reporting Structure
281 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification",
282 * Revision 1.26, February 2009.
284 ******************************************************************************/
286 struct acpi_table_ivrs {
287 struct acpi_table_header header; /* Common ACPI table header */
288 u32 info; /* Common virtualization info */
292 /* Values for Info field above */
294 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */
295 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */
296 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */
298 /* IVRS subtable header */
300 struct acpi_ivrs_header {
301 u8 type; /* Subtable type */
303 u16 length; /* Subtable length */
304 u16 device_id; /* ID of IOMMU */
307 /* Values for subtable Type above */
309 enum acpi_ivrs_type {
310 ACPI_IVRS_TYPE_HARDWARE1 = 0x10,
311 ACPI_IVRS_TYPE_HARDWARE2 = 0x11,
312 ACPI_IVRS_TYPE_HARDWARE3 = 0x40,
313 ACPI_IVRS_TYPE_MEMORY1 = 0x20,
314 ACPI_IVRS_TYPE_MEMORY2 = 0x21,
315 ACPI_IVRS_TYPE_MEMORY3 = 0x22
318 /* Masks for Flags field above for IVHD subtable */
320 #define ACPI_IVHD_TT_ENABLE (1)
321 #define ACPI_IVHD_PASS_PW (1<<1)
322 #define ACPI_IVHD_RES_PASS_PW (1<<2)
323 #define ACPI_IVHD_ISOC (1<<3)
324 #define ACPI_IVHD_IOTLB (1<<4)
326 /* Masks for Flags field above for IVMD subtable */
328 #define ACPI_IVMD_UNITY (1)
329 #define ACPI_IVMD_READ (1<<1)
330 #define ACPI_IVMD_WRITE (1<<2)
331 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3)
334 * IVRS subtables, correspond to Type in struct acpi_ivrs_header
337 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */
339 struct acpi_ivrs_hardware_10 {
340 struct acpi_ivrs_header header;
341 u16 capability_offset; /* Offset for IOMMU control fields */
342 u64 base_address; /* IOMMU control registers */
343 u16 pci_segment_group;
344 u16 info; /* MSI number and unit ID */
345 u32 feature_reporting;
348 /* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */
350 struct acpi_ivrs_hardware_11 {
351 struct acpi_ivrs_header header;
352 u16 capability_offset; /* Offset for IOMMU control fields */
353 u64 base_address; /* IOMMU control registers */
354 u16 pci_segment_group;
355 u16 info; /* MSI number and unit ID */
357 u64 efr_register_image;
361 /* Masks for Info field above */
363 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */
364 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, unit_ID */
367 * Device Entries for IVHD subtable, appear after struct acpi_ivrs_hardware structure.
368 * Upper two bits of the Type field are the (encoded) length of the structure.
369 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries
370 * are reserved for future use but not defined.
372 struct acpi_ivrs_de_header {
378 /* Length of device entry is in the top two bits of Type field above */
380 #define ACPI_IVHD_ENTRY_LENGTH 0xC0
382 /* Values for device entry Type field above */
384 enum acpi_ivrs_device_entry_type {
385 /* 4-byte device entries, all use struct acpi_ivrs_device4 */
387 ACPI_IVRS_TYPE_PAD4 = 0,
388 ACPI_IVRS_TYPE_ALL = 1,
389 ACPI_IVRS_TYPE_SELECT = 2,
390 ACPI_IVRS_TYPE_START = 3,
391 ACPI_IVRS_TYPE_END = 4,
393 /* 8-byte device entries */
395 ACPI_IVRS_TYPE_PAD8 = 64,
396 ACPI_IVRS_TYPE_NOT_USED = 65,
397 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses struct acpi_ivrs_device8a */
398 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses struct acpi_ivrs_device8a */
399 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses struct acpi_ivrs_device8b */
400 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses struct acpi_ivrs_device8b */
401 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses struct acpi_ivrs_device8c */
403 /* Variable-length device entries */
405 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */
408 /* Values for Data field above */
410 #define ACPI_IVHD_INIT_PASS (1)
411 #define ACPI_IVHD_EINT_PASS (1<<1)
412 #define ACPI_IVHD_NMI_PASS (1<<2)
413 #define ACPI_IVHD_SYSTEM_MGMT (3<<4)
414 #define ACPI_IVHD_LINT0_PASS (1<<6)
415 #define ACPI_IVHD_LINT1_PASS (1<<7)
417 /* Types 0-4: 4-byte device entry */
419 struct acpi_ivrs_device4 {
420 struct acpi_ivrs_de_header header;
423 /* Types 66-67: 8-byte device entry */
425 struct acpi_ivrs_device8a {
426 struct acpi_ivrs_de_header header;
432 /* Types 70-71: 8-byte device entry */
434 struct acpi_ivrs_device8b {
435 struct acpi_ivrs_de_header header;
439 /* Values for extended_data above */
441 #define ACPI_IVHD_ATS_DISABLED (1<<31)
443 /* Type 72: 8-byte device entry */
445 struct acpi_ivrs_device8c {
446 struct acpi_ivrs_de_header header;
452 /* Values for Variety field above */
454 #define ACPI_IVHD_IOAPIC 1
455 #define ACPI_IVHD_HPET 2
457 /* Type 240: variable-length device entry */
459 struct acpi_ivrs_device_hid {
460 struct acpi_ivrs_de_header header;
467 /* Values for uid_type above */
469 #define ACPI_IVRS_UID_NOT_PRESENT 0
470 #define ACPI_IVRS_UID_IS_INTEGER 1
471 #define ACPI_IVRS_UID_IS_STRING 2
473 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */
475 struct acpi_ivrs_memory {
476 struct acpi_ivrs_header header;
483 /*******************************************************************************
485 * LPIT - Low Power Idle Table
487 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014.
489 ******************************************************************************/
491 struct acpi_table_lpit {
492 struct acpi_table_header header; /* Common ACPI table header */
495 /* LPIT subtable header */
497 struct acpi_lpit_header {
498 u32 type; /* Subtable type */
499 u32 length; /* Subtable length */
505 /* Values for subtable Type above */
507 enum acpi_lpit_type {
508 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00,
509 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */
512 /* Masks for Flags field above */
514 #define ACPI_LPIT_STATE_DISABLED (1)
515 #define ACPI_LPIT_NO_COUNTER (1<<1)
518 * LPIT subtables, correspond to Type in struct acpi_lpit_header
521 /* 0x00: Native C-state instruction based LPI structure */
523 struct acpi_lpit_native {
524 struct acpi_lpit_header header;
525 struct acpi_generic_address entry_trigger;
528 struct acpi_generic_address residency_counter;
529 u64 counter_frequency;
532 /*******************************************************************************
534 * MADT - Multiple APIC Description Table
537 ******************************************************************************/
539 struct acpi_table_madt {
540 struct acpi_table_header header; /* Common ACPI table header */
541 u32 address; /* Physical address of local APIC */
545 /* Masks for Flags field above */
547 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */
549 /* Values for PCATCompat flag */
551 #define ACPI_MADT_DUAL_PIC 1
552 #define ACPI_MADT_MULTIPLE_APIC 0
554 /* Values for MADT subtable type in struct acpi_subtable_header */
556 enum acpi_madt_type {
557 ACPI_MADT_TYPE_LOCAL_APIC = 0,
558 ACPI_MADT_TYPE_IO_APIC = 1,
559 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2,
560 ACPI_MADT_TYPE_NMI_SOURCE = 3,
561 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4,
562 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5,
563 ACPI_MADT_TYPE_IO_SAPIC = 6,
564 ACPI_MADT_TYPE_LOCAL_SAPIC = 7,
565 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8,
566 ACPI_MADT_TYPE_LOCAL_X2APIC = 9,
567 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10,
568 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11,
569 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12,
570 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13,
571 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14,
572 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15,
573 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16,
574 ACPI_MADT_TYPE_RESERVED = 17 /* 17 and greater are reserved */
578 * MADT Subtables, correspond to Type in struct acpi_subtable_header
581 /* 0: Processor Local APIC */
583 struct acpi_madt_local_apic {
584 struct acpi_subtable_header header;
585 u8 processor_id; /* ACPI processor id */
586 u8 id; /* Processor's local APIC id */
592 struct acpi_madt_io_apic {
593 struct acpi_subtable_header header;
594 u8 id; /* I/O APIC ID */
595 u8 reserved; /* reserved - must be zero */
596 u32 address; /* APIC physical address */
597 u32 global_irq_base; /* Global system interrupt where INTI lines start */
600 /* 2: Interrupt Override */
602 struct acpi_madt_interrupt_override {
603 struct acpi_subtable_header header;
604 u8 bus; /* 0 - ISA */
605 u8 source_irq; /* Interrupt source (IRQ) */
606 u32 global_irq; /* Global system interrupt */
612 struct acpi_madt_nmi_source {
613 struct acpi_subtable_header header;
615 u32 global_irq; /* Global system interrupt */
618 /* 4: Local APIC NMI */
620 struct acpi_madt_local_apic_nmi {
621 struct acpi_subtable_header header;
622 u8 processor_id; /* ACPI processor id */
624 u8 lint; /* LINTn to which NMI is connected */
627 /* 5: Address Override */
629 struct acpi_madt_local_apic_override {
630 struct acpi_subtable_header header;
631 u16 reserved; /* Reserved, must be zero */
632 u64 address; /* APIC physical address */
637 struct acpi_madt_io_sapic {
638 struct acpi_subtable_header header;
639 u8 id; /* I/O SAPIC ID */
640 u8 reserved; /* Reserved, must be zero */
641 u32 global_irq_base; /* Global interrupt for SAPIC start */
642 u64 address; /* SAPIC physical address */
647 struct acpi_madt_local_sapic {
648 struct acpi_subtable_header header;
649 u8 processor_id; /* ACPI processor id */
650 u8 id; /* SAPIC ID */
651 u8 eid; /* SAPIC EID */
652 u8 reserved[3]; /* Reserved, must be zero */
654 u32 uid; /* Numeric UID - ACPI 3.0 */
655 char uid_string[1]; /* String UID - ACPI 3.0 */
658 /* 8: Platform Interrupt Source */
660 struct acpi_madt_interrupt_source {
661 struct acpi_subtable_header header;
663 u8 type; /* 1=PMI, 2=INIT, 3=corrected */
664 u8 id; /* Processor ID */
665 u8 eid; /* Processor EID */
666 u8 io_sapic_vector; /* Vector value for PMI interrupts */
667 u32 global_irq; /* Global system interrupt */
668 u32 flags; /* Interrupt Source Flags */
671 /* Masks for Flags field above */
673 #define ACPI_MADT_CPEI_OVERRIDE (1)
675 /* 9: Processor Local X2APIC (ACPI 4.0) */
677 struct acpi_madt_local_x2apic {
678 struct acpi_subtable_header header;
679 u16 reserved; /* reserved - must be zero */
680 u32 local_apic_id; /* Processor x2APIC ID */
682 u32 uid; /* ACPI processor UID */
685 /* 10: Local X2APIC NMI (ACPI 4.0) */
687 struct acpi_madt_local_x2apic_nmi {
688 struct acpi_subtable_header header;
690 u32 uid; /* ACPI processor UID */
691 u8 lint; /* LINTn to which NMI is connected */
692 u8 reserved[3]; /* reserved - must be zero */
695 /* 11: Generic interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 changes) */
697 struct acpi_madt_generic_interrupt {
698 struct acpi_subtable_header header;
699 u16 reserved; /* reserved - must be zero */
700 u32 cpu_interface_number;
704 u32 performance_interrupt;
707 u64 gicv_base_address;
708 u64 gich_base_address;
710 u64 gicr_base_address;
714 u16 spe_interrupt; /* ACPI 6.3 */
717 /* Masks for Flags field above */
719 /* ACPI_MADT_ENABLED (1) Processor is usable if set */
720 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */
721 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */
723 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */
725 struct acpi_madt_generic_distributor {
726 struct acpi_subtable_header header;
727 u16 reserved; /* reserved - must be zero */
732 u8 reserved2[3]; /* reserved - must be zero */
735 /* Values for Version field above */
737 enum acpi_madt_gic_version {
738 ACPI_MADT_GIC_VERSION_NONE = 0,
739 ACPI_MADT_GIC_VERSION_V1 = 1,
740 ACPI_MADT_GIC_VERSION_V2 = 2,
741 ACPI_MADT_GIC_VERSION_V3 = 3,
742 ACPI_MADT_GIC_VERSION_V4 = 4,
743 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */
746 /* 13: Generic MSI Frame (ACPI 5.1) */
748 struct acpi_madt_generic_msi_frame {
749 struct acpi_subtable_header header;
750 u16 reserved; /* reserved - must be zero */
758 /* Masks for Flags field above */
760 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1)
762 /* 14: Generic Redistributor (ACPI 5.1) */
764 struct acpi_madt_generic_redistributor {
765 struct acpi_subtable_header header;
766 u16 reserved; /* reserved - must be zero */
771 /* 15: Generic Translator (ACPI 6.0) */
773 struct acpi_madt_generic_translator {
774 struct acpi_subtable_header header;
775 u16 reserved; /* reserved - must be zero */
781 /* 16: Multiprocessor wakeup (ACPI 6.4) */
783 struct acpi_madt_multiproc_wakeup {
784 struct acpi_subtable_header header;
786 u32 reserved; /* reserved - must be zero */
790 #define ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE 2032
791 #define ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE 2048
793 struct acpi_madt_multiproc_wakeup_mailbox {
795 u16 reserved; /* reserved - must be zero */
798 u8 reserved_os[ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE]; /* reserved for OS use */
799 u8 reserved_firmware[ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE]; /* reserved for firmware use */
802 #define ACPI_MP_WAKE_COMMAND_WAKEUP 1
805 * Common flags fields for MADT subtables
808 /* MADT Local APIC flags */
810 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */
812 /* MADT MPS INTI flags (inti_flags) */
814 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */
815 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */
817 /* Values for MPS INTI flags */
819 #define ACPI_MADT_POLARITY_CONFORMS 0
820 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1
821 #define ACPI_MADT_POLARITY_RESERVED 2
822 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3
824 #define ACPI_MADT_TRIGGER_CONFORMS (0)
825 #define ACPI_MADT_TRIGGER_EDGE (1<<2)
826 #define ACPI_MADT_TRIGGER_RESERVED (2<<2)
827 #define ACPI_MADT_TRIGGER_LEVEL (3<<2)
829 /*******************************************************************************
831 * MCFG - PCI Memory Mapped Configuration table and subtable
834 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005
836 ******************************************************************************/
838 struct acpi_table_mcfg {
839 struct acpi_table_header header; /* Common ACPI table header */
845 struct acpi_mcfg_allocation {
846 u64 address; /* Base address, processor-relative */
847 u16 pci_segment; /* PCI segment group number */
848 u8 start_bus_number; /* Starting PCI Bus number */
849 u8 end_bus_number; /* Final PCI Bus number */
853 /*******************************************************************************
855 * MCHI - Management Controller Host Interface Table
858 * Conforms to "Management Component Transport Protocol (MCTP) Host
859 * Interface Specification", Revision 1.0.0a, October 13, 2009
861 ******************************************************************************/
863 struct acpi_table_mchi {
864 struct acpi_table_header header; /* Common ACPI table header */
871 u32 global_interrupt;
872 struct acpi_generic_address control_register;
879 /*******************************************************************************
881 * MPST - Memory Power State Table (ACPI 5.0)
884 ******************************************************************************/
886 #define ACPI_MPST_CHANNEL_INFO \
889 u16 power_node_count; \
894 struct acpi_table_mpst {
895 struct acpi_table_header header; /* Common ACPI table header */
896 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
899 /* Memory Platform Communication Channel Info */
901 struct acpi_mpst_channel {
902 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
905 /* Memory Power Node Structure */
907 struct acpi_mpst_power_node {
914 u32 num_power_states;
915 u32 num_physical_components;
918 /* Values for Flags field above */
920 #define ACPI_MPST_ENABLED 1
921 #define ACPI_MPST_POWER_MANAGED 2
922 #define ACPI_MPST_HOT_PLUG_CAPABLE 4
924 /* Memory Power State Structure (follows POWER_NODE above) */
926 struct acpi_mpst_power_state {
931 /* Physical Component ID Structure (follows POWER_STATE above) */
933 struct acpi_mpst_component {
937 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */
939 struct acpi_mpst_data_hdr {
940 u16 characteristics_count;
944 struct acpi_mpst_power_data {
954 /* Values for Flags field above */
956 #define ACPI_MPST_PRESERVE 1
957 #define ACPI_MPST_AUTOENTRY 2
958 #define ACPI_MPST_AUTOEXIT 4
960 /* Shared Memory Region (not part of an ACPI table) */
962 struct acpi_mpst_shared {
966 u32 command_register;
974 /*******************************************************************************
976 * MSCT - Maximum System Characteristics Table (ACPI 4.0)
979 ******************************************************************************/
981 struct acpi_table_msct {
982 struct acpi_table_header header; /* Common ACPI table header */
983 u32 proximity_offset; /* Location of proximity info struct(s) */
984 u32 max_proximity_domains; /* Max number of proximity domains */
985 u32 max_clock_domains; /* Max number of clock domains */
986 u64 max_address; /* Max physical address in system */
989 /* subtable - Maximum Proximity Domain Information. Version 1 */
991 struct acpi_msct_proximity {
994 u32 range_start; /* Start of domain range */
995 u32 range_end; /* End of domain range */
996 u32 processor_capacity;
997 u64 memory_capacity; /* In bytes */
1000 /*******************************************************************************
1002 * MSDM - Microsoft Data Management table
1004 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)",
1005 * November 29, 2011. Copyright 2011 Microsoft
1007 ******************************************************************************/
1009 /* Basic MSDM table is only the common ACPI header */
1011 struct acpi_table_msdm {
1012 struct acpi_table_header header; /* Common ACPI table header */
1015 /*******************************************************************************
1017 * NFIT - NVDIMM Interface Table (ACPI 6.0+)
1020 ******************************************************************************/
1022 struct acpi_table_nfit {
1023 struct acpi_table_header header; /* Common ACPI table header */
1024 u32 reserved; /* Reserved, must be zero */
1027 /* Subtable header for NFIT */
1029 struct acpi_nfit_header {
1034 /* Values for subtable type in struct acpi_nfit_header */
1036 enum acpi_nfit_type {
1037 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0,
1038 ACPI_NFIT_TYPE_MEMORY_MAP = 1,
1039 ACPI_NFIT_TYPE_INTERLEAVE = 2,
1040 ACPI_NFIT_TYPE_SMBIOS = 3,
1041 ACPI_NFIT_TYPE_CONTROL_REGION = 4,
1042 ACPI_NFIT_TYPE_DATA_REGION = 5,
1043 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6,
1044 ACPI_NFIT_TYPE_CAPABILITIES = 7,
1045 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */
1052 /* 0: System Physical Address Range Structure */
1054 struct acpi_nfit_system_address {
1055 struct acpi_nfit_header header;
1058 u32 reserved; /* Reserved, must be zero */
1059 u32 proximity_domain;
1064 u64 location_cookie; /* ACPI 6.4 */
1069 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */
1070 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */
1071 #define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */
1073 /* Range Type GUIDs appear in the include/acuuid.h file */
1075 /* 1: Memory Device to System Address Range Map Structure */
1077 struct acpi_nfit_memory_map {
1078 struct acpi_nfit_header header;
1087 u16 interleave_index;
1088 u16 interleave_ways;
1090 u16 reserved; /* Reserved, must be zero */
1095 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */
1096 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */
1097 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */
1098 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */
1099 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */
1100 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */
1101 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */
1103 /* 2: Interleave Structure */
1105 struct acpi_nfit_interleave {
1106 struct acpi_nfit_header header;
1107 u16 interleave_index;
1108 u16 reserved; /* Reserved, must be zero */
1111 u32 line_offset[1]; /* Variable length */
1114 /* 3: SMBIOS Management Information Structure */
1116 struct acpi_nfit_smbios {
1117 struct acpi_nfit_header header;
1118 u32 reserved; /* Reserved, must be zero */
1119 u8 data[1]; /* Variable length */
1122 /* 4: NVDIMM Control Region Structure */
1124 struct acpi_nfit_control_region {
1125 struct acpi_nfit_header header;
1130 u16 subsystem_vendor_id;
1131 u16 subsystem_device_id;
1132 u16 subsystem_revision_id;
1134 u8 manufacturing_location;
1135 u16 manufacturing_date;
1136 u8 reserved[2]; /* Reserved, must be zero */
1146 u8 reserved1[6]; /* Reserved, must be zero */
1151 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */
1153 /* valid_fields bits */
1155 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */
1157 /* 5: NVDIMM Block Data Window Region Structure */
1159 struct acpi_nfit_data_region {
1160 struct acpi_nfit_header header;
1169 /* 6: Flush Hint Address Structure */
1171 struct acpi_nfit_flush_address {
1172 struct acpi_nfit_header header;
1175 u8 reserved[6]; /* Reserved, must be zero */
1176 u64 hint_address[1]; /* Variable length */
1179 /* 7: Platform Capabilities Structure */
1181 struct acpi_nfit_capabilities {
1182 struct acpi_nfit_header header;
1183 u8 highest_capability;
1184 u8 reserved[3]; /* Reserved, must be zero */
1189 /* Capabilities Flags */
1191 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */
1192 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */
1193 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */
1196 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM
1198 struct nfit_device_handle {
1202 /* Device handle construction and extraction macros */
1204 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F
1205 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0
1206 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00
1207 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000
1208 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000
1210 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0
1211 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4
1212 #define ACPI_NFIT_MEMORY_ID_OFFSET 8
1213 #define ACPI_NFIT_SOCKET_ID_OFFSET 12
1214 #define ACPI_NFIT_NODE_ID_OFFSET 16
1216 /* Macro to construct a NFIT/NVDIMM device handle */
1218 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \
1220 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \
1221 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \
1222 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \
1223 ((node) << ACPI_NFIT_NODE_ID_OFFSET))
1225 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */
1227 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \
1228 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK)
1230 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \
1231 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET)
1233 #define ACPI_NFIT_GET_MEMORY_ID(handle) \
1234 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET)
1236 #define ACPI_NFIT_GET_SOCKET_ID(handle) \
1237 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET)
1239 #define ACPI_NFIT_GET_NODE_ID(handle) \
1240 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET)
1242 /*******************************************************************************
1244 * PCCT - Platform Communications Channel Table (ACPI 5.0)
1245 * Version 2 (ACPI 6.2)
1247 ******************************************************************************/
1249 struct acpi_table_pcct {
1250 struct acpi_table_header header; /* Common ACPI table header */
1255 /* Values for Flags field above */
1257 #define ACPI_PCCT_DOORBELL 1
1259 /* Values for subtable type in struct acpi_subtable_header */
1261 enum acpi_pcct_type {
1262 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0,
1263 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1,
1264 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */
1265 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */
1266 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */
1267 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */
1268 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */
1272 * PCCT Subtables, correspond to Type in struct acpi_subtable_header
1275 /* 0: Generic Communications Subspace */
1277 struct acpi_pcct_subspace {
1278 struct acpi_subtable_header header;
1282 struct acpi_generic_address doorbell_register;
1286 u32 max_access_rate;
1287 u16 min_turnaround_time;
1290 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */
1292 struct acpi_pcct_hw_reduced {
1293 struct acpi_subtable_header header;
1294 u32 platform_interrupt;
1299 struct acpi_generic_address doorbell_register;
1303 u32 max_access_rate;
1304 u16 min_turnaround_time;
1307 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */
1309 struct acpi_pcct_hw_reduced_type2 {
1310 struct acpi_subtable_header header;
1311 u32 platform_interrupt;
1316 struct acpi_generic_address doorbell_register;
1320 u32 max_access_rate;
1321 u16 min_turnaround_time;
1322 struct acpi_generic_address platform_ack_register;
1323 u64 ack_preserve_mask;
1327 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */
1329 struct acpi_pcct_ext_pcc_master {
1330 struct acpi_subtable_header header;
1331 u32 platform_interrupt;
1336 struct acpi_generic_address doorbell_register;
1340 u32 max_access_rate;
1341 u32 min_turnaround_time;
1342 struct acpi_generic_address platform_ack_register;
1343 u64 ack_preserve_mask;
1346 struct acpi_generic_address cmd_complete_register;
1347 u64 cmd_complete_mask;
1348 struct acpi_generic_address cmd_update_register;
1349 u64 cmd_update_preserve_mask;
1350 u64 cmd_update_set_mask;
1351 struct acpi_generic_address error_status_register;
1352 u64 error_status_mask;
1355 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */
1357 struct acpi_pcct_ext_pcc_slave {
1358 struct acpi_subtable_header header;
1359 u32 platform_interrupt;
1364 struct acpi_generic_address doorbell_register;
1368 u32 max_access_rate;
1369 u32 min_turnaround_time;
1370 struct acpi_generic_address platform_ack_register;
1371 u64 ack_preserve_mask;
1374 struct acpi_generic_address cmd_complete_register;
1375 u64 cmd_complete_mask;
1376 struct acpi_generic_address cmd_update_register;
1377 u64 cmd_update_preserve_mask;
1378 u64 cmd_update_set_mask;
1379 struct acpi_generic_address error_status_register;
1380 u64 error_status_mask;
1383 /* 5: HW Registers based Communications Subspace */
1385 struct acpi_pcct_hw_reg {
1386 struct acpi_subtable_header header;
1390 struct acpi_generic_address doorbell_register;
1391 u64 doorbell_preserve;
1393 struct acpi_generic_address cmd_complete_register;
1394 u64 cmd_complete_mask;
1395 struct acpi_generic_address error_status_register;
1396 u64 error_status_mask;
1397 u32 nominal_latency;
1398 u32 min_turnaround_time;
1401 /* Values for doorbell flags above */
1403 #define ACPI_PCCT_INTERRUPT_POLARITY (1)
1404 #define ACPI_PCCT_INTERRUPT_MODE (1<<1)
1407 * PCC memory structures (not part of the ACPI table)
1410 /* Shared Memory Region */
1412 struct acpi_pcct_shared_memory {
1418 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */
1420 struct acpi_pcct_ext_pcc_shared_memory {
1427 /*******************************************************************************
1429 * PDTT - Platform Debug Trigger Table (ACPI 6.2)
1432 ******************************************************************************/
1434 struct acpi_table_pdtt {
1435 struct acpi_table_header header; /* Common ACPI table header */
1442 * PDTT Communication Channel Identifier Structure.
1443 * The number of these structures is defined by trigger_count above,
1444 * starting at array_offset.
1446 struct acpi_pdtt_channel {
1451 /* Flags for above */
1453 #define ACPI_PDTT_RUNTIME_TRIGGER (1)
1454 #define ACPI_PDTT_WAIT_COMPLETION (1<<1)
1455 #define ACPI_PDTT_TRIGGER_ORDER (1<<2)
1457 /*******************************************************************************
1459 * PHAT - Platform Health Assessment Table (ACPI 6.4)
1462 ******************************************************************************/
1464 struct acpi_table_phat {
1465 struct acpi_table_header header; /* Common ACPI table header */
1468 /* Common header for PHAT subtables that follow main table */
1470 struct acpi_phat_header {
1476 /* Values for Type field above */
1478 #define ACPI_PHAT_TYPE_FW_VERSION_DATA 0
1479 #define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1
1480 #define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */
1483 * PHAT subtables, correspond to Type in struct acpi_phat_header
1486 /* 0: Firmware Version Data Record */
1488 struct acpi_phat_version_data {
1489 struct acpi_phat_header header;
1494 struct acpi_phat_version_element {
1500 /* 1: Firmware Health Data Record */
1502 struct acpi_phat_health_data {
1503 struct acpi_phat_header header;
1507 u32 device_specific_offset; /* Zero if no Device-specific data */
1510 /* Values for Health field above */
1512 #define ACPI_PHAT_ERRORS_FOUND 0
1513 #define ACPI_PHAT_NO_ERRORS 1
1514 #define ACPI_PHAT_UNKNOWN_ERRORS 2
1515 #define ACPI_PHAT_ADVISORY 3
1517 /*******************************************************************************
1519 * PMTT - Platform Memory Topology Table (ACPI 5.0)
1522 ******************************************************************************/
1524 struct acpi_table_pmtt {
1525 struct acpi_table_header header; /* Common ACPI table header */
1526 u32 memory_device_count;
1528 * Immediately followed by:
1529 * MEMORY_DEVICE memory_device_struct[memory_device_count];
1533 /* Common header for PMTT subtables that follow main table */
1535 struct acpi_pmtt_header {
1541 u32 memory_device_count; /* Zero means no memory device structs follow */
1543 * Immediately followed by:
1544 * u8 type_specific_data[]
1545 * MEMORY_DEVICE memory_device_struct[memory_device_count];
1549 /* Values for Type field above */
1551 #define ACPI_PMTT_TYPE_SOCKET 0
1552 #define ACPI_PMTT_TYPE_CONTROLLER 1
1553 #define ACPI_PMTT_TYPE_DIMM 2
1554 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */
1555 #define ACPI_PMTT_TYPE_VENDOR 0xFF
1557 /* Values for Flags field above */
1559 #define ACPI_PMTT_TOP_LEVEL 0x0001
1560 #define ACPI_PMTT_PHYSICAL 0x0002
1561 #define ACPI_PMTT_MEMORY_TYPE 0x000C
1564 * PMTT subtables, correspond to Type in struct acpi_pmtt_header
1567 /* 0: Socket Structure */
1569 struct acpi_pmtt_socket {
1570 struct acpi_pmtt_header header;
1575 * Immediately followed by:
1576 * MEMORY_DEVICE memory_device_struct[memory_device_count];
1579 /* 1: Memory Controller subtable */
1581 struct acpi_pmtt_controller {
1582 struct acpi_pmtt_header header;
1587 * Immediately followed by:
1588 * MEMORY_DEVICE memory_device_struct[memory_device_count];
1591 /* 2: Physical Component Identifier (DIMM) */
1593 struct acpi_pmtt_physical_component {
1594 struct acpi_pmtt_header header;
1598 /* 0xFF: Vendor Specific Data */
1600 struct acpi_pmtt_vendor_specific {
1601 struct acpi_pmtt_header header;
1605 * Immediately followed by:
1606 * u8 vendor_specific_data[];
1607 * MEMORY_DEVICE memory_device_struct[memory_device_count];
1611 /*******************************************************************************
1613 * PPTT - Processor Properties Topology Table (ACPI 6.2)
1616 ******************************************************************************/
1618 struct acpi_table_pptt {
1619 struct acpi_table_header header; /* Common ACPI table header */
1622 /* Values for Type field above */
1624 enum acpi_pptt_type {
1625 ACPI_PPTT_TYPE_PROCESSOR = 0,
1626 ACPI_PPTT_TYPE_CACHE = 1,
1627 ACPI_PPTT_TYPE_ID = 2,
1628 ACPI_PPTT_TYPE_RESERVED = 3
1631 /* 0: Processor Hierarchy Node Structure */
1633 struct acpi_pptt_processor {
1634 struct acpi_subtable_header header;
1638 u32 acpi_processor_id;
1639 u32 number_of_priv_resources;
1644 #define ACPI_PPTT_PHYSICAL_PACKAGE (1)
1645 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1)
1646 #define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */
1647 #define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */
1648 #define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */
1650 /* 1: Cache Type Structure */
1652 struct acpi_pptt_cache {
1653 struct acpi_subtable_header header;
1656 u32 next_level_of_cache;
1664 /* 1: Cache Type Structure for PPTT version 3 */
1666 struct acpi_pptt_cache_v1 {
1672 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */
1673 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */
1674 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */
1675 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */
1676 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */
1677 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */
1678 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */
1679 #define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */
1681 /* Masks for Attributes */
1683 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */
1684 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */
1685 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */
1687 /* Attributes describing cache */
1688 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */
1689 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */
1690 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */
1691 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */
1693 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */
1694 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */
1695 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */
1696 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */
1698 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */
1699 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */
1701 /* 2: ID Structure */
1703 struct acpi_pptt_id {
1704 struct acpi_subtable_header header;
1714 /*******************************************************************************
1716 * PRMT - Platform Runtime Mechanism Table
1719 ******************************************************************************/
1721 struct acpi_table_prmt {
1722 struct acpi_table_header header; /* Common ACPI table header */
1725 struct acpi_table_prmt_header {
1726 u8 platform_guid[16];
1727 u32 module_info_offset;
1728 u32 module_info_count;
1731 struct acpi_prmt_module_info {
1737 u16 handler_info_count;
1738 u32 handler_info_offset;
1739 u64 mmio_list_pointer;
1742 struct acpi_prmt_handler_info {
1745 u8 handler_guid[16];
1746 u64 handler_address;
1747 u64 static_data_buffer_address;
1748 u64 acpi_param_buffer_address;
1751 /*******************************************************************************
1753 * RASF - RAS Feature Table (ACPI 5.0)
1756 ******************************************************************************/
1758 struct acpi_table_rasf {
1759 struct acpi_table_header header; /* Common ACPI table header */
1763 /* RASF Platform Communication Channel Shared Memory Region */
1765 struct acpi_rasf_shared_memory {
1770 u8 capabilities[16];
1771 u8 set_capabilities[16];
1772 u16 num_parameter_blocks;
1773 u32 set_capabilities_status;
1776 /* RASF Parameter Block Structure Header */
1778 struct acpi_rasf_parameter_block {
1784 /* RASF Parameter Block Structure for PATROL_SCRUB */
1786 struct acpi_rasf_patrol_scrub_parameter {
1787 struct acpi_rasf_parameter_block header;
1788 u16 patrol_scrub_command;
1789 u64 requested_address_range[2];
1790 u64 actual_address_range[2];
1795 /* Masks for Flags and Speed fields above */
1797 #define ACPI_RASF_SCRUBBER_RUNNING 1
1798 #define ACPI_RASF_SPEED (7<<1)
1799 #define ACPI_RASF_SPEED_SLOW (0<<1)
1800 #define ACPI_RASF_SPEED_MEDIUM (4<<1)
1801 #define ACPI_RASF_SPEED_FAST (7<<1)
1803 /* Channel Commands */
1805 enum acpi_rasf_commands {
1806 ACPI_RASF_EXECUTE_RASF_COMMAND = 1
1809 /* Platform RAS Capabilities */
1811 enum acpi_rasf_capabiliities {
1812 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0,
1813 ACPI_SW_PATROL_SCRUB_EXPOSED = 1
1816 /* Patrol Scrub Commands */
1818 enum acpi_rasf_patrol_scrub_commands {
1819 ACPI_RASF_GET_PATROL_PARAMETERS = 1,
1820 ACPI_RASF_START_PATROL_SCRUBBER = 2,
1821 ACPI_RASF_STOP_PATROL_SCRUBBER = 3
1824 /* Channel Command flags */
1826 #define ACPI_RASF_GENERATE_SCI (1<<15)
1830 enum acpi_rasf_status {
1831 ACPI_RASF_SUCCESS = 0,
1832 ACPI_RASF_NOT_VALID = 1,
1833 ACPI_RASF_NOT_SUPPORTED = 2,
1835 ACPI_RASF_FAILED = 4,
1836 ACPI_RASF_ABORTED = 5,
1837 ACPI_RASF_INVALID_DATA = 6
1842 #define ACPI_RASF_COMMAND_COMPLETE (1)
1843 #define ACPI_RASF_SCI_DOORBELL (1<<1)
1844 #define ACPI_RASF_ERROR (1<<2)
1845 #define ACPI_RASF_STATUS (0x1F<<3)
1847 /*******************************************************************************
1849 * RGRT - Regulatory Graphics Resource Table
1852 * Conforms to "ACPI RGRT" available at:
1853 * https://microsoft.github.io/mu/dyn/mu_plus/ms_core_pkg/acpi_RGRT/feature_acpi_rgrt/
1855 ******************************************************************************/
1857 struct acpi_table_rgrt {
1858 struct acpi_table_header header; /* Common ACPI table header */
1865 /* image_type values */
1867 enum acpi_rgrt_image_type {
1868 ACPI_RGRT_TYPE_RESERVED0 = 0,
1869 ACPI_RGRT_IMAGE_TYPE_PNG = 1,
1870 ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */
1873 /*******************************************************************************
1875 * SBST - Smart Battery Specification Table
1878 ******************************************************************************/
1880 struct acpi_table_sbst {
1881 struct acpi_table_header header; /* Common ACPI table header */
1887 /*******************************************************************************
1889 * SDEI - Software Delegated Exception Interface Descriptor Table
1891 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A,
1892 * May 8th, 2017. Copyright 2017 ARM Ltd.
1894 ******************************************************************************/
1896 struct acpi_table_sdei {
1897 struct acpi_table_header header; /* Common ACPI table header */
1900 /*******************************************************************************
1902 * SDEV - Secure Devices Table (ACPI 6.2)
1905 ******************************************************************************/
1907 struct acpi_table_sdev {
1908 struct acpi_table_header header; /* Common ACPI table header */
1911 struct acpi_sdev_header {
1917 /* Values for subtable type above */
1919 enum acpi_sdev_type {
1920 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0,
1921 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1,
1922 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */
1925 /* Values for flags above */
1927 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1)
1928 #define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1)
1934 /* 0: Namespace Device Based Secure Device Structure */
1936 struct acpi_sdev_namespace {
1937 struct acpi_sdev_header header;
1938 u16 device_id_offset;
1939 u16 device_id_length;
1940 u16 vendor_data_offset;
1941 u16 vendor_data_length;
1944 struct acpi_sdev_secure_component {
1945 u16 secure_component_offset;
1946 u16 secure_component_length;
1950 * SDEV sub-subtables ("Components") for above
1952 struct acpi_sdev_component {
1953 struct acpi_sdev_header header;
1956 /* Values for sub-subtable type above */
1958 enum acpi_sac_type {
1959 ACPI_SDEV_TYPE_ID_COMPONENT = 0,
1960 ACPI_SDEV_TYPE_MEM_COMPONENT = 1
1963 struct acpi_sdev_id_component {
1964 struct acpi_sdev_header header;
1965 u16 hardware_id_offset;
1966 u16 hardware_id_length;
1967 u16 subsystem_id_offset;
1968 u16 subsystem_id_length;
1969 u16 hardware_revision;
1970 u8 hardware_rev_present;
1971 u8 class_code_present;
1974 u8 pci_programming_xface;
1977 struct acpi_sdev_mem_component {
1978 struct acpi_sdev_header header;
1980 u64 memory_base_address;
1984 /* 1: PCIe Endpoint Device Based Device Structure */
1986 struct acpi_sdev_pcie {
1987 struct acpi_sdev_header header;
1992 u16 vendor_data_offset;
1993 u16 vendor_data_length;
1996 /* 1a: PCIe Endpoint path entry */
1998 struct acpi_sdev_pcie_path {
2003 /*******************************************************************************
2005 * SVKL - Storage Volume Key Location Table (ACPI 6.4)
2006 * From: "Guest-Host-Communication Interface (GHCI) for Intel
2007 * Trust Domain Extensions (Intel TDX)".
2010 ******************************************************************************/
2012 struct acpi_table_svkl {
2013 struct acpi_table_header header; /* Common ACPI table header */
2017 struct acpi_svkl_key {
2024 enum acpi_svkl_type {
2025 ACPI_SVKL_TYPE_MAIN_STORAGE = 0,
2026 ACPI_SVKL_TYPE_RESERVED = 1 /* 1 and greater are reserved */
2029 enum acpi_svkl_format {
2030 ACPI_SVKL_FORMAT_RAW_BINARY = 0,
2031 ACPI_SVKL_FORMAT_RESERVED = 1 /* 1 and greater are reserved */
2034 /* Reset to default packing */
2038 #endif /* __ACTBL2_H__ */