[MIPS] Add load-link, store-conditional paired instructions
[external/binutils.git] / include / ChangeLog
1 2019-04-26  Andrew Bennett  <andrew.bennett@imgtec.com>
2             Faraz Shahbazker  <fshahbazker@wavecomp.com>
3
4         * opcode/mips.h (M_LLWP_AB, M_LLDP_AB): New enum values.
5         (M_SCWP_AB, M_SCDP_AB): Likewise.
6
7 2019-04-25  Maciej W. Rozycki  <macro@linux-mips.org>
8
9         * opcode/mips.h: Update comment for MIPS32 CODE20 operand.
10
11 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
12
13         * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF12.
14
15 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
16
17         * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF18.
18
19 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
20
21         * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF16.
22
23 2019-04-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>
24
25         * elf/arm.h (TAG_CPU_ARCH_V8_1M_MAIN): new macro.
26         (MAX_TAG_CPU_ARCH): Set value to above macro.
27         * opcode/arm.h (ARM_EXT2_V8_1M_MAIN): New macro.
28         (ARM_AEXT_V8_1M_MAIN): Likewise.
29         (ARM_AEXT2_V8_1M_MAIN): Likewise.
30         (ARM_ARCH_V8_1M_MAIN): Likewise.
31
32 2019-04-11  Sudakshina Das  <sudi.das@arm.com>
33
34         * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_Rt_SP.
35
36 2019-04-08  H.J. Lu  <hongjiu.lu@intel.com>
37
38         * elf/common.h (GNU_PROPERTY_X86_ISA_1_AVX512_BF16): New.
39
40 2019-04-07  Alan Modra  <amodra@gmail.com>
41
42         Merge from gcc.
43         2019-04-03  Vineet Gupta  <vgupta@synopsys.com>
44         PR89877
45         * longlong.h [__arc__] (add_ssaaaa): Add cc clobber.
46         (sub_ddmmss): Likewise.
47
48 2019-04-06  H.J. Lu  <hongjiu.lu@intel.com>
49
50         * bfdlink.h (bfd_link_info): Remove x86-specific linker options.
51
52 2019-04-01  Andre Vieira  <andre.simoesdiasvieira@arm.com>
53
54         * opcode/arm.h (FPU_NEON_ARMV8_1): New.
55         (FPU_ARCH_NEON_VFP_ARMV8_1): Use FPU_NEON_ARMV8_1.
56         (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1): Likewise.
57         (FPU_ARCH_DOTPROD_NEON_VFP_ARMV8): Likewise.
58         (FPU_ARCH_NEON_VFP_ARMV8_2_FP16): New.
59         (FPU_ARCH_NEON_VFP_ARMV8_2_FP16FML): New.
60         (FPU_ARCH_NEON_VFP_ARMV8_4_FP16FML): New.
61         (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_4): New.
62
63 2019-03-28  Alan Modra  <amodra@gmail.com>
64
65         PR 24390
66         * opcode/ppc.h (PPC_OPERAND_CR_REG): Comment.
67
68 2019-03-25  Tamar Christina  <tamar.christina@arm.com>
69
70         * dis-asm.h (struct disassemble_info): Add stop_offset.
71
72 2019-03-13  Sudakshina Das  <sudi.das@arm.com>
73
74         * elf/aarch64.h (DT_AARCH64_PAC_PLT): New.
75
76 2019-03-13  Sudakshina Das  <sudi.das@arm.com>
77             Szabolcs Nagy  <szabolcs.nagy@arm.com>
78
79         * elf/aarch64.h (DT_AARCH64_BTI_PLT): New.
80
81 2019-03-13  Sudakshina Das  <sudi.das@arm.com>
82
83         * elf/common.h (GNU_PROPERTY_AARCH64_FEATURE_1_AND): New.
84         (GNU_PROPERTY_AARCH64_FEATURE_1_BTI): New.
85         (GNU_PROPERTY_AARCH64_FEATURE_1_PAC): New.
86
87 2019-02-20  Alan Hayward  <alan.hayward@arm.com>
88
89         * elf/common.h (NT_ARM_PAC_MASK): Add define.
90
91 2019-02-15  Saagar Jha  <saagar@saagarjha.com>
92
93         * mach-o/loader.h: Use new OS names in comments.
94
95 2019-02-11  Philippe Waroquiers  <philippe.waroquiers@skynet.be>
96
97         * splay-tree.h (splay_tree_delete_key_fn): Update comment.
98         (splay_tree_delete_value_fn): Likewise.
99
100 2019-01-31  Andreas Krebbel  <krebbel@linux.ibm.com>
101
102         * opcode/s390.h (enum s390_opcode_cpu_val): Add
103         S390_OPCODE_ARCH13.
104
105 2019-01-25  Sudakshina Das  <sudi.das@arm.com>
106             Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
107
108         * opcode/aarch64.h (enum aarch64_opnd): Remove
109         AARCH64_OPND_ADDR_SIMPLE_2.
110         (enum aarch64_insn_class): Remove ldstgv_indexed.
111
112 2019-01-22  Tom Tromey  <tom@tromey.com>
113
114         * coff/ecoff.h: Include coff/sym.h.
115
116 2018-06-24  Nick Clifton  <nickc@redhat.com>
117
118         2.32 branch created.
119
120 2019-01-16  Kito Cheng  <kito@andestech.com>
121
122         * elf/riscv.h (SHT_RISCV_ATTRIBUTES): Define.
123         (Tag_RISCV_arch): Likewise.
124         (Tag_RISCV_priv_spec): Likewise.
125         (Tag_RISCV_priv_spec_minor): Likewise.
126         (Tag_RISCV_priv_spec_revision): Likewise.
127         (Tag_RISCV_unaligned_access): Likewise.
128         (Tag_RISCV_stack_align): Likewise.
129
130 2019-01-14  Pavel I. Kryukov  <kryukov@frtk.ru>
131
132         * dis-asm.h: include <string.h>
133
134 2019-01-10  Nick Clifton  <nickc@redhat.com>
135
136         * Merge from GCC:
137         2018-12-22  Jason Merrill  <jason@redhat.com>
138
139         * demangle.h: Remove support for ancient GNU (pre-3.0), Lucid,
140         ARM, HP, and EDG demangling styles.
141
142 2019-01-09  Sandra Loosemore  <sandra@codesourcery.com>
143
144         Merge from GCC:
145         PR other/16615
146
147         * libiberty.h: Mechanically replace "can not" with "cannot".
148         * plugin-api.h: Likewise.
149
150 2018-12-25  Yoshinori Sato <ysato@users.sourceforge.jp>
151
152         * elf/rx.h (EF_RX_CPU_MASK): Update new bits.
153         (E_FLAG_RX_V3): New RXv3 type.
154         * opcode/rx.h (RX_Size): Add double size.
155         (RX_Operand_Type): Add double FPU registers.
156         (RX_Opcode_ID): Add new instuctions.
157
158 2019-01-01  Alan Modra  <amodra@gmail.com>
159
160         Update year range in copyright notice of all files.
161
162 For older changes see ChangeLog-2018
163 \f
164 Copyright (C) 2019 Free Software Foundation, Inc.
165
166 Copying and distribution of this file, with or without modification,
167 are permitted in any medium without royalty provided the copyright
168 notice and this notice are preserved.
169
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