1 2018-10-03 Tamar Christina <tamar.christina@arm.com>
3 * opcode/aarch64.h (struct aarch64_opcode): Expand verifiers to take
6 2018-10-03 Tamar Christina <tamar.christina@arm.com>
8 * opcode/aarch64.h (enum err_type): New.
9 (aarch64_decode_insn): Use it.
11 2018-10-03 Tamar Christina <tamar.christina@arm.com>
13 * opcode/aarch64.h (struct aarch64_instr_sequence): New.
14 (aarch64_opcode_encode): Use it.
16 2018-10-03 Tamar Christina <tamar.christina@arm.com>
18 * opcode/aarch64.h (struct aarch64_opcode): Add constraints,
19 extend flags field size.
20 (F_SCAN, C_SCAN_MOVPRFX, C_MAX_ELEM): New.
22 2018-10-03 John Darrington <john@darrington.wattle.id.au>
24 * dis-asm.h (print_insn_s12z): New declaration.
26 2018-10-02 Palmer Dabbelt <palmer@sifive.com>
28 * opcode/riscv-opc.h (MATCH_FENCE_TSO): New define.
29 (MASK_FENCE_TSO): Likewise.
31 2018-10-01 Cupertino Miranda <cmiranda@synopsys.com>
33 * arc-reloc.def (ARC_TLS_LE_32): Updated reloc formula.
35 2018-09-21 H.J. Lu <hongjiu.lu@intel.com>
38 * include/elf/internal.h (ELF_SECTION_IN_SEGMENT_1): Don't
39 include zero size sections at start of PT_NOTE segment.
41 2018-09-20 Nelson Chu <nelson.chu1990@gmail.com>
43 * elf/nds32.h: Remove the unused target features.
44 * dis-asm.h (disassemble_init_nds32): Declared.
45 * elf/nds32.h (E_NDS32_NULL): Removed.
46 (E_NDS32_HAS_DSP_INST, E_NDS32_HAS_ZOL): New.
47 * opcode/nds32.h: Ident.
48 (N32_SUB6, INSN_LW): New macros.
49 (enum n32_opcodes): Updated.
50 * elf/nds32.h: Doc fixes.
51 * elf/nds32.h: Add R_NDS32_LSI.
52 * elf/nds32.h: Add new relocations for TLS.
54 2018-09-20 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
56 * elf/common.h (AT_SUN_HWCAP): Rename to ...
57 (AT_SUN_CAP_HW1): ... this. Retain old name for backward
59 (AT_SUN_EMULATOR, AT_SUN_BRANDNAME, AT_SUN_BRAND_AUX1)
60 (AT_SUN_BRAND_AUX2, AT_SUN_BRAND_AUX3, AT_SUN_CAP_HW2): Define.
62 2018-09-05 Simon Marchi <simon.marchi@ericsson.com>
64 * diagnostics.h (DIAGNOSTIC_IGNORE_FORMAT_NONLITERAL): New macro.
66 2018-08-31 Alan Modra <amodra@gmail.com>
68 * elf/ppc64.h (R_PPC64_REL16_HIGH, R_PPC64_REL16_HIGHA),
69 (R_PPC64_REL16_HIGHER, R_PPC64_REL16_HIGHERA),
70 (R_PPC64_REL16_HIGHEST, R_PPC64_REL16_HIGHESTA): Define.
71 (R_PPC64_LO_DS_OPT, R_PPC64_16DX_HA): Bump value.
73 2018-08-30 Kito Cheng <kito@andestech.com>
75 * opcode/riscv.h (MAX_SUBSET_NUM): New.
76 (riscv_opcode): Add xlen_requirement field and change type of
79 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
81 * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS264E.
82 * opcode/mips.h (CPU_XXX): New CPU_GS264E.
84 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
86 * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS464E.
87 * opcode/mips.h (CPU_XXX): New CPU_GS464E.
89 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
91 * elf/mips.h (E_MIPS_MACH_XXX): Rename E_MIPS_MACH_LS3A to
93 (AFL_EXT_XXX): Delete AFL_EXT_LOONGSON_3A.
94 * opcode/mips.h (INSN_XXX): Delete INSN_LOONGSON_3A.
95 (CPU_XXX): Rename CPU_LOONGSON_3A to CPU_GS464.
96 * opcode/mips.h (mips_isa_table): Delete CPU_LOONGSON_3A case.
98 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
100 * elf/mips.h (AFL_ASE_LOONGSON_EXT2): New macro.
101 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT2.
102 * opcode/mips.h (ASE_LOONGSON_EXT2): New macro.
104 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
106 * elf/mips.h (AFL_ASE_LOONGSON_EXT): New macro.
107 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT.
108 * opcode/mips.h (ASE_LOONGSON_EXT): New macro.
110 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
112 * elf/mips.h (AFL_ASE_LOONGSON_CAM): New macro.
113 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_CAM.
114 * opcode/mips.h (ASE_LOONGSON_CAM): New macro.
116 2018-08-24 H.J. Lu <hongjiu.lu@intel.com>
118 * elf/common.h (GNU_PROPERTY_X86_ISA_1_USED): Renamed to ...
119 (GNU_PROPERTY_X86_COMPAT_ISA_1_USED): This.
120 (GNU_PROPERTY_X86_ISA_1_NEEDED): Renamed to ...
121 (GNU_PROPERTY_X86_COMPAT_ISA_1_NEEDED): This.
122 (GNU_PROPERTY_X86_ISA_1_XXX): Renamed to ...
123 (GNU_PROPERTY_X86_COMPAT_ISA_1_XXX): This.
124 (GNU_PROPERTY_X86_UINT32_AND_LO): New.
125 (GNU_PROPERTY_X86_UINT32_AND_HI): Likewise.
126 (GNU_PROPERTY_X86_UINT32_OR_LO): Likewise.
127 (GNU_PROPERTY_X86_UINT32_OR_HI): Likewise.
128 (GNU_PROPERTY_X86_UINT32_OR_AND_LO): Likewise.
129 (GNU_PROPERTY_X86_UINT32_OR_AND_HI): Likewise.
130 (GNU_PROPERTY_X86_ISA_1_CMOV): Likewise.
131 (GNU_PROPERTY_X86_ISA_1_SSE): Likewise.
132 (GNU_PROPERTY_X86_ISA_1_SSE2): Likewise.
133 (GNU_PROPERTY_X86_ISA_1_SSE3): Likewise.
134 (GNU_PROPERTY_X86_ISA_1_SSSE3): Likewise.
135 (GNU_PROPERTY_X86_ISA_1_SSE4_1): Likewise.
136 (GNU_PROPERTY_X86_ISA_1_SSE4_2): Likewise.
137 (GNU_PROPERTY_X86_ISA_1_AVX): Likewise.
138 (GNU_PROPERTY_X86_ISA_1_AVX2): Likewise.
139 (GNU_PROPERTY_X86_ISA_1_FMA): Likewise.
140 (GNU_PROPERTY_X86_ISA_1_AVX512F): Likewise.
141 (GNU_PROPERTY_X86_ISA_1_AVX512CD): Likewise.
142 (GNU_PROPERTY_X86_ISA_1_AVX512ER): Likewise.
143 (GNU_PROPERTY_X86_ISA_1_AVX512PF): Likewise.
144 (GNU_PROPERTY_X86_ISA_1_AVX512VL): Likewise.
145 (GNU_PROPERTY_X86_ISA_1_AVX512DQ): Likewise.
146 (GNU_PROPERTY_X86_ISA_1_AVX512BW): Likewise.
147 (GNU_PROPERTY_X86_ISA_1_AVX512_4FMAPS): Likewise.
148 (GNU_PROPERTY_X86_ISA_1_AVX512_4VNNIW): Likewise.
149 (GNU_PROPERTY_X86_ISA_1_AVX512_BITALG): Likewise.
150 (GNU_PROPERTY_X86_ISA_1_AVX512_IFMA): Likewise.
151 (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI): Likewise.
152 (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI2): Likewise.
153 (GNU_PROPERTY_X86_ISA_1_AVX512_VNNI): Likewise.
154 (GNU_PROPERTY_X86_FEATURE_2_X86): Likewise.
155 (GNU_PROPERTY_X86_FEATURE_2_X87): Likewise.
156 (GNU_PROPERTY_X86_FEATURE_2_MMX): Likewise.
157 (GNU_PROPERTY_X86_FEATURE_2_XMM): Likewise.
158 (GNU_PROPERTY_X86_FEATURE_2_YMM): Likewise.
159 (GNU_PROPERTY_X86_FEATURE_2_ZMM): Likewise.
160 (GNU_PROPERTY_X86_FEATURE_2_FXSR): Likewise.
161 (GNU_PROPERTY_X86_FEATURE_2_XSAVE): Likewise.
162 (GNU_PROPERTY_X86_FEATURE_2_XSAVEOPT): Likewise.
163 (GNU_PROPERTY_X86_FEATURE_2_XSAVEC): Likewise.
164 (GNU_PROPERTY_X86_FEATURE_1_AND): Updated to
165 (GNU_PROPERTY_X86_UINT32_AND_LO + 0).
166 (GNU_PROPERTY_X86_ISA_1_NEEDED): Defined to
167 (GNU_PROPERTY_X86_UINT32_OR_LO + 0).
168 (GNU_PROPERTY_X86_FEATURE_2_NEEDED): New. Defined to
169 (GNU_PROPERTY_X86_UINT32_OR_LO + 1).
170 (GNU_PROPERTY_X86_ISA_1_USED): Defined to
171 (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 0).
172 (GNU_PROPERTY_X86_FEATURE_2_USED): New. Defined to
173 (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 1).
175 2018-08-24 H.J. Lu <hongjiu.lu@intel.com>
177 * elf/common.h (GNU_PROPERTY_X86_UINT32_VALID): New.
179 2018-08-21 John Darrington <john@darrington.wattle.id.au>
181 * elf/s12z.h: Rename R_S12Z_UKNWN_3 to R_S12Z_EXT18.
183 2018-08-21 Alan Modra <amodra@gmail.com>
185 * opcode/ppc.h (struct powerpc_operand): Correct "insert" comment.
186 Mention use of "extract" function to provide default value.
187 (PPC_OPERAND_OPTIONAL_VALUE): Delete.
188 (ppc_optional_operand_value): Rewrite to use extract function.
190 2018-08-18 John Darrington <john@darrington.wattle.id.au>
192 * opcode/s12z.h: New file.
194 2018-08-09 Richard Earnshaw <rearnsha@arm.com>
196 * elf/arm.h: Updated comments for e_flags definitions.
198 2018-08-06 Claudiu Zissulescu <claziss@synopsys.com>
200 * elf/arc.h (Tag_ARC_ATR_version): New tag.
202 2018-08-06 Claudiu Zissulescu <claziss@synopsys.com>
204 * opcode/arc.h (ARC_OPCODE_ARCV1): Define.
206 2018-08-01 Richard Earnshaw <rearnsha@arm.com>
209 2018-07-26 Martin Liska <mliska@suse.cz>
212 * libiberty.h (make_temp_file_with_prefix): New function.
214 2018-07-30 Jim Wilson <jimw@sifive.com>
216 * opcode/riscv.h (INSN_TYPE, INSN_BRANCH, INSN_CONDBRANCH, INSN_JSR)
217 (INSN_DREF, INSN_DATA_SIZE, INSN_DATA_SIZE_SHIFT, INSN_1_BYTE)
218 (INSN_2_BYTE, INSN_4_BYTE, INSN_8_BYTE, INSN_16_BYTE): New.
220 2018-07-30 Andrew Jenner <andrew@codesourcery.com>
222 * elf/common.h (EM_CSKY, EM_CSKY_OLD): Define.
223 * elf/csky.h: New file.
225 2018-07-27 Chenghua Xu <paul.hua.gm@gmail.com>
226 Maciej W. Rozycki <macro@linux-mips.org>
228 * elf/mips.h (AFL_ASE_MASK): Correct typo.
230 2018-07-26 Alex Chadwick <Alex.Chadwick@cl.cam.ac.uk>
232 * opcode/ppc.h (PPC_OPCODE_750): Adjust comment.
234 2018-07-26 Alan Modra <amodra@gmail.com>
236 * elf/ppc64.h: Specify byte offset to local entry for values
237 of two to six in STO_PPC64_LOCAL_MASK. Clarify r2 return
238 value for such functions when entering via global entry point.
239 Specify meaning of a value of one in STO_PPC64_LOCAL_MASK.
241 2018-07-24 Alan Modra <amodra@gmail.com>
244 * elf/common.h (SHT_SYMTAB_SHNDX): Fix comment typo.
246 2018-07-20 Chenghua Xu <paul.hua.gm@gmail.com>
247 Maciej W. Rozycki <macro@mips.com>
249 * elf/mips.h (AFL_ASE_MMI): New macro.
250 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_MMI.
251 * opcode/mips.h (ASE_LOONGSON_MMI): New macro.
253 2018-07-17 Maciej W. Rozycki <macro@mips.com>
255 * bfdlink.h (bfd_link_hash_entry): Add `rel_from_abs' member.
257 2018-07-06 Alan Modra <amodra@gmail.com>
259 * diagnostics.h: Comment on macro usage.
261 2018-07-05 Simon Marchi <simon.marchi@polymtl.ca>
263 * diagnostics.h (DIAGNOSTIC_IGNORE_DEPRECATED_DECLARATIONS):
266 2018-07-02 Maciej W. Rozycki <macro@mips.com>
269 * dis-asm.h (disasm_option_arg_t): New typedef.
270 (disasm_options_and_args_t): Likewise.
271 (disasm_options_t): Add `arg' member, document members.
272 (disassembler_options_mips): New prototype.
273 (disassembler_options_arm, disassembler_options_powerpc)
274 (disassembler_options_s390): Update prototypes.
276 2018-06-29 Tamar Christina <tamar.christina@arm.com>
279 *opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_Em16.
281 2018-06-26 Alan Modra <amodra@gmail.com>
283 * elf/internal.h (ELF_SECTION_IN_SEGMENT): Revert last change.
285 2018-06-24 Nick Clifton <nickc@redhat.com>
289 2018-06-21 Alan Hayward <alan.hayward@arm.com>
291 * elf/internal.h (ELF_SECTION_IN_SEGMENT): Don’t check addresses
294 2018-06-19 Simon Marchi <simon.marchi@ericsson.com>
298 2018-05-24 Tom Rix <trix@juniper.net>
300 * dwarf2.def (DW_FORM_strx*, DW_FORM_addrx*): New.
302 2017-11-20 Kito Cheng <kito.cheng@gmail.com>
304 * longlong.h [__riscv] (__umulsidi3): Define.
305 [__riscv] (umul_ppmm): Likewise.
306 [__riscv] (__muluw3): Likewise.
308 2018-06-14 Faraz Shahbazker <Faraz.Shahbazker@mips.com>
310 * elf/mips.h (AFL_ASE_GINV, AFL_ASE_RESERVED1): New macros.
311 (AFL_ASE_MASK): Update to include AFL_ASE_GINV.
312 * opcode/mips.h: Document "+\" operand format.
313 (ASE_GINV): New macro.
315 2018-06-13 Scott Egerton <scott.egerton@imgtec.com>
316 Faraz Shahbazker <Faraz.Shahbazker@mips.com>
318 * elf/mips.h (AFL_ASE_CRC): New macro.
319 (AFL_ASE_MASK): Update to include AFL_ASE_CRC.
320 * opcode/mips.h (ASE_CRC): New macro.
321 * opcode/mips.h (ASE_CRC64): Likewise.
323 2018-06-04 Max Filippov <jcmvbkbc@gmail.com>
325 * elf/xtensa.h (xtensa_read_table_entries)
326 (xtensa_compute_fill_extra_space): New declarations.
328 2018-06-04 H.J. Lu <hongjiu.lu@intel.com>
330 * diagnostics.h (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): Always
333 2018-06-04 H.J. Lu <hongjiu.lu@intel.com>
335 * diagnostics.h (DIAGNOSTIC_STRINGIFY_1): New.
336 (DIAGNOSTIC_STRINGIFY): Likewise.
337 (DIAGNOSTIC_IGNORE): Replace STRINGIFY with DIAGNOSTIC_STRINGIFY.
338 (DIAGNOSTIC_IGNORE_SELF_MOVE): Define empty if not defined.
339 (DIAGNOSTIC_IGNORE_DEPRECATED_REGISTER): Likewise.
340 (DIAGNOSTIC_IGNORE_UNUSED_FUNCTION): Likewise.
341 (DIAGNOSTIC_IGNORE_SWITCH_DIFFERENT_ENUM_TYPES): Likewise.
342 (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): New.
344 2018-06-01 H.J. Lu <hongjiu.lu@intel.com>
346 * diagnostics.h: Moved from ../gdb/common/diagnostics.h.
348 2018-05-28 Bernd Edlinger <bernd.edlinger@hotmail.de>
350 * splay-tree.h (splay_tree_compare_strings,
351 splay_tree_delete_pointers): Declare new utility functions.
353 2018-05-21 Peter Bergner <bergner@vnet.ibm.com.com>
355 * opcode/ppc.h (PPC_OPERAND_FAKE): Delete macro.
357 2018-05-18 Kito Cheng <kito.cheng@gmail.com>
359 * elf/riscv.h (EF_RISCV_RVE): New define.
361 2018-05-18 John Darrington <john@darrington.wattle.id.au>
363 * elf/s12z.h: New header.
365 2018-05-15 Tamar Christina <tamar.christina@arm.com>
368 * opcode/aarch64.h (F_SYS_READ, F_SYS_WRITE): New.
370 2018-05-15 Tamar Christina <tamar.christina@arm.com>
373 * opcode/aarch64.h (aarch64_operand_error): Add non_fatal.
374 (aarch64_print_operand): Support notes.
376 2018-05-15 Tamar Christina <tamar.christina@arm.com>
379 * opcode/aarch64.h (aarch64_opnd_info): Change sysreg to struct.
380 (aarch64_decode_insn): Accept error struct.
382 2018-05-15 Francois H. Theron <francois.theron@netronome.com>
384 * opcode/nfp.h: Use uint64_t instead of bfd_vma.
386 2018-05-10 John Darrington <john@darrington.wattle.id.au>
388 * elf/common.h (EM_S12Z): New macro.
390 2018-05-09 Sebastian Rasmussen <sebras@gmail.com>
392 * mach-o/unwind.h (MACH_O_UNWIND_X86_64_RBP_FRAME_REGISTERS):
393 Rename from MACH_O_UNWIND_X86_64_RBP_FRAME_REGSITERS.
394 (MACH_O_UNWIND_X86_EBP_FRAME_REGISTERS): Rename from
395 MACH_O_UNWIND_X86_EBP_FRAME_REGSITERS.
397 2018-05-08 Jim Wilson <jimw@sifive.com>
399 * opcode/riscv-opc.h (MATCH_C_SRLI64, MASK_C_SRLI64): New.
400 (MATCH_C_SRAI64, MASK_C_SRAI64): New.
401 (MATCH_C_SLLI64, MASK_C_SLLI64): New.
403 2018-05-07 Peter Bergner <bergner@vnet.ibm.com.com>
405 * opcode/ppc.h (powerpc_num_opcodes): Change type to unsigned.
406 (vle_num_opcodes): Likewise.
407 (spe2_num_opcodes): Likewise.
409 2018-05-04 Alan Modra <amodra@gmail.com>
411 * ansidecl.h: Import from gcc.
412 * coff/internal.h (struct internal_scnhdr): Add ATTRIBUTE_NONSTRING
414 (struct internal_syment): Add ATTRIBUTE_NONSTRING to _n_name.
416 2018-04-30 Francois H. Theron <francois.theron@netronome.com>
418 * dis-asm.h: Added print_nfp_disassembler_options prototype.
419 * elf/common.h: Added EM_NFP, officially assigned. See Google Group
420 Generic System V Application Binary Interface.
421 * elf/nfp.h: New, for NFP support.
422 * opcode/nfp.h: New, for NFP support.
424 2018-04-25 Christophe Lyon <christophe.lyon@st.com>
425 Mickaël Guêné <mickael.guene@st.com>
427 * elf/arm.h: Add R_ARM_TLS_GD32_FDPIC, R_ARM_TLS_LDM32_FDPIC,
428 R_ARM_TLS_IE32_FDPIC.
430 2018-04-25 Christophe Lyon <christophe.lyon@st.com>
431 Mickaël Guêné <mickael.guene@st.com>
433 * elf/arm.h (R_ARM_GOTFUNCDESC, R_ARM_GOTOFFFUNCDESC)
435 (R_ARM_FUNCDESC_VALUE): Define new relocations.
437 2018-04-25 Christophe Lyon <christophe.lyon@st.com>
438 Mickaël Guêné <mickael.guene@st.com>
440 * elf/arm.h (EF_ARM_FDPIC): New.
442 2018-04-18 Alan Modra <amodra@gmail.com>
444 * coff/mipspe.h: Delete.
446 2018-04-18 Alan Modra <amodra@gmail.com>
448 * aout/dynix3.h: Delete.
450 2018-04-17 Andrew Sadek <andrew.sadek.se@gmail.com>
452 Microblaze Target: PIC data text relative
454 * bfdlink.h (Add flag): Add new flag @ 'bfd_link_info' struct.
455 * elf/microblaze.h (Add 3 new relocations):
456 R_MICROBLAZE_TEXTPCREL_64, R_MICROBLAZE_TEXTREL_64
457 and R_MICROBLAZE_TEXTREL_32_LO for relax function.
459 2018-04-17 Alan Modra <amodra@gmail.com>
461 * elf/i370.h: Revert removal.
462 * elf/i860.h: Likewise.
463 * elf/i960.h: Likewise.
465 2018-04-16 Alan Modra <amodra@gmail.com>
467 * coff/sparc.h: Delete.
469 2018-04-16 Alan Modra <amodra@gmail.com>
471 * aout/host.h: Remove m68k-aout and m68k-coff support.
472 * aout/hp300hpux.h: Delete.
473 * coff/apollo.h: Delete.
474 * coff/aux-coff.h: Delete.
475 * coff/m68k.h: Delete.
477 2018-04-16 Alan Modra <amodra@gmail.com>
479 * dis-asm.h: Remove sh5 and sh64 support.
481 2018-04-16 Alan Modra <amodra@gmail.com>
483 * coff/internal.h: Remove w65 support.
484 * coff/w65.h: Delete.
486 2018-04-16 Alan Modra <amodra@gmail.com>
488 * coff/we32k.h: Delete.
490 2018-04-16 Alan Modra <amodra@gmail.com>
492 * coff/internal.h: Remove m88k support.
493 * coff/m88k.h: Delete.
494 * opcode/m88k.h: Delete.
496 2018-04-16 Alan Modra <amodra@gmail.com>
498 * elf/i370.h: Delete.
499 * opcode/i370.h: Delete.
501 2018-04-16 Alan Modra <amodra@gmail.com>
503 * coff/h8500.h: Delete.
504 * coff/internal.h: Remove h8500 support.
506 2018-04-16 Alan Modra <amodra@gmail.com>
508 * coff/h8300.h: Delete.
510 2018-04-16 Alan Modra <amodra@gmail.com>
514 2018-04-16 Alan Modra <amodra@gmail.com>
516 * aout/host.h: Remove newsos3 support.
518 2018-04-16 Alan Modra <amodra@gmail.com>
520 * nlm/ChangeLog-9315: Delete.
521 * nlm/alpha-ext.h: Delete.
522 * nlm/common.h: Delete.
523 * nlm/external.h: Delete.
524 * nlm/i386-ext.h: Delete.
525 * nlm/internal.h: Delete.
526 * nlm/ppc-ext.h: Delete.
527 * nlm/sparc32-ext.h: Delete.
529 2018-04-16 Alan Modra <amodra@gmail.com>
531 * opcode/tahoe.h: Delete.
533 2018-04-11 Alan Modra <amodra@gmail.com>
535 * aout/adobe.h: Delete.
536 * aout/reloc.h: Delete.
537 * coff/i860.h: Delete.
538 * coff/i960.h: Delete.
539 * elf/i860.h: Delete.
540 * elf/i960.h: Delete.
541 * opcode/i860.h: Delete.
542 * opcode/i960.h: Delete.
543 * aout/aout64.h (enum reloc_type): Trim off 29k and other unused values.
544 * aout/ar.h (ARMAGB): Remove.
545 * coff/internal.h (struct internal_aouthdr, struct internal_scnhdr,
546 union internal_auxent): Remove i960 support.
548 2018-04-09 Alan Modra <amodra@gmail.com>
550 * elf/ppc.h (R_PPC_PLTSEQ, R_PPC_PLTCALL): Define.
551 * elf/ppc64.h (R_PPC64_PLTSEQ, R_PPC64_PLTCALL): Define.
553 2018-03-28 Renlin Li <renlin.li@arm.com>
556 * elf/aarch64.h: Add relocation number for
557 R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12,
558 R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC,
559 R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12,
560 R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC,
561 R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12,
562 R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC,
563 R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12,
564 R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC.
566 2018-03-28 Nick Clifton <nickc@redhat.com>
569 * opcode/aarch64.h (enum aarch64_opnd): Add
570 AARCH64_OPND_SVE_ADDR_R.
572 2018-03-21 H.J. Lu <hongjiu.lu@intel.com>
574 * elf/common.h (DF_1_KMOD): New.
575 (DF_1_WEAKFILTER): Likewise.
576 (DF_1_NOCOMMON): Likewise.
578 2018-03-14 Kito Cheng <kito.cheng@gmail.com>
580 * opcode/riscv.h (OP_MASK_FUNCT3): New.
581 (OP_SH_FUNCT3): Likewise.
582 (OP_MASK_FUNCT7): Likewise.
583 (OP_SH_FUNCT7): Likewise.
584 (OP_MASK_OP2): Likewise.
585 (OP_SH_OP2): Likewise.
586 (OP_MASK_CFUNCT4): Likewise.
587 (OP_SH_CFUNCT4): Likewise.
588 (OP_MASK_CFUNCT3): Likewise.
589 (OP_SH_CFUNCT3): Likewise.
590 (riscv_insn_types): Likewise.
592 2018-03-13 Nick Clifton <nickc@redhat.com>
595 * coff/pe.h (struct pex64_unwind_info): Add a rawUnwindCodesEnd
598 2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
600 * opcode/i386 (OLDGCC_COMPAT): Removed.
602 2018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
604 * opcode/arm.h (ARM_FEATURE_COPY): Remove macro definition.
606 2018-02-20 Maciej W. Rozycki <macro@mips.com>
608 * opcode/mips.h: Remove `M' operand code.
610 2018-02-12 Zebediah Figura <z.figura12@gmail.com>
612 * coff/msdos.h: New header.
613 * coff/pe.h: Move common defines to msdos.h.
614 * coff/powerpc.h: Likewise.
616 2018-01-13 Nick Clifton <nickc@redhat.com>
620 2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
623 * bfdlink.h (bfd_link_info): Add separate_code.
625 2018-01-04 Jim Wilson <jimw@sifive.com>
627 * opcode/riscv-opc.h (CSR_SBADADDR): Rename to CSR_STVAL. Rename
628 DECLARE_CSR entry. Add alias to map sbadaddr to CSR_STVAL.
629 (CSR_MBADADDR): Rename to CSR_MTVAL. Rename DECLARE_CSR entry.
630 Add alias to map mbadaddr to CSR_MTVAL.
632 2018-01-03 Alan Modra <amodra@gmail.com>
634 Update year range in copyright notice of all files.
636 For older changes see ChangeLog-2017
638 Copyright (C) 2018 Free Software Foundation, Inc.
640 Copying and distribution of this file, with or without modification,
641 are permitted in any medium without royalty provided the copyright
642 notice and this notice are preserved.
648 version-control: never