include/ChangeLog

   1 2018-12-11  Nick Clifton  <nickc@redhat.com>
   2
   3         PR 88409
   4         * demangle.h (DEMANGLE_RECURSION_LIMIT): Increase to 2048.
   5
   6 2018-12-07  H.J. Lu  <hongjiu.lu@intel.com>
   7
   8         * bfdlink.h (bfd_link_info): Add has_map_file.
   9
  10 2018-12-07  Nick Clifton  <nickc@redhat.com>
  11
  12         * demangle.h (DMGL_NO_RECURSE_LIMIT): Define.
  13         (DEMANGLE_RECURSION_LIMIT): Define
  14
  15 2018-12-06  Alan Modra  <amodra@gmail.com>
  16
  17         * opcode/ppc.h (E_OPCODE_MASK, E_LI_MASK, E_LI_INSN): Define.
  18
  19 2018-12-06  Andrew Burgess  <andrew.burgess@embecosm.com>
  20
  21         * dis-asm.h (riscv_symbol_is_valid): Declare.
  22         * opcode/riscv.h (RISCV_FAKE_LABEL_NAME): Define.
  23         (RISCV_FAKE_LABEL_CHAR): Define.
  24
  25 2018-12-03  Kito Cheng  <kito@andestech.com>
  26
  27         * opcode/riscv.h (riscv_opcode): Change type of xlen_requirement to
  28         unsigned.
  29
  30 2018-11-27  Jim Wilson  <jimw@sifive.com>
  31
  32         * opcode/riscv.h (OP_MASK_CFUNCT6, OP_SH_CFUNCT6): New.
  33         (OP_MASK_CFUNCT2, OP_SH_CFUNCT2): New.
  34
  35 2018-11-13  Thomas Preud'homme  <thomas.preudhomme@arm.com>
  36
  37         * opcode/arm.h (ARM_AEXT_V6M_ONLY): Merge into its use in ARM_AEXT_V6M.
  38         (ARM_ARCH_V6M_ONLY): Remove.
  39         (ARM_EXT_V1, ARM_EXT_V2, ARM_EXT_V2S, ARM_EXT_V3, ARM_EXT_V3M,
  40         ARM_EXT_V4, ARM_EXT_V4T, ARM_EXT_V5, ARM_EXT_V5T, ARM_EXT_V5ExP,
  41         ARM_EXT_V5E, ARM_EXT_V5J, ARM_EXT_V6, ARM_EXT_V6K, ARM_EXT_V8,
  42         ARM_EXT_V6T2, ARM_EXT_DIV, ARM_EXT_V5E_NOTM, ARM_EXT_V6_NOTM,
  43         ARM_EXT_V7, ARM_EXT_V7A, ARM_EXT_V7R, ARM_EXT_V7M, ARM_EXT_V6M,
  44         ARM_EXT_BARRIER, ARM_EXT_THUMB_MSR, ARM_EXT_V6_DSP, ARM_EXT_MP,
  45         ARM_EXT_SEC, ARM_EXT_OS, ARM_EXT_ADIV, ARM_EXT_VIRT, ARM_EXT2_PAN,
  46         ARM_EXT2_V8_2A, ARM_EXT2_V8M, ARM_EXT2_ATOMICS, ARM_EXT2_V6T2_V8M,
  47         ARM_EXT2_FP16_INST, ARM_EXT2_V8M_MAIN, ARM_EXT2_RAS, ARM_EXT2_V8_3A,
  48         ARM_EXT2_V8A, ARM_EXT2_V8_4A, ARM_EXT2_FP16_FML, ARM_EXT2_V8_5A,
  49         ARM_EXT2_SB, ARM_EXT2_PREDRES, ARM_CEXT_XSCALE, ARM_CEXT_MAVERICK,
  50         ARM_CEXT_IWMMXT, ARM_CEXT_IWMMXT2, FPU_ENDIAN_PURE, FPU_ENDIAN_BIG,
  51         FPU_FPA_EXT_V1, FPU_FPA_EXT_V2, FPU_MAVERICK, FPU_VFP_EXT_V1xD,
  52         FPU_VFP_EXT_V1, FPU_VFP_EXT_V2, FPU_VFP_EXT_V3xD, FPU_VFP_EXT_V3,
  53         FPU_NEON_EXT_V1, FPU_VFP_EXT_D32, FPU_VFP_EXT_FP16, FPU_NEON_EXT_FMA,
  54         FPU_VFP_EXT_FMA, FPU_VFP_EXT_ARMV8, FPU_NEON_EXT_ARMV8,
  55         FPU_CRYPTO_EXT_ARMV8, CRC_EXT_ARMV8, FPU_VFP_EXT_ARMV8xD,
  56         FPU_NEON_EXT_RDMA, FPU_NEON_EXT_DOTPROD, ARM_AEXT_V1, ARM_AEXT_V2,
  57         ARM_AEXT_V2S, ARM_AEXT_V3, ARM_AEXT_V3M, ARM_AEXT_V4xM, ARM_AEXT_V4,
  58         ARM_AEXT_V4TxM, ARM_AEXT_V4T, ARM_AEXT_V5xM, ARM_AEXT_V5,
  59         ARM_AEXT_V5TxM, ARM_AEXT_V5T, ARM_AEXT_V5TExP, ARM_AEXT_V5TE,
  60         ARM_AEXT_V5TEJ, ARM_AEXT_V6, ARM_AEXT_V6K, ARM_AEXT_V6Z, ARM_AEXT_V6KZ,
  61         ARM_AEXT_V6T2, ARM_AEXT_V6KT2, ARM_AEXT_V6ZT2, ARM_AEXT_V6KZT2,
  62         ARM_AEXT_V7_ARM, ARM_AEXT_V7A, ARM_AEXT_V7VE, ARM_AEXT_V7R,
  63         ARM_AEXT_NOTM, ARM_AEXT_V6M_ONLY, ARM_AEXT_V6M, ARM_AEXT_V6SM,
  64         ARM_AEXT_V7M, ARM_AEXT_V7, ARM_AEXT_V7EM, ARM_AEXT_V8A, ARM_AEXT2_V8A,
  65         ARM_AEXT2_V8_1A, ARM_AEXT2_V8_2A, ARM_AEXT2_V8_3A, ARM_AEXT2_V8_4A,
  66         ARM_AEXT2_V8_5A, ARM_AEXT_V8M_BASE, ARM_AEXT_V8M_MAIN,
  67         ARM_AEXT_V8M_MAIN_DSP, ARM_AEXT2_V8M, ARM_AEXT2_V8M_BASE,
  68         ARM_AEXT2_V8M_MAIN, ARM_AEXT2_V8M_MAIN_DSP, ARM_AEXT_V8R,
  69         ARM_AEXT2_V8R, FPU_VFP_V1xD, FPU_VFP_V1, FPU_VFP_V2, FPU_VFP_V3D16,
  70         FPU_VFP_V3, FPU_VFP_V3xD, FPU_VFP_V4D16, FPU_VFP_V4, FPU_VFP_V4_SP_D16,
  71         FPU_VFP_V5D16, FPU_VFP_ARMV8, FPU_NEON_ARMV8, FPU_CRYPTO_ARMV8,
  72         FPU_VFP_HARD, FPU_FPA, FPU_ARCH_VFP, FPU_ARCH_FPE, FPU_ARCH_FPA,
  73         FPU_ARCH_VFP_V1xD, FPU_ARCH_VFP_V1, FPU_ARCH_VFP_V2,
  74         FPU_ARCH_VFP_V3D16_FP16, FPU_ARCH_VFP_V3, FPU_ARCH_VFP_V3_FP16,
  75         FPU_ARCH_VFP_V3xD_FP16, FPU_ARCH_NEON_V1, FPU_ARCH_VFP_V3_PLUS_NEON_V1,
  76         FPU_ARCH_NEON_FP16, FPU_ARCH_VFP_HARD, FPU_ARCH_VFP_V4,
  77         FPU_ARCH_VFP_V4D16, FPU_ARCH_VFP_V4_SP_D16, FPU_ARCH_VFP_V5D16,
  78         FPU_ARCH_VFP_V5_SP_D16, FPU_ARCH_NEON_VFP_V4, FPU_ARCH_VFP_ARMV8,
  79         FPU_ARCH_NEON_VFP_ARMV8, FPU_ARCH_CRYPTO_NEON_VFP_ARMV8,
  80         FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_DOTPROD, ARCH_CRC_ARMV8,
  81         FPU_ARCH_NEON_VFP_ARMV8_1, FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1,
  82         FPU_ARCH_DOTPROD_NEON_VFP_ARMV8, ARM_ARCH_V1, ARM_ARCH_V2,
  83         ARM_ARCH_V2S, ARM_ARCH_V3, ARM_ARCH_V3M, ARM_ARCH_V4xM, ARM_ARCH_V4,
  84         ARM_ARCH_V4TxM, ARM_ARCH_V4T, ARM_ARCH_V5xM, ARM_ARCH_V5,
  85         ARM_ARCH_V5TxM, ARM_ARCH_V5T, ARM_ARCH_V5TExP, ARM_ARCH_V5TE,
  86         ARM_ARCH_V5TEJ, ARM_ARCH_V6, ARM_ARCH_V6K, ARM_ARCH_V6Z, ARM_ARCH_V6KZ,
  87         ARM_ARCH_V6T2, ARM_ARCH_V6KT2, ARM_ARCH_V6ZT2, ARM_ARCH_V6KZT2,
  88         ARM_ARCH_V6M, ARM_ARCH_V6SM, ARM_ARCH_V7, ARM_ARCH_V7A, ARM_ARCH_V7VE,
  89         ARM_ARCH_V7R, ARM_ARCH_V7M, ARM_ARCH_V7EM, ARM_ARCH_V8A,
  90         ARM_ARCH_V8A_CRC, ARM_ARCH_V8_1A, ARM_ARCH_V8_2A, ARM_ARCH_V8_3A,
  91         ARM_ARCH_V8_4A, ARM_ARCH_V8_5A, ARM_ARCH_V8M_BASE, ARM_ARCH_V8M_MAIN,
  92         ARM_ARCH_V8M_MAIN_DSP, ARM_ARCH_V8R): Reindent.
  93
  94 2018-11-12  Sudakshina Das  <sudi.das@arm.com>
  95
  96         * opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_ADDR_SIMPLE_2.
  97         (aarch64_insn_class): Add ldstgv_indexed.
  98
  99 2018-11-12  Sudakshina Das  <sudi.das@arm.com>
 100
 101         * opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_ADDR_SIMM11
 102         and AARCH64_OPND_ADDR_SIMM13.
 103         (aarch64_opnd_qualifier): Add new AARCH64_OPND_QLF_imm_tag.
 104
 105 2018-11-12  Sudakshina Das  <sudi.das@arm.com>
 106
 107         * opcode/aarch64.h (aarch64_opnd): Add
 108         AARCH64_OPND_UIMM4_ADDG and AARCH64_OPND_UIMM10 as new enums.
 109
 110 2018-11-12  Sudakshina Das  <sudi.das@arm.com>
 111
 112         * opcode/aarch64.h (AARCH64_FEATURE_MEMTAG): New.
 113
 114 2018-11-07  Roman Bolshakov <r.bolshakov@yadro.com>
 115             Saagar Jha  <saagar@saagarjha.com>
 116
 117         * mach-o/external.h (mach_o_nversion_min_command_external): Rename
 118         reserved to sdk.
 119         (mach_o_note_command_external): New.
 120         (mach_o_build_version_command_external): New.
 121         * mach-o/loader.h (BFD_MACH_O_LC_VERSION_MIN_TVOS): Define.
 122         (BFD_MACH_O_LC_NOTE): Define.
 123
 124 2018-11-06  Romain Margheriti  <lilrom13@gmail.com>
 125
 126         PR 23742
 127         * mach-o/loader.h: Add BFD_MACH_O_LC_BUILD_VERSION.
 128
 129 2018-11-06  Sudakshina Das  <sudi.das@arm.com>
 130
 131         * opcode/arm.h (ARM_ARCH_V8_5A): Move ARM_EXT2_PREDRES and
 132         ARM_EXT2_SB to ...
 133         (ARM_AEXT2_V8_5A): Here.
 134
 135 2018-10-26  John Baldwin  <jhb@FreeBSD.org>
 136
 137         * elf/common.h (AT_FREEBSD_HWCAP2): Define.
 138
 139 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 140
 141         * opcode/aarch64.h (AARCH64_FEATURE_SSBS): New.
 142         (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_SSBS by default.
 143
 144 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 145
 146         * opcode/aarch64.h (AARCH64_FEATURE_SCXTNUM): New.
 147         (AARCH64_FEATURE_ID_PFR2): New.
 148         (AARCH64_ARCH_V8_5): Add both by default.
 149
 150 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 151
 152         * opcode/aarch64.h (AARCH64_FEATURE_BTI): New.
 153         (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_BTI by default.
 154         (aarch64_opnd): Add AARCH64_OPND_BTI_TARGET.
 155         (HINT_OPD_CSYNC, HINT_OPD_C, HINT_OPD_J): New macros to
 156         define HINT #imm values.
 157         (HINT_OPD_JC, HINT_OPD_NULL): Likewise.
 158
 159 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 160
 161         * opcode/aarch64.h (AARCH64_FEATURE_RNG): New.
 162
 163 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 164
 165         * opcode/aarch64.h (AARCH64_FEATURE_CVADP): New.
 166
 167 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 168
 169         * opcode/aarch64.h (AARCH64_FEATURE_PREDRES): New.
 170         (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_PREDRES by default.
 171         (aarch64_opnd): Add AARCH64_OPND_SYSREG_SR.
 172         (aarch64_sys_regs_sr): Declare new table.
 173
 174 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 175
 176         * opcode/aarch64.h (AARCH64_FEATURE_SB): New.
 177         (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_SB by default.
 178
 179 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 180
 181         * opcode/aarch64.h (AARCH64_FEATURE_FLAGMANIP): New.
 182         (AARCH64_FEATURE_FRINTTS): New.
 183         (AARCH64_ARCH_V8_5): Add both by default.
 184
 185 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 186
 187         * opcode/aarch64.h (AARCH64_FEATURE_V8_5): New.
 188         (AARCH64_ARCH_V8_5): New.
 189
 190 2018-10-08  Alan Modra  <amodra@gmail.com>
 191
 192         * bfdlink.h (struct bfd_link_info): Add load_phdrs field.
 193
 194 2018-10-05  Sudakshina Das  <sudi.das@arm.com>
 195
 196         * opcode/arm.h (ARM_EXT2_PREDRES): New.
 197         (ARM_ARCH_V8_5A): Add ARM_EXT2_PREDRES by default.
 198
 199 2018-10-05  Sudakshina Das  <sudi.das@arm.com>
 200
 201         * opcode/arm.h (ARM_EXT2_SB): New.
 202         (ARM_ARCH_V8_5A): Add ARM_EXT2_SB by default.
 203
 204 2018-10-05  Sudakshina Das  <sudi.das@arm.com>
 205
 206         * opcode/arm.h (ARM_EXT2_V8_5A): New.
 207         (ARM_AEXT2_V8_5A, ARM_ARCH_V8_5A): New.
 208
 209 2018-10-05  Richard Henderson  <rth@twiddle.net>
 210
 211         * elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_PCREL_PG21,
 212         R_OR1K_GOT_PG21, R_OR1K_TLS_GD_PG21, R_OR1K_TLS_LDM_PG21,
 213         R_OR1K_TLS_IE_PG21, R_OR1K_LO13, R_OR1K_GOT_LO13,
 214         R_OR1K_TLS_GD_LO13, R_OR1K_TLS_LDM_LO13, R_OR1K_TLS_IE_LO13,
 215         R_OR1K_SLO13, R_OR1K_PLTA26.
 216
 217 2018-10-05  Richard Henderson  <rth@twiddle.net>
 218
 219         * elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_AHI16,
 220         R_OR1K_GOTOFF_AHI16, R_OR1K_TLS_IE_AHI16, R_OR1K_TLS_LE_AHI16,
 221         R_OR1K_SLO16, R_OR1K_GOTOFF_SLO16, R_OR1K_TLS_LE_SLO16.
 222
 223 2018-10-03  Tamar Christina  <tamar.christina@arm.com>
 224
 225         * opcode/aarch64.h (aarch64_inst): Remove.
 226         (enum err_type): Add ERR_VFI.
 227         (aarch64_is_destructive_by_operands): New.
 228         (init_insn_sequence): New.
 229         (aarch64_decode_insn): Remove param name.
 230
 231 2018-10-03  Tamar Christina  <tamar.christina@arm.com>
 232
 233         * opcode/aarch64.h (struct aarch64_opcode): Expand verifiers to take
 234         more arguments.
 235
 236 2018-10-03  Tamar Christina  <tamar.christina@arm.com>
 237
 238         * opcode/aarch64.h (enum err_type): New.
 239         (aarch64_decode_insn): Use it.
 240
 241 2018-10-03  Tamar Christina  <tamar.christina@arm.com>
 242
 243         * opcode/aarch64.h (struct aarch64_instr_sequence): New.
 244         (aarch64_opcode_encode): Use it.
 245
 246 2018-10-03  Tamar Christina  <tamar.christina@arm.com>
 247
 248         * opcode/aarch64.h (struct aarch64_opcode): Add constraints,
 249         extend flags field size.
 250         (F_SCAN, C_SCAN_MOVPRFX, C_MAX_ELEM): New.
 251
 252 2018-10-03  John Darrington <john@darrington.wattle.id.au>
 253
 254         * dis-asm.h (print_insn_s12z): New declaration.
 255
 256 2018-10-02  Palmer Dabbelt  <palmer@sifive.com>
 257
 258         * opcode/riscv-opc.h (MATCH_FENCE_TSO): New define.
 259         (MASK_FENCE_TSO): Likewise.
 260
 261 2018-10-01  Cupertino Miranda <cmiranda@synopsys.com>
 262
 263         * arc-reloc.def (ARC_TLS_LE_32): Updated reloc formula.
 264
 265 2018-09-21  H.J. Lu  <hongjiu.lu@intel.com>
 266
 267         PR binutils/23694
 268         * include/elf/internal.h (ELF_SECTION_IN_SEGMENT_1): Don't
 269         include zero size sections at start of PT_NOTE segment.
 270
 271 2018-09-20  Nelson Chu <nelson.chu1990@gmail.com>
 272
 273         * elf/nds32.h: Remove the unused target features.
 274         * dis-asm.h (disassemble_init_nds32): Declared.
 275         * elf/nds32.h (E_NDS32_NULL): Removed.
 276         (E_NDS32_HAS_DSP_INST, E_NDS32_HAS_ZOL): New.
 277         * opcode/nds32.h: Ident.
 278         (N32_SUB6, INSN_LW): New macros.
 279         (enum n32_opcodes): Updated.
 280         * elf/nds32.h: Doc fixes.
 281         * elf/nds32.h: Add R_NDS32_LSI.
 282         * elf/nds32.h: Add new relocations for TLS.
 283
 284 2018-09-20  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
 285
 286         * elf/common.h (AT_SUN_HWCAP): Rename to ...
 287         (AT_SUN_CAP_HW1): ... this.  Retain old name for backward
 288         compatibility.
 289         (AT_SUN_EMULATOR, AT_SUN_BRANDNAME, AT_SUN_BRAND_AUX1)
 290         (AT_SUN_BRAND_AUX2, AT_SUN_BRAND_AUX3, AT_SUN_CAP_HW2): Define.
 291
 292 2018-09-05  Simon Marchi  <simon.marchi@ericsson.com>
 293
 294         * diagnostics.h (DIAGNOSTIC_IGNORE_FORMAT_NONLITERAL): New macro.
 295
 296 2018-08-31  Alan Modra  <amodra@gmail.com>
 297
 298         * elf/ppc64.h (R_PPC64_REL16_HIGH, R_PPC64_REL16_HIGHA),
 299         (R_PPC64_REL16_HIGHER, R_PPC64_REL16_HIGHERA),
 300         (R_PPC64_REL16_HIGHEST, R_PPC64_REL16_HIGHESTA): Define.
 301         (R_PPC64_LO_DS_OPT, R_PPC64_16DX_HA): Bump value.
 302
 303 2018-08-30  Kito Cheng  <kito@andestech.com>
 304
 305         * opcode/riscv.h (MAX_SUBSET_NUM): New.
 306         (riscv_opcode): Add xlen_requirement field and change type of
 307         subset.
 308
 309 2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
 310
 311         * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS264E.
 312         * opcode/mips.h (CPU_XXX): New CPU_GS264E.
 313
 314 2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
 315
 316         * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS464E.
 317         * opcode/mips.h (CPU_XXX): New CPU_GS464E.
 318
 319 2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
 320
 321         * elf/mips.h (E_MIPS_MACH_XXX): Rename E_MIPS_MACH_LS3A to
 322         E_MIPS_MACH_GS464.
 323         (AFL_EXT_XXX): Delete AFL_EXT_LOONGSON_3A.
 324         * opcode/mips.h (INSN_XXX): Delete INSN_LOONGSON_3A.
 325         (CPU_XXX): Rename CPU_LOONGSON_3A to CPU_GS464.
 326         * opcode/mips.h (mips_isa_table): Delete CPU_LOONGSON_3A case.
 327
 328 2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
 329
 330         * elf/mips.h (AFL_ASE_LOONGSON_EXT2): New macro.
 331         (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT2.
 332         * opcode/mips.h (ASE_LOONGSON_EXT2): New macro.
 333
 334 2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
 335
 336          * elf/mips.h (AFL_ASE_LOONGSON_EXT): New macro.
 337          (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT.
 338          * opcode/mips.h (ASE_LOONGSON_EXT): New macro.
 339
 340 2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
 341
 342         * elf/mips.h (AFL_ASE_LOONGSON_CAM): New macro.
 343         (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_CAM.
 344         * opcode/mips.h (ASE_LOONGSON_CAM): New macro.
 345
 346 2018-08-24  H.J. Lu  <hongjiu.lu@intel.com>
 347
 348         * elf/common.h (GNU_PROPERTY_X86_ISA_1_USED): Renamed to ...
 349         (GNU_PROPERTY_X86_COMPAT_ISA_1_USED): This.
 350         (GNU_PROPERTY_X86_ISA_1_NEEDED): Renamed to ...
 351         (GNU_PROPERTY_X86_COMPAT_ISA_1_NEEDED): This.
 352         (GNU_PROPERTY_X86_ISA_1_XXX): Renamed to ...
 353         (GNU_PROPERTY_X86_COMPAT_ISA_1_XXX): This.
 354         (GNU_PROPERTY_X86_UINT32_AND_LO): New.
 355         (GNU_PROPERTY_X86_UINT32_AND_HI): Likewise.
 356         (GNU_PROPERTY_X86_UINT32_OR_LO): Likewise.
 357         (GNU_PROPERTY_X86_UINT32_OR_HI): Likewise.
 358         (GNU_PROPERTY_X86_UINT32_OR_AND_LO): Likewise.
 359         (GNU_PROPERTY_X86_UINT32_OR_AND_HI): Likewise.
 360         (GNU_PROPERTY_X86_ISA_1_CMOV): Likewise.
 361         (GNU_PROPERTY_X86_ISA_1_SSE): Likewise.
 362         (GNU_PROPERTY_X86_ISA_1_SSE2): Likewise.
 363         (GNU_PROPERTY_X86_ISA_1_SSE3): Likewise.
 364         (GNU_PROPERTY_X86_ISA_1_SSSE3): Likewise.
 365         (GNU_PROPERTY_X86_ISA_1_SSE4_1): Likewise.
 366         (GNU_PROPERTY_X86_ISA_1_SSE4_2): Likewise.
 367         (GNU_PROPERTY_X86_ISA_1_AVX): Likewise.
 368         (GNU_PROPERTY_X86_ISA_1_AVX2): Likewise.
 369         (GNU_PROPERTY_X86_ISA_1_FMA): Likewise.
 370         (GNU_PROPERTY_X86_ISA_1_AVX512F): Likewise.
 371         (GNU_PROPERTY_X86_ISA_1_AVX512CD): Likewise.
 372         (GNU_PROPERTY_X86_ISA_1_AVX512ER): Likewise.
 373         (GNU_PROPERTY_X86_ISA_1_AVX512PF): Likewise.
 374         (GNU_PROPERTY_X86_ISA_1_AVX512VL): Likewise.
 375         (GNU_PROPERTY_X86_ISA_1_AVX512DQ): Likewise.
 376         (GNU_PROPERTY_X86_ISA_1_AVX512BW): Likewise.
 377         (GNU_PROPERTY_X86_ISA_1_AVX512_4FMAPS): Likewise.
 378         (GNU_PROPERTY_X86_ISA_1_AVX512_4VNNIW): Likewise.
 379         (GNU_PROPERTY_X86_ISA_1_AVX512_BITALG): Likewise.
 380         (GNU_PROPERTY_X86_ISA_1_AVX512_IFMA): Likewise.
 381         (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI): Likewise.
 382         (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI2): Likewise.
 383         (GNU_PROPERTY_X86_ISA_1_AVX512_VNNI): Likewise.
 384         (GNU_PROPERTY_X86_FEATURE_2_X86): Likewise.
 385         (GNU_PROPERTY_X86_FEATURE_2_X87): Likewise.
 386         (GNU_PROPERTY_X86_FEATURE_2_MMX): Likewise.
 387         (GNU_PROPERTY_X86_FEATURE_2_XMM): Likewise.
 388         (GNU_PROPERTY_X86_FEATURE_2_YMM): Likewise.
 389         (GNU_PROPERTY_X86_FEATURE_2_ZMM): Likewise.
 390         (GNU_PROPERTY_X86_FEATURE_2_FXSR): Likewise.
 391         (GNU_PROPERTY_X86_FEATURE_2_XSAVE): Likewise.
 392         (GNU_PROPERTY_X86_FEATURE_2_XSAVEOPT): Likewise.
 393         (GNU_PROPERTY_X86_FEATURE_2_XSAVEC): Likewise.
 394         (GNU_PROPERTY_X86_FEATURE_1_AND): Updated to
 395         (GNU_PROPERTY_X86_UINT32_AND_LO + 0).
 396         (GNU_PROPERTY_X86_ISA_1_NEEDED): Defined to
 397         (GNU_PROPERTY_X86_UINT32_OR_LO + 0).
 398         (GNU_PROPERTY_X86_FEATURE_2_NEEDED): New.  Defined to
 399         (GNU_PROPERTY_X86_UINT32_OR_LO + 1).
 400         (GNU_PROPERTY_X86_ISA_1_USED): Defined to
 401         (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 0).
 402         (GNU_PROPERTY_X86_FEATURE_2_USED): New.  Defined to
 403         (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 1).
 404
 405 2018-08-24  H.J. Lu  <hongjiu.lu@intel.com>
 406
 407         * elf/common.h (GNU_PROPERTY_X86_UINT32_VALID): New.
 408
 409 2018-08-21  John Darrington  <john@darrington.wattle.id.au>
 410
 411         * elf/s12z.h: Rename R_S12Z_UKNWN_3 to R_S12Z_EXT18.
 412
 413 2018-08-21  Alan Modra  <amodra@gmail.com>
 414
 415         * opcode/ppc.h (struct powerpc_operand): Correct "insert" comment.
 416         Mention use of "extract" function to provide default value.
 417         (PPC_OPERAND_OPTIONAL_VALUE): Delete.
 418         (ppc_optional_operand_value): Rewrite to use extract function.
 419
 420 2018-08-18  John Darrington  <john@darrington.wattle.id.au>
 421
 422         * opcode/s12z.h: New file.
 423
 424 2018-08-09  Richard Earnshaw  <rearnsha@arm.com>
 425
 426         * elf/arm.h: Updated comments for e_flags definitions.
 427
 428 2018-08-06  Claudiu Zissulescu  <claziss@synopsys.com>
 429
 430         * elf/arc.h (Tag_ARC_ATR_version): New tag.
 431
 432 2018-08-06  Claudiu Zissulescu  <claziss@synopsys.com>
 433
 434         * opcode/arc.h (ARC_OPCODE_ARCV1): Define.
 435
 436 2018-08-01  Richard Earnshaw  <rearnsha@arm.com>
 437
 438         Copy over from GCC
 439         2018-07-26  Martin Liska  <mliska@suse.cz>
 440
 441         PR lto/86548
 442         * libiberty.h (make_temp_file_with_prefix): New function.
 443
 444 2018-07-30  Jim Wilson  <jimw@sifive.com>
 445
 446         * opcode/riscv.h (INSN_TYPE, INSN_BRANCH, INSN_CONDBRANCH, INSN_JSR)
 447         (INSN_DREF, INSN_DATA_SIZE, INSN_DATA_SIZE_SHIFT, INSN_1_BYTE)
 448         (INSN_2_BYTE, INSN_4_BYTE, INSN_8_BYTE, INSN_16_BYTE): New.
 449
 450 2018-07-30  Andrew Jenner  <andrew@codesourcery.com>
 451
 452         * elf/common.h (EM_CSKY, EM_CSKY_OLD): Define.
 453         * elf/csky.h: New file.
 454
 455 2018-07-27  Chenghua Xu  <paul.hua.gm@gmail.com>
 456             Maciej W. Rozycki  <macro@linux-mips.org>
 457
 458         * elf/mips.h (AFL_ASE_MASK): Correct typo.
 459
 460 2018-07-26  Alex Chadwick  <Alex.Chadwick@cl.cam.ac.uk>
 461
 462         * opcode/ppc.h (PPC_OPCODE_750): Adjust comment.
 463
 464 2018-07-26  Alan Modra  <amodra@gmail.com>
 465
 466         * elf/ppc64.h: Specify byte offset to local entry for values
 467         of two to six in STO_PPC64_LOCAL_MASK.  Clarify r2 return
 468         value for such functions when entering via global entry point.
 469         Specify meaning of a value of one in STO_PPC64_LOCAL_MASK.
 470
 471 2018-07-24  Alan Modra  <amodra@gmail.com>
 472
 473         PR 23430
 474         * elf/common.h (SHT_SYMTAB_SHNDX): Fix comment typo.
 475
 476 2018-07-20  Chenghua Xu  <paul.hua.gm@gmail.com>
 477             Maciej W. Rozycki  <macro@mips.com>
 478
 479         * elf/mips.h (AFL_ASE_MMI): New macro.
 480         (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_MMI.
 481         * opcode/mips.h (ASE_LOONGSON_MMI): New macro.
 482
 483 2018-07-17  Maciej W. Rozycki  <macro@mips.com>
 484
 485         * bfdlink.h (bfd_link_hash_entry): Add `rel_from_abs' member.
 486
 487 2018-07-06  Alan Modra  <amodra@gmail.com>
 488
 489         * diagnostics.h: Comment on macro usage.
 490
 491 2018-07-05  Simon Marchi  <simon.marchi@polymtl.ca>
 492
 493         * diagnostics.h (DIAGNOSTIC_IGNORE_DEPRECATED_DECLARATIONS):
 494         Define for clang.
 495
 496 2018-07-02  Maciej W. Rozycki  <macro@mips.com>
 497
 498         PR tdep/8282
 499         * dis-asm.h (disasm_option_arg_t): New typedef.
 500         (disasm_options_and_args_t): Likewise.
 501         (disasm_options_t): Add `arg' member, document members.
 502         (disassembler_options_mips): New prototype.
 503         (disassembler_options_arm, disassembler_options_powerpc)
 504         (disassembler_options_s390): Update prototypes.
 505
 506 2018-06-29  Tamar Christina  <tamar.christina@arm.com>
 507
 508         PR binutils/23192
 509         *opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_Em16.
 510
 511 2018-06-26  Alan Modra  <amodra@gmail.com>
 512
 513         * elf/internal.h (ELF_SECTION_IN_SEGMENT): Revert last change.
 514
 515 2018-06-24  Nick Clifton  <nickc@redhat.com>
 516
 517         2.31 branch created.
 518
 519 2018-06-21  Alan Hayward  <alan.hayward@arm.com>
 520
 521         * elf/internal.h (ELF_SECTION_IN_SEGMENT): Don’t check addresses
 522         for non SHT_NOBITS.
 523
 524 2018-06-19  Simon Marchi  <simon.marchi@ericsson.com>
 525
 526         Sync with GCC
 527
 528         2018-05-24  Tom Rix  <trix@juniper.net>
 529
 530         * dwarf2.def (DW_FORM_strx*, DW_FORM_addrx*): New.
 531
 532         2017-11-20  Kito Cheng  <kito.cheng@gmail.com>
 533
 534         * longlong.h [__riscv] (__umulsidi3): Define.
 535         [__riscv] (umul_ppmm): Likewise.
 536         [__riscv] (__muluw3): Likewise.
 537
 538 2018-06-14  Faraz Shahbazker  <Faraz.Shahbazker@mips.com>
 539
 540         * elf/mips.h (AFL_ASE_GINV, AFL_ASE_RESERVED1): New macros.
 541         (AFL_ASE_MASK): Update to include AFL_ASE_GINV.
 542         * opcode/mips.h: Document "+\" operand format.
 543         (ASE_GINV): New macro.
 544
 545 2018-06-13  Scott Egerton  <scott.egerton@imgtec.com>
 546             Faraz Shahbazker  <Faraz.Shahbazker@mips.com>
 547
 548         * elf/mips.h (AFL_ASE_CRC): New macro.
 549         (AFL_ASE_MASK): Update to include AFL_ASE_CRC.
 550         * opcode/mips.h (ASE_CRC): New macro.
 551         * opcode/mips.h (ASE_CRC64): Likewise.
 552
 553 2018-06-04  Max Filippov  <jcmvbkbc@gmail.com>
 554
 555         * elf/xtensa.h (xtensa_read_table_entries)
 556         (xtensa_compute_fill_extra_space): New declarations.
 557
 558 2018-06-04  H.J. Lu  <hongjiu.lu@intel.com>
 559
 560         * diagnostics.h (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): Always
 561         define for GCC.
 562
 563 2018-06-04  H.J. Lu  <hongjiu.lu@intel.com>
 564
 565         * diagnostics.h (DIAGNOSTIC_STRINGIFY_1): New.
 566         (DIAGNOSTIC_STRINGIFY): Likewise.
 567         (DIAGNOSTIC_IGNORE): Replace STRINGIFY with DIAGNOSTIC_STRINGIFY.
 568         (DIAGNOSTIC_IGNORE_SELF_MOVE): Define empty if not defined.
 569         (DIAGNOSTIC_IGNORE_DEPRECATED_REGISTER): Likewise.
 570         (DIAGNOSTIC_IGNORE_UNUSED_FUNCTION): Likewise.
 571         (DIAGNOSTIC_IGNORE_SWITCH_DIFFERENT_ENUM_TYPES): Likewise.
 572         (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): New.
 573
 574 2018-06-01  H.J. Lu  <hongjiu.lu@intel.com>
 575
 576         * diagnostics.h: Moved from ../gdb/common/diagnostics.h.
 577
 578 2018-05-28  Bernd Edlinger  <bernd.edlinger@hotmail.de>
 579
 580         * splay-tree.h (splay_tree_compare_strings,
 581         splay_tree_delete_pointers): Declare new utility functions.
 582
 583 2018-05-21  Peter Bergner  <bergner@vnet.ibm.com.com>
 584
 585         * opcode/ppc.h (PPC_OPERAND_FAKE): Delete macro.
 586
 587 2018-05-18  Kito Cheng  <kito.cheng@gmail.com>
 588
 589         * elf/riscv.h (EF_RISCV_RVE): New define.
 590
 591 2018-05-18  John Darrington  <john@darrington.wattle.id.au>
 592
 593         * elf/s12z.h: New header.
 594
 595 2018-05-15  Tamar Christina  <tamar.christina@arm.com>
 596
 597         PR binutils/21446
 598         * opcode/aarch64.h (F_SYS_READ, F_SYS_WRITE): New.
 599
 600 2018-05-15  Tamar Christina  <tamar.christina@arm.com>
 601
 602         PR binutils/21446
 603         * opcode/aarch64.h (aarch64_operand_error): Add non_fatal.
 604         (aarch64_print_operand): Support notes.
 605
 606 2018-05-15  Tamar Christina  <tamar.christina@arm.com>
 607
 608         PR binutils/21446
 609         * opcode/aarch64.h (aarch64_opnd_info): Change sysreg to struct.
 610         (aarch64_decode_insn): Accept error struct.
 611
 612 2018-05-15  Francois H. Theron  <francois.theron@netronome.com>
 613
 614         * opcode/nfp.h: Use uint64_t instead of bfd_vma.
 615
 616 2018-05-10  John Darrington  <john@darrington.wattle.id.au>
 617
 618         * elf/common.h (EM_S12Z): New macro.
 619
 620 2018-05-09  Sebastian Rasmussen  <sebras@gmail.com>
 621
 622         * mach-o/unwind.h (MACH_O_UNWIND_X86_64_RBP_FRAME_REGISTERS):
 623         Rename from MACH_O_UNWIND_X86_64_RBP_FRAME_REGSITERS.
 624         (MACH_O_UNWIND_X86_EBP_FRAME_REGISTERS): Rename from
 625         MACH_O_UNWIND_X86_EBP_FRAME_REGSITERS.
 626
 627 2018-05-08  Jim Wilson  <jimw@sifive.com>
 628
 629         * opcode/riscv-opc.h (MATCH_C_SRLI64, MASK_C_SRLI64): New.
 630         (MATCH_C_SRAI64, MASK_C_SRAI64): New.
 631         (MATCH_C_SLLI64, MASK_C_SLLI64): New.
 632
 633 2018-05-07  Peter Bergner  <bergner@vnet.ibm.com.com>
 634
 635         * opcode/ppc.h (powerpc_num_opcodes): Change type to unsigned.
 636         (vle_num_opcodes): Likewise.
 637         (spe2_num_opcodes): Likewise.
 638
 639 2018-05-04  Alan Modra  <amodra@gmail.com>
 640
 641         * ansidecl.h: Import from gcc.
 642         * coff/internal.h (struct internal_scnhdr): Add ATTRIBUTE_NONSTRING
 643         to s_name.
 644         (struct internal_syment): Add ATTRIBUTE_NONSTRING to _n_name.
 645
 646 2018-04-30  Francois H. Theron <francois.theron@netronome.com>
 647
 648         * dis-asm.h: Added print_nfp_disassembler_options prototype.
 649         * elf/common.h: Added EM_NFP, officially assigned. See Google Group
 650         Generic System V Application Binary Interface.
 651         * elf/nfp.h: New, for NFP support.
 652         * opcode/nfp.h: New, for NFP support.
 653
 654 2018-04-25  Christophe Lyon  <christophe.lyon@st.com>
 655         Mickaël Guêné  <mickael.guene@st.com>
 656
 657         * elf/arm.h: Add R_ARM_TLS_GD32_FDPIC, R_ARM_TLS_LDM32_FDPIC,
 658         R_ARM_TLS_IE32_FDPIC.
 659
 660 2018-04-25  Christophe Lyon  <christophe.lyon@st.com>
 661         Mickaël Guêné  <mickael.guene@st.com>
 662
 663         * elf/arm.h (R_ARM_GOTFUNCDESC, R_ARM_GOTOFFFUNCDESC)
 664         (R_ARM_FUNCDESC)
 665         (R_ARM_FUNCDESC_VALUE): Define new relocations.
 666
 667 2018-04-25  Christophe Lyon  <christophe.lyon@st.com>
 668         Mickaël Guêné  <mickael.guene@st.com>
 669
 670         * elf/arm.h (EF_ARM_FDPIC): New.
 671
 672 2018-04-18  Alan Modra  <amodra@gmail.com>
 673
 674         * coff/mipspe.h: Delete.
 675
 676 2018-04-18  Alan Modra  <amodra@gmail.com>
 677
 678         * aout/dynix3.h: Delete.
 679
 680 2018-04-17 Andrew Sadek  <andrew.sadek.se@gmail.com>
 681
 682         Microblaze Target: PIC data text relative
 683
 684         * bfdlink.h (Add flag): Add new flag @ 'bfd_link_info' struct.
 685         * elf/microblaze.h (Add 3 new relocations):
 686         R_MICROBLAZE_TEXTPCREL_64, R_MICROBLAZE_TEXTREL_64
 687         and R_MICROBLAZE_TEXTREL_32_LO for relax function.
 688
 689 2018-04-17  Alan Modra  <amodra@gmail.com>
 690
 691         * elf/i370.h: Revert removal.
 692         * elf/i860.h: Likewise.
 693         * elf/i960.h: Likewise.
 694
 695 2018-04-16  Alan Modra  <amodra@gmail.com>
 696
 697         * coff/sparc.h: Delete.
 698
 699 2018-04-16  Alan Modra  <amodra@gmail.com>
 700
 701         * aout/host.h: Remove m68k-aout and m68k-coff support.
 702         * aout/hp300hpux.h: Delete.
 703         * coff/apollo.h: Delete.
 704         * coff/aux-coff.h: Delete.
 705         * coff/m68k.h: Delete.
 706
 707 2018-04-16  Alan Modra  <amodra@gmail.com>
 708
 709         * dis-asm.h: Remove sh5 and sh64 support.
 710
 711 2018-04-16  Alan Modra  <amodra@gmail.com>
 712
 713         * coff/internal.h: Remove w65 support.
 714         * coff/w65.h: Delete.
 715
 716 2018-04-16  Alan Modra  <amodra@gmail.com>
 717
 718         * coff/we32k.h: Delete.
 719
 720 2018-04-16  Alan Modra  <amodra@gmail.com>
 721
 722         * coff/internal.h: Remove m88k support.
 723         * coff/m88k.h: Delete.
 724         * opcode/m88k.h: Delete.
 725
 726 2018-04-16  Alan Modra  <amodra@gmail.com>
 727
 728         * elf/i370.h: Delete.
 729         * opcode/i370.h: Delete.
 730
 731 2018-04-16  Alan Modra  <amodra@gmail.com>
 732
 733         * coff/h8500.h: Delete.
 734         * coff/internal.h: Remove h8500 support.
 735
 736 2018-04-16  Alan Modra  <amodra@gmail.com>
 737
 738         * coff/h8300.h: Delete.
 739
 740 2018-04-16  Alan Modra  <amodra@gmail.com>
 741
 742         * ieee.h: Delete.
 743
 744 2018-04-16  Alan Modra  <amodra@gmail.com>
 745
 746         * aout/host.h: Remove newsos3 support.
 747
 748 2018-04-16  Alan Modra  <amodra@gmail.com>
 749
 750         * nlm/ChangeLog-9315: Delete.
 751         * nlm/alpha-ext.h: Delete.
 752         * nlm/common.h: Delete.
 753         * nlm/external.h: Delete.
 754         * nlm/i386-ext.h: Delete.
 755         * nlm/internal.h: Delete.
 756         * nlm/ppc-ext.h: Delete.
 757         * nlm/sparc32-ext.h: Delete.
 758
 759 2018-04-16  Alan Modra  <amodra@gmail.com>
 760
 761         * opcode/tahoe.h: Delete.
 762
 763 2018-04-11  Alan Modra  <amodra@gmail.com>
 764
 765         * aout/adobe.h: Delete.
 766         * aout/reloc.h: Delete.
 767         * coff/i860.h: Delete.
 768         * coff/i960.h: Delete.
 769         * elf/i860.h: Delete.
 770         * elf/i960.h: Delete.
 771         * opcode/i860.h: Delete.
 772         * opcode/i960.h: Delete.
 773         * aout/aout64.h (enum reloc_type): Trim off 29k and other unused values.
 774         * aout/ar.h (ARMAGB): Remove.
 775         * coff/internal.h (struct internal_aouthdr, struct internal_scnhdr,
 776         union internal_auxent): Remove i960 support.
 777
 778 2018-04-09  Alan Modra  <amodra@gmail.com>
 779
 780         * elf/ppc.h (R_PPC_PLTSEQ, R_PPC_PLTCALL): Define.
 781         * elf/ppc64.h (R_PPC64_PLTSEQ, R_PPC64_PLTCALL): Define.
 782
 783 2018-03-28  Renlin Li  <renlin.li@arm.com>
 784
 785         PR ld/22970
 786         * elf/aarch64.h: Add relocation number for
 787         R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12,
 788         R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC,
 789         R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12,
 790         R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC,
 791         R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12,
 792         R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC,
 793         R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12,
 794         R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC.
 795
 796 2018-03-28  Nick Clifton  <nickc@redhat.com>
 797
 798         PR 22988
 799         * opcode/aarch64.h (enum aarch64_opnd): Add
 800         AARCH64_OPND_SVE_ADDR_R.
 801
 802 2018-03-21  H.J. Lu  <hongjiu.lu@intel.com>
 803
 804         * elf/common.h (DF_1_KMOD): New.
 805         (DF_1_WEAKFILTER): Likewise.
 806         (DF_1_NOCOMMON): Likewise.
 807
 808 2018-03-14  Kito Cheng  <kito.cheng@gmail.com>
 809
 810         * opcode/riscv.h (OP_MASK_FUNCT3): New.
 811         (OP_SH_FUNCT3): Likewise.
 812         (OP_MASK_FUNCT7): Likewise.
 813         (OP_SH_FUNCT7): Likewise.
 814         (OP_MASK_OP2): Likewise.
 815         (OP_SH_OP2): Likewise.
 816         (OP_MASK_CFUNCT4): Likewise.
 817         (OP_SH_CFUNCT4): Likewise.
 818         (OP_MASK_CFUNCT3): Likewise.
 819         (OP_SH_CFUNCT3): Likewise.
 820         (riscv_insn_types): Likewise.
 821
 822 2018-03-13  Nick Clifton  <nickc@redhat.com>
 823
 824         PR 22113
 825         * coff/pe.h (struct pex64_unwind_info): Add a rawUnwindCodesEnd
 826         field.
 827
 828 2018-03-08  H.J. Lu  <hongjiu.lu@intel.com>
 829
 830         * opcode/i386 (OLDGCC_COMPAT): Removed.
 831
 832 2018-02-27  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 833
 834         * opcode/arm.h (ARM_FEATURE_COPY): Remove macro definition.
 835
 836 2018-02-20  Maciej W. Rozycki  <macro@mips.com>
 837
 838         * opcode/mips.h: Remove `M' operand code.
 839
 840 2018-02-12  Zebediah Figura  <z.figura12@gmail.com>
 841
 842         * coff/msdos.h: New header.
 843         * coff/pe.h: Move common defines to msdos.h.
 844         * coff/powerpc.h: Likewise.
 845
 846 2018-01-13  Nick Clifton  <nickc@redhat.com>
 847
 848         2.30 branch created.
 849
 850 2018-01-11  H.J. Lu  <hongjiu.lu@intel.com>
 851
 852         PR ld/22393
 853         * bfdlink.h (bfd_link_info): Add separate_code.
 854
 855 2018-01-04  Jim Wilson  <jimw@sifive.com>
 856
 857         * opcode/riscv-opc.h (CSR_SBADADDR): Rename to CSR_STVAL.  Rename
 858         DECLARE_CSR entry.  Add alias to map sbadaddr to CSR_STVAL.
 859         (CSR_MBADADDR): Rename to CSR_MTVAL.  Rename DECLARE_CSR entry.
 860         Add alias to map mbadaddr to CSR_MTVAL.
 861
 862 2018-01-03  Alan Modra  <amodra@gmail.com>
 863
 864         Update year range in copyright notice of all files.
 865
 866 For older changes see ChangeLog-2017
 867 \f
 868 Copyright (C) 2018 Free Software Foundation, Inc.
 869
 870 Copying and distribution of this file, with or without modification,
 871 are permitted in any medium without royalty provided the copyright
 872 notice and this notice are preserved.
 873
 874 Local Variables:
 875 mode: change-log
 876 left-margin: 8
 877 fill-column: 74
 878 version-control: never
 879 End: