include/ChangeLog

   1 2018-11-13  Thomas Preud'homme  <thomas.preudhomme@arm.com>
   2
   3         * opcode/arm.h (ARM_AEXT_V6M_ONLY): Merge into its use in ARM_AEXT_V6M.
   4         (ARM_ARCH_V6M_ONLY): Remove.
   5         (ARM_EXT_V1, ARM_EXT_V2, ARM_EXT_V2S, ARM_EXT_V3, ARM_EXT_V3M,
   6         ARM_EXT_V4, ARM_EXT_V4T, ARM_EXT_V5, ARM_EXT_V5T, ARM_EXT_V5ExP,
   7         ARM_EXT_V5E, ARM_EXT_V5J, ARM_EXT_V6, ARM_EXT_V6K, ARM_EXT_V8,
   8         ARM_EXT_V6T2, ARM_EXT_DIV, ARM_EXT_V5E_NOTM, ARM_EXT_V6_NOTM,
   9         ARM_EXT_V7, ARM_EXT_V7A, ARM_EXT_V7R, ARM_EXT_V7M, ARM_EXT_V6M,
  10         ARM_EXT_BARRIER, ARM_EXT_THUMB_MSR, ARM_EXT_V6_DSP, ARM_EXT_MP,
  11         ARM_EXT_SEC, ARM_EXT_OS, ARM_EXT_ADIV, ARM_EXT_VIRT, ARM_EXT2_PAN,
  12         ARM_EXT2_V8_2A, ARM_EXT2_V8M, ARM_EXT2_ATOMICS, ARM_EXT2_V6T2_V8M,
  13         ARM_EXT2_FP16_INST, ARM_EXT2_V8M_MAIN, ARM_EXT2_RAS, ARM_EXT2_V8_3A,
  14         ARM_EXT2_V8A, ARM_EXT2_V8_4A, ARM_EXT2_FP16_FML, ARM_EXT2_V8_5A,
  15         ARM_EXT2_SB, ARM_EXT2_PREDRES, ARM_CEXT_XSCALE, ARM_CEXT_MAVERICK,
  16         ARM_CEXT_IWMMXT, ARM_CEXT_IWMMXT2, FPU_ENDIAN_PURE, FPU_ENDIAN_BIG,
  17         FPU_FPA_EXT_V1, FPU_FPA_EXT_V2, FPU_MAVERICK, FPU_VFP_EXT_V1xD,
  18         FPU_VFP_EXT_V1, FPU_VFP_EXT_V2, FPU_VFP_EXT_V3xD, FPU_VFP_EXT_V3,
  19         FPU_NEON_EXT_V1, FPU_VFP_EXT_D32, FPU_VFP_EXT_FP16, FPU_NEON_EXT_FMA,
  20         FPU_VFP_EXT_FMA, FPU_VFP_EXT_ARMV8, FPU_NEON_EXT_ARMV8,
  21         FPU_CRYPTO_EXT_ARMV8, CRC_EXT_ARMV8, FPU_VFP_EXT_ARMV8xD,
  22         FPU_NEON_EXT_RDMA, FPU_NEON_EXT_DOTPROD, ARM_AEXT_V1, ARM_AEXT_V2,
  23         ARM_AEXT_V2S, ARM_AEXT_V3, ARM_AEXT_V3M, ARM_AEXT_V4xM, ARM_AEXT_V4,
  24         ARM_AEXT_V4TxM, ARM_AEXT_V4T, ARM_AEXT_V5xM, ARM_AEXT_V5,
  25         ARM_AEXT_V5TxM, ARM_AEXT_V5T, ARM_AEXT_V5TExP, ARM_AEXT_V5TE,
  26         ARM_AEXT_V5TEJ, ARM_AEXT_V6, ARM_AEXT_V6K, ARM_AEXT_V6Z, ARM_AEXT_V6KZ,
  27         ARM_AEXT_V6T2, ARM_AEXT_V6KT2, ARM_AEXT_V6ZT2, ARM_AEXT_V6KZT2,
  28         ARM_AEXT_V7_ARM, ARM_AEXT_V7A, ARM_AEXT_V7VE, ARM_AEXT_V7R,
  29         ARM_AEXT_NOTM, ARM_AEXT_V6M_ONLY, ARM_AEXT_V6M, ARM_AEXT_V6SM,
  30         ARM_AEXT_V7M, ARM_AEXT_V7, ARM_AEXT_V7EM, ARM_AEXT_V8A, ARM_AEXT2_V8A,
  31         ARM_AEXT2_V8_1A, ARM_AEXT2_V8_2A, ARM_AEXT2_V8_3A, ARM_AEXT2_V8_4A,
  32         ARM_AEXT2_V8_5A, ARM_AEXT_V8M_BASE, ARM_AEXT_V8M_MAIN,
  33         ARM_AEXT_V8M_MAIN_DSP, ARM_AEXT2_V8M, ARM_AEXT2_V8M_BASE,
  34         ARM_AEXT2_V8M_MAIN, ARM_AEXT2_V8M_MAIN_DSP, ARM_AEXT_V8R,
  35         ARM_AEXT2_V8R, FPU_VFP_V1xD, FPU_VFP_V1, FPU_VFP_V2, FPU_VFP_V3D16,
  36         FPU_VFP_V3, FPU_VFP_V3xD, FPU_VFP_V4D16, FPU_VFP_V4, FPU_VFP_V4_SP_D16,
  37         FPU_VFP_V5D16, FPU_VFP_ARMV8, FPU_NEON_ARMV8, FPU_CRYPTO_ARMV8,
  38         FPU_VFP_HARD, FPU_FPA, FPU_ARCH_VFP, FPU_ARCH_FPE, FPU_ARCH_FPA,
  39         FPU_ARCH_VFP_V1xD, FPU_ARCH_VFP_V1, FPU_ARCH_VFP_V2,
  40         FPU_ARCH_VFP_V3D16_FP16, FPU_ARCH_VFP_V3, FPU_ARCH_VFP_V3_FP16,
  41         FPU_ARCH_VFP_V3xD_FP16, FPU_ARCH_NEON_V1, FPU_ARCH_VFP_V3_PLUS_NEON_V1,
  42         FPU_ARCH_NEON_FP16, FPU_ARCH_VFP_HARD, FPU_ARCH_VFP_V4,
  43         FPU_ARCH_VFP_V4D16, FPU_ARCH_VFP_V4_SP_D16, FPU_ARCH_VFP_V5D16,
  44         FPU_ARCH_VFP_V5_SP_D16, FPU_ARCH_NEON_VFP_V4, FPU_ARCH_VFP_ARMV8,
  45         FPU_ARCH_NEON_VFP_ARMV8, FPU_ARCH_CRYPTO_NEON_VFP_ARMV8,
  46         FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_DOTPROD, ARCH_CRC_ARMV8,
  47         FPU_ARCH_NEON_VFP_ARMV8_1, FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1,
  48         FPU_ARCH_DOTPROD_NEON_VFP_ARMV8, ARM_ARCH_V1, ARM_ARCH_V2,
  49         ARM_ARCH_V2S, ARM_ARCH_V3, ARM_ARCH_V3M, ARM_ARCH_V4xM, ARM_ARCH_V4,
  50         ARM_ARCH_V4TxM, ARM_ARCH_V4T, ARM_ARCH_V5xM, ARM_ARCH_V5,
  51         ARM_ARCH_V5TxM, ARM_ARCH_V5T, ARM_ARCH_V5TExP, ARM_ARCH_V5TE,
  52         ARM_ARCH_V5TEJ, ARM_ARCH_V6, ARM_ARCH_V6K, ARM_ARCH_V6Z, ARM_ARCH_V6KZ,
  53         ARM_ARCH_V6T2, ARM_ARCH_V6KT2, ARM_ARCH_V6ZT2, ARM_ARCH_V6KZT2,
  54         ARM_ARCH_V6M, ARM_ARCH_V6SM, ARM_ARCH_V7, ARM_ARCH_V7A, ARM_ARCH_V7VE,
  55         ARM_ARCH_V7R, ARM_ARCH_V7M, ARM_ARCH_V7EM, ARM_ARCH_V8A,
  56         ARM_ARCH_V8A_CRC, ARM_ARCH_V8_1A, ARM_ARCH_V8_2A, ARM_ARCH_V8_3A,
  57         ARM_ARCH_V8_4A, ARM_ARCH_V8_5A, ARM_ARCH_V8M_BASE, ARM_ARCH_V8M_MAIN,
  58         ARM_ARCH_V8M_MAIN_DSP, ARM_ARCH_V8R): Reindent.
  59
  60 2018-11-12  Sudakshina Das  <sudi.das@arm.com>
  61
  62         * opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_ADDR_SIMPLE_2.
  63         (aarch64_insn_class): Add ldstgv_indexed.
  64
  65 2018-11-12  Sudakshina Das  <sudi.das@arm.com>
  66
  67         * opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_ADDR_SIMM11
  68         and AARCH64_OPND_ADDR_SIMM13.
  69         (aarch64_opnd_qualifier): Add new AARCH64_OPND_QLF_imm_tag.
  70
  71 2018-11-12  Sudakshina Das  <sudi.das@arm.com>
  72
  73         * opcode/aarch64.h (aarch64_opnd): Add
  74         AARCH64_OPND_UIMM4_ADDG and AARCH64_OPND_UIMM10 as new enums.
  75
  76 2018-11-12  Sudakshina Das  <sudi.das@arm.com>
  77
  78         * opcode/aarch64.h (AARCH64_FEATURE_MEMTAG): New.
  79
  80 2018-11-07  Roman Bolshakov <r.bolshakov@yadro.com>
  81             Saagar Jha  <saagar@saagarjha.com>
  82
  83         * mach-o/external.h (mach_o_nversion_min_command_external): Rename
  84         reserved to sdk.
  85         (mach_o_note_command_external): New.
  86         (mach_o_build_version_command_external): New.
  87         * mach-o/loader.h (BFD_MACH_O_LC_VERSION_MIN_TVOS): Define.
  88         (BFD_MACH_O_LC_NOTE): Define.
  89
  90 2018-11-06  Romain Margheriti  <lilrom13@gmail.com>
  91
  92         PR 23742
  93         * mach-o/loader.h: Add BFD_MACH_O_LC_BUILD_VERSION.
  94
  95 2018-11-06  Sudakshina Das  <sudi.das@arm.com>
  96
  97         * opcode/arm.h (ARM_ARCH_V8_5A): Move ARM_EXT2_PREDRES and
  98         ARM_EXT2_SB to ...
  99         (ARM_AEXT2_V8_5A): Here.
 100
 101 2018-10-26  John Baldwin  <jhb@FreeBSD.org>
 102
 103         * elf/common.h (AT_FREEBSD_HWCAP2): Define.
 104
 105 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 106
 107         * opcode/aarch64.h (AARCH64_FEATURE_SSBS): New.
 108         (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_SSBS by default.
 109
 110 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 111
 112         * opcode/aarch64.h (AARCH64_FEATURE_SCXTNUM): New.
 113         (AARCH64_FEATURE_ID_PFR2): New.
 114         (AARCH64_ARCH_V8_5): Add both by default.
 115
 116 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 117
 118         * opcode/aarch64.h (AARCH64_FEATURE_BTI): New.
 119         (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_BTI by default.
 120         (aarch64_opnd): Add AARCH64_OPND_BTI_TARGET.
 121         (HINT_OPD_CSYNC, HINT_OPD_C, HINT_OPD_J): New macros to
 122         define HINT #imm values.
 123         (HINT_OPD_JC, HINT_OPD_NULL): Likewise.
 124
 125 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 126
 127         * opcode/aarch64.h (AARCH64_FEATURE_RNG): New.
 128
 129 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 130
 131         * opcode/aarch64.h (AARCH64_FEATURE_CVADP): New.
 132
 133 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 134
 135         * opcode/aarch64.h (AARCH64_FEATURE_PREDRES): New.
 136         (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_PREDRES by default.
 137         (aarch64_opnd): Add AARCH64_OPND_SYSREG_SR.
 138         (aarch64_sys_regs_sr): Declare new table.
 139
 140 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 141
 142         * opcode/aarch64.h (AARCH64_FEATURE_SB): New.
 143         (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_SB by default.
 144
 145 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 146
 147         * opcode/aarch64.h (AARCH64_FEATURE_FLAGMANIP): New.
 148         (AARCH64_FEATURE_FRINTTS): New.
 149         (AARCH64_ARCH_V8_5): Add both by default.
 150
 151 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 152
 153         * opcode/aarch64.h (AARCH64_FEATURE_V8_5): New.
 154         (AARCH64_ARCH_V8_5): New.
 155
 156 2018-10-08  Alan Modra  <amodra@gmail.com>
 157
 158         * bfdlink.h (struct bfd_link_info): Add load_phdrs field.
 159
 160 2018-10-05  Sudakshina Das  <sudi.das@arm.com>
 161
 162         * opcode/arm.h (ARM_EXT2_PREDRES): New.
 163         (ARM_ARCH_V8_5A): Add ARM_EXT2_PREDRES by default.
 164
 165 2018-10-05  Sudakshina Das  <sudi.das@arm.com>
 166
 167         * opcode/arm.h (ARM_EXT2_SB): New.
 168         (ARM_ARCH_V8_5A): Add ARM_EXT2_SB by default.
 169
 170 2018-10-05  Sudakshina Das  <sudi.das@arm.com>
 171
 172         * opcode/arm.h (ARM_EXT2_V8_5A): New.
 173         (ARM_AEXT2_V8_5A, ARM_ARCH_V8_5A): New.
 174
 175 2018-10-05  Richard Henderson  <rth@twiddle.net>
 176
 177         * elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_PCREL_PG21,
 178         R_OR1K_GOT_PG21, R_OR1K_TLS_GD_PG21, R_OR1K_TLS_LDM_PG21,
 179         R_OR1K_TLS_IE_PG21, R_OR1K_LO13, R_OR1K_GOT_LO13,
 180         R_OR1K_TLS_GD_LO13, R_OR1K_TLS_LDM_LO13, R_OR1K_TLS_IE_LO13,
 181         R_OR1K_SLO13, R_OR1K_PLTA26.
 182
 183 2018-10-05  Richard Henderson  <rth@twiddle.net>
 184
 185         * elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_AHI16,
 186         R_OR1K_GOTOFF_AHI16, R_OR1K_TLS_IE_AHI16, R_OR1K_TLS_LE_AHI16,
 187         R_OR1K_SLO16, R_OR1K_GOTOFF_SLO16, R_OR1K_TLS_LE_SLO16.
 188
 189 2018-10-03  Tamar Christina  <tamar.christina@arm.com>
 190
 191         * opcode/aarch64.h (aarch64_inst): Remove.
 192         (enum err_type): Add ERR_VFI.
 193         (aarch64_is_destructive_by_operands): New.
 194         (init_insn_sequence): New.
 195         (aarch64_decode_insn): Remove param name.
 196
 197 2018-10-03  Tamar Christina  <tamar.christina@arm.com>
 198
 199         * opcode/aarch64.h (struct aarch64_opcode): Expand verifiers to take
 200         more arguments.
 201
 202 2018-10-03  Tamar Christina  <tamar.christina@arm.com>
 203
 204         * opcode/aarch64.h (enum err_type): New.
 205         (aarch64_decode_insn): Use it.
 206
 207 2018-10-03  Tamar Christina  <tamar.christina@arm.com>
 208
 209         * opcode/aarch64.h (struct aarch64_instr_sequence): New.
 210         (aarch64_opcode_encode): Use it.
 211
 212 2018-10-03  Tamar Christina  <tamar.christina@arm.com>
 213
 214         * opcode/aarch64.h (struct aarch64_opcode): Add constraints,
 215         extend flags field size.
 216         (F_SCAN, C_SCAN_MOVPRFX, C_MAX_ELEM): New.
 217
 218 2018-10-03  John Darrington <john@darrington.wattle.id.au>
 219
 220         * dis-asm.h (print_insn_s12z): New declaration.
 221
 222 2018-10-02  Palmer Dabbelt  <palmer@sifive.com>
 223
 224         * opcode/riscv-opc.h (MATCH_FENCE_TSO): New define.
 225         (MASK_FENCE_TSO): Likewise.
 226
 227 2018-10-01  Cupertino Miranda <cmiranda@synopsys.com>
 228
 229         * arc-reloc.def (ARC_TLS_LE_32): Updated reloc formula.
 230
 231 2018-09-21  H.J. Lu  <hongjiu.lu@intel.com>
 232
 233         PR binutils/23694
 234         * include/elf/internal.h (ELF_SECTION_IN_SEGMENT_1): Don't
 235         include zero size sections at start of PT_NOTE segment.
 236
 237 2018-09-20  Nelson Chu <nelson.chu1990@gmail.com>
 238
 239         * elf/nds32.h: Remove the unused target features.
 240         * dis-asm.h (disassemble_init_nds32): Declared.
 241         * elf/nds32.h (E_NDS32_NULL): Removed.
 242         (E_NDS32_HAS_DSP_INST, E_NDS32_HAS_ZOL): New.
 243         * opcode/nds32.h: Ident.
 244         (N32_SUB6, INSN_LW): New macros.
 245         (enum n32_opcodes): Updated.
 246         * elf/nds32.h: Doc fixes.
 247         * elf/nds32.h: Add R_NDS32_LSI.
 248         * elf/nds32.h: Add new relocations for TLS.
 249
 250 2018-09-20  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
 251
 252         * elf/common.h (AT_SUN_HWCAP): Rename to ...
 253         (AT_SUN_CAP_HW1): ... this.  Retain old name for backward
 254         compatibility.
 255         (AT_SUN_EMULATOR, AT_SUN_BRANDNAME, AT_SUN_BRAND_AUX1)
 256         (AT_SUN_BRAND_AUX2, AT_SUN_BRAND_AUX3, AT_SUN_CAP_HW2): Define.
 257
 258 2018-09-05  Simon Marchi  <simon.marchi@ericsson.com>
 259
 260         * diagnostics.h (DIAGNOSTIC_IGNORE_FORMAT_NONLITERAL): New macro.
 261
 262 2018-08-31  Alan Modra  <amodra@gmail.com>
 263
 264         * elf/ppc64.h (R_PPC64_REL16_HIGH, R_PPC64_REL16_HIGHA),
 265         (R_PPC64_REL16_HIGHER, R_PPC64_REL16_HIGHERA),
 266         (R_PPC64_REL16_HIGHEST, R_PPC64_REL16_HIGHESTA): Define.
 267         (R_PPC64_LO_DS_OPT, R_PPC64_16DX_HA): Bump value.
 268
 269 2018-08-30  Kito Cheng  <kito@andestech.com>
 270
 271         * opcode/riscv.h (MAX_SUBSET_NUM): New.
 272         (riscv_opcode): Add xlen_requirement field and change type of
 273         subset.
 274
 275 2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
 276
 277         * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS264E.
 278         * opcode/mips.h (CPU_XXX): New CPU_GS264E.
 279
 280 2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
 281
 282         * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS464E.
 283         * opcode/mips.h (CPU_XXX): New CPU_GS464E.
 284
 285 2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
 286
 287         * elf/mips.h (E_MIPS_MACH_XXX): Rename E_MIPS_MACH_LS3A to
 288         E_MIPS_MACH_GS464.
 289         (AFL_EXT_XXX): Delete AFL_EXT_LOONGSON_3A.
 290         * opcode/mips.h (INSN_XXX): Delete INSN_LOONGSON_3A.
 291         (CPU_XXX): Rename CPU_LOONGSON_3A to CPU_GS464.
 292         * opcode/mips.h (mips_isa_table): Delete CPU_LOONGSON_3A case.
 293
 294 2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
 295
 296         * elf/mips.h (AFL_ASE_LOONGSON_EXT2): New macro.
 297         (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT2.
 298         * opcode/mips.h (ASE_LOONGSON_EXT2): New macro.
 299
 300 2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
 301
 302          * elf/mips.h (AFL_ASE_LOONGSON_EXT): New macro.
 303          (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT.
 304          * opcode/mips.h (ASE_LOONGSON_EXT): New macro.
 305
 306 2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
 307
 308         * elf/mips.h (AFL_ASE_LOONGSON_CAM): New macro.
 309         (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_CAM.
 310         * opcode/mips.h (ASE_LOONGSON_CAM): New macro.
 311
 312 2018-08-24  H.J. Lu  <hongjiu.lu@intel.com>
 313
 314         * elf/common.h (GNU_PROPERTY_X86_ISA_1_USED): Renamed to ...
 315         (GNU_PROPERTY_X86_COMPAT_ISA_1_USED): This.
 316         (GNU_PROPERTY_X86_ISA_1_NEEDED): Renamed to ...
 317         (GNU_PROPERTY_X86_COMPAT_ISA_1_NEEDED): This.
 318         (GNU_PROPERTY_X86_ISA_1_XXX): Renamed to ...
 319         (GNU_PROPERTY_X86_COMPAT_ISA_1_XXX): This.
 320         (GNU_PROPERTY_X86_UINT32_AND_LO): New.
 321         (GNU_PROPERTY_X86_UINT32_AND_HI): Likewise.
 322         (GNU_PROPERTY_X86_UINT32_OR_LO): Likewise.
 323         (GNU_PROPERTY_X86_UINT32_OR_HI): Likewise.
 324         (GNU_PROPERTY_X86_UINT32_OR_AND_LO): Likewise.
 325         (GNU_PROPERTY_X86_UINT32_OR_AND_HI): Likewise.
 326         (GNU_PROPERTY_X86_ISA_1_CMOV): Likewise.
 327         (GNU_PROPERTY_X86_ISA_1_SSE): Likewise.
 328         (GNU_PROPERTY_X86_ISA_1_SSE2): Likewise.
 329         (GNU_PROPERTY_X86_ISA_1_SSE3): Likewise.
 330         (GNU_PROPERTY_X86_ISA_1_SSSE3): Likewise.
 331         (GNU_PROPERTY_X86_ISA_1_SSE4_1): Likewise.
 332         (GNU_PROPERTY_X86_ISA_1_SSE4_2): Likewise.
 333         (GNU_PROPERTY_X86_ISA_1_AVX): Likewise.
 334         (GNU_PROPERTY_X86_ISA_1_AVX2): Likewise.
 335         (GNU_PROPERTY_X86_ISA_1_FMA): Likewise.
 336         (GNU_PROPERTY_X86_ISA_1_AVX512F): Likewise.
 337         (GNU_PROPERTY_X86_ISA_1_AVX512CD): Likewise.
 338         (GNU_PROPERTY_X86_ISA_1_AVX512ER): Likewise.
 339         (GNU_PROPERTY_X86_ISA_1_AVX512PF): Likewise.
 340         (GNU_PROPERTY_X86_ISA_1_AVX512VL): Likewise.
 341         (GNU_PROPERTY_X86_ISA_1_AVX512DQ): Likewise.
 342         (GNU_PROPERTY_X86_ISA_1_AVX512BW): Likewise.
 343         (GNU_PROPERTY_X86_ISA_1_AVX512_4FMAPS): Likewise.
 344         (GNU_PROPERTY_X86_ISA_1_AVX512_4VNNIW): Likewise.
 345         (GNU_PROPERTY_X86_ISA_1_AVX512_BITALG): Likewise.
 346         (GNU_PROPERTY_X86_ISA_1_AVX512_IFMA): Likewise.
 347         (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI): Likewise.
 348         (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI2): Likewise.
 349         (GNU_PROPERTY_X86_ISA_1_AVX512_VNNI): Likewise.
 350         (GNU_PROPERTY_X86_FEATURE_2_X86): Likewise.
 351         (GNU_PROPERTY_X86_FEATURE_2_X87): Likewise.
 352         (GNU_PROPERTY_X86_FEATURE_2_MMX): Likewise.
 353         (GNU_PROPERTY_X86_FEATURE_2_XMM): Likewise.
 354         (GNU_PROPERTY_X86_FEATURE_2_YMM): Likewise.
 355         (GNU_PROPERTY_X86_FEATURE_2_ZMM): Likewise.
 356         (GNU_PROPERTY_X86_FEATURE_2_FXSR): Likewise.
 357         (GNU_PROPERTY_X86_FEATURE_2_XSAVE): Likewise.
 358         (GNU_PROPERTY_X86_FEATURE_2_XSAVEOPT): Likewise.
 359         (GNU_PROPERTY_X86_FEATURE_2_XSAVEC): Likewise.
 360         (GNU_PROPERTY_X86_FEATURE_1_AND): Updated to
 361         (GNU_PROPERTY_X86_UINT32_AND_LO + 0).
 362         (GNU_PROPERTY_X86_ISA_1_NEEDED): Defined to
 363         (GNU_PROPERTY_X86_UINT32_OR_LO + 0).
 364         (GNU_PROPERTY_X86_FEATURE_2_NEEDED): New.  Defined to
 365         (GNU_PROPERTY_X86_UINT32_OR_LO + 1).
 366         (GNU_PROPERTY_X86_ISA_1_USED): Defined to
 367         (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 0).
 368         (GNU_PROPERTY_X86_FEATURE_2_USED): New.  Defined to
 369         (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 1).
 370
 371 2018-08-24  H.J. Lu  <hongjiu.lu@intel.com>
 372
 373         * elf/common.h (GNU_PROPERTY_X86_UINT32_VALID): New.
 374
 375 2018-08-21  John Darrington  <john@darrington.wattle.id.au>
 376
 377         * elf/s12z.h: Rename R_S12Z_UKNWN_3 to R_S12Z_EXT18.
 378
 379 2018-08-21  Alan Modra  <amodra@gmail.com>
 380
 381         * opcode/ppc.h (struct powerpc_operand): Correct "insert" comment.
 382         Mention use of "extract" function to provide default value.
 383         (PPC_OPERAND_OPTIONAL_VALUE): Delete.
 384         (ppc_optional_operand_value): Rewrite to use extract function.
 385
 386 2018-08-18  John Darrington  <john@darrington.wattle.id.au>
 387
 388         * opcode/s12z.h: New file.
 389
 390 2018-08-09  Richard Earnshaw  <rearnsha@arm.com>
 391
 392         * elf/arm.h: Updated comments for e_flags definitions.
 393
 394 2018-08-06  Claudiu Zissulescu  <claziss@synopsys.com>
 395
 396         * elf/arc.h (Tag_ARC_ATR_version): New tag.
 397
 398 2018-08-06  Claudiu Zissulescu  <claziss@synopsys.com>
 399
 400         * opcode/arc.h (ARC_OPCODE_ARCV1): Define.
 401
 402 2018-08-01  Richard Earnshaw  <rearnsha@arm.com>
 403
 404         Copy over from GCC
 405         2018-07-26  Martin Liska  <mliska@suse.cz>
 406
 407         PR lto/86548
 408         * libiberty.h (make_temp_file_with_prefix): New function.
 409
 410 2018-07-30  Jim Wilson  <jimw@sifive.com>
 411
 412         * opcode/riscv.h (INSN_TYPE, INSN_BRANCH, INSN_CONDBRANCH, INSN_JSR)
 413         (INSN_DREF, INSN_DATA_SIZE, INSN_DATA_SIZE_SHIFT, INSN_1_BYTE)
 414         (INSN_2_BYTE, INSN_4_BYTE, INSN_8_BYTE, INSN_16_BYTE): New.
 415
 416 2018-07-30  Andrew Jenner  <andrew@codesourcery.com>
 417
 418         * elf/common.h (EM_CSKY, EM_CSKY_OLD): Define.
 419         * elf/csky.h: New file.
 420
 421 2018-07-27  Chenghua Xu  <paul.hua.gm@gmail.com>
 422             Maciej W. Rozycki  <macro@linux-mips.org>
 423
 424         * elf/mips.h (AFL_ASE_MASK): Correct typo.
 425
 426 2018-07-26  Alex Chadwick  <Alex.Chadwick@cl.cam.ac.uk>
 427
 428         * opcode/ppc.h (PPC_OPCODE_750): Adjust comment.
 429
 430 2018-07-26  Alan Modra  <amodra@gmail.com>
 431
 432         * elf/ppc64.h: Specify byte offset to local entry for values
 433         of two to six in STO_PPC64_LOCAL_MASK.  Clarify r2 return
 434         value for such functions when entering via global entry point.
 435         Specify meaning of a value of one in STO_PPC64_LOCAL_MASK.
 436
 437 2018-07-24  Alan Modra  <amodra@gmail.com>
 438
 439         PR 23430
 440         * elf/common.h (SHT_SYMTAB_SHNDX): Fix comment typo.
 441
 442 2018-07-20  Chenghua Xu  <paul.hua.gm@gmail.com>
 443             Maciej W. Rozycki  <macro@mips.com>
 444
 445         * elf/mips.h (AFL_ASE_MMI): New macro.
 446         (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_MMI.
 447         * opcode/mips.h (ASE_LOONGSON_MMI): New macro.
 448
 449 2018-07-17  Maciej W. Rozycki  <macro@mips.com>
 450
 451         * bfdlink.h (bfd_link_hash_entry): Add `rel_from_abs' member.
 452
 453 2018-07-06  Alan Modra  <amodra@gmail.com>
 454
 455         * diagnostics.h: Comment on macro usage.
 456
 457 2018-07-05  Simon Marchi  <simon.marchi@polymtl.ca>
 458
 459         * diagnostics.h (DIAGNOSTIC_IGNORE_DEPRECATED_DECLARATIONS):
 460         Define for clang.
 461
 462 2018-07-02  Maciej W. Rozycki  <macro@mips.com>
 463
 464         PR tdep/8282
 465         * dis-asm.h (disasm_option_arg_t): New typedef.
 466         (disasm_options_and_args_t): Likewise.
 467         (disasm_options_t): Add `arg' member, document members.
 468         (disassembler_options_mips): New prototype.
 469         (disassembler_options_arm, disassembler_options_powerpc)
 470         (disassembler_options_s390): Update prototypes.
 471
 472 2018-06-29  Tamar Christina  <tamar.christina@arm.com>
 473
 474         PR binutils/23192
 475         *opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_Em16.
 476
 477 2018-06-26  Alan Modra  <amodra@gmail.com>
 478
 479         * elf/internal.h (ELF_SECTION_IN_SEGMENT): Revert last change.
 480
 481 2018-06-24  Nick Clifton  <nickc@redhat.com>
 482
 483         2.31 branch created.
 484
 485 2018-06-21  Alan Hayward  <alan.hayward@arm.com>
 486
 487         * elf/internal.h (ELF_SECTION_IN_SEGMENT): Don’t check addresses
 488         for non SHT_NOBITS.
 489
 490 2018-06-19  Simon Marchi  <simon.marchi@ericsson.com>
 491
 492         Sync with GCC
 493
 494         2018-05-24  Tom Rix  <trix@juniper.net>
 495
 496         * dwarf2.def (DW_FORM_strx*, DW_FORM_addrx*): New.
 497
 498         2017-11-20  Kito Cheng  <kito.cheng@gmail.com>
 499
 500         * longlong.h [__riscv] (__umulsidi3): Define.
 501         [__riscv] (umul_ppmm): Likewise.
 502         [__riscv] (__muluw3): Likewise.
 503
 504 2018-06-14  Faraz Shahbazker  <Faraz.Shahbazker@mips.com>
 505
 506         * elf/mips.h (AFL_ASE_GINV, AFL_ASE_RESERVED1): New macros.
 507         (AFL_ASE_MASK): Update to include AFL_ASE_GINV.
 508         * opcode/mips.h: Document "+\" operand format.
 509         (ASE_GINV): New macro.
 510
 511 2018-06-13  Scott Egerton  <scott.egerton@imgtec.com>
 512             Faraz Shahbazker  <Faraz.Shahbazker@mips.com>
 513
 514         * elf/mips.h (AFL_ASE_CRC): New macro.
 515         (AFL_ASE_MASK): Update to include AFL_ASE_CRC.
 516         * opcode/mips.h (ASE_CRC): New macro.
 517         * opcode/mips.h (ASE_CRC64): Likewise.
 518
 519 2018-06-04  Max Filippov  <jcmvbkbc@gmail.com>
 520
 521         * elf/xtensa.h (xtensa_read_table_entries)
 522         (xtensa_compute_fill_extra_space): New declarations.
 523
 524 2018-06-04  H.J. Lu  <hongjiu.lu@intel.com>
 525
 526         * diagnostics.h (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): Always
 527         define for GCC.
 528
 529 2018-06-04  H.J. Lu  <hongjiu.lu@intel.com>
 530
 531         * diagnostics.h (DIAGNOSTIC_STRINGIFY_1): New.
 532         (DIAGNOSTIC_STRINGIFY): Likewise.
 533         (DIAGNOSTIC_IGNORE): Replace STRINGIFY with DIAGNOSTIC_STRINGIFY.
 534         (DIAGNOSTIC_IGNORE_SELF_MOVE): Define empty if not defined.
 535         (DIAGNOSTIC_IGNORE_DEPRECATED_REGISTER): Likewise.
 536         (DIAGNOSTIC_IGNORE_UNUSED_FUNCTION): Likewise.
 537         (DIAGNOSTIC_IGNORE_SWITCH_DIFFERENT_ENUM_TYPES): Likewise.
 538         (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): New.
 539
 540 2018-06-01  H.J. Lu  <hongjiu.lu@intel.com>
 541
 542         * diagnostics.h: Moved from ../gdb/common/diagnostics.h.
 543
 544 2018-05-28  Bernd Edlinger  <bernd.edlinger@hotmail.de>
 545
 546         * splay-tree.h (splay_tree_compare_strings,
 547         splay_tree_delete_pointers): Declare new utility functions.
 548
 549 2018-05-21  Peter Bergner  <bergner@vnet.ibm.com.com>
 550
 551         * opcode/ppc.h (PPC_OPERAND_FAKE): Delete macro.
 552
 553 2018-05-18  Kito Cheng  <kito.cheng@gmail.com>
 554
 555         * elf/riscv.h (EF_RISCV_RVE): New define.
 556
 557 2018-05-18  John Darrington  <john@darrington.wattle.id.au>
 558
 559         * elf/s12z.h: New header.
 560
 561 2018-05-15  Tamar Christina  <tamar.christina@arm.com>
 562
 563         PR binutils/21446
 564         * opcode/aarch64.h (F_SYS_READ, F_SYS_WRITE): New.
 565
 566 2018-05-15  Tamar Christina  <tamar.christina@arm.com>
 567
 568         PR binutils/21446
 569         * opcode/aarch64.h (aarch64_operand_error): Add non_fatal.
 570         (aarch64_print_operand): Support notes.
 571
 572 2018-05-15  Tamar Christina  <tamar.christina@arm.com>
 573
 574         PR binutils/21446
 575         * opcode/aarch64.h (aarch64_opnd_info): Change sysreg to struct.
 576         (aarch64_decode_insn): Accept error struct.
 577
 578 2018-05-15  Francois H. Theron  <francois.theron@netronome.com>
 579
 580         * opcode/nfp.h: Use uint64_t instead of bfd_vma.
 581
 582 2018-05-10  John Darrington  <john@darrington.wattle.id.au>
 583
 584         * elf/common.h (EM_S12Z): New macro.
 585
 586 2018-05-09  Sebastian Rasmussen  <sebras@gmail.com>
 587
 588         * mach-o/unwind.h (MACH_O_UNWIND_X86_64_RBP_FRAME_REGISTERS):
 589         Rename from MACH_O_UNWIND_X86_64_RBP_FRAME_REGSITERS.
 590         (MACH_O_UNWIND_X86_EBP_FRAME_REGISTERS): Rename from
 591         MACH_O_UNWIND_X86_EBP_FRAME_REGSITERS.
 592
 593 2018-05-08  Jim Wilson  <jimw@sifive.com>
 594
 595         * opcode/riscv-opc.h (MATCH_C_SRLI64, MASK_C_SRLI64): New.
 596         (MATCH_C_SRAI64, MASK_C_SRAI64): New.
 597         (MATCH_C_SLLI64, MASK_C_SLLI64): New.
 598
 599 2018-05-07  Peter Bergner  <bergner@vnet.ibm.com.com>
 600
 601         * opcode/ppc.h (powerpc_num_opcodes): Change type to unsigned.
 602         (vle_num_opcodes): Likewise.
 603         (spe2_num_opcodes): Likewise.
 604
 605 2018-05-04  Alan Modra  <amodra@gmail.com>
 606
 607         * ansidecl.h: Import from gcc.
 608         * coff/internal.h (struct internal_scnhdr): Add ATTRIBUTE_NONSTRING
 609         to s_name.
 610         (struct internal_syment): Add ATTRIBUTE_NONSTRING to _n_name.
 611
 612 2018-04-30  Francois H. Theron <francois.theron@netronome.com>
 613
 614         * dis-asm.h: Added print_nfp_disassembler_options prototype.
 615         * elf/common.h: Added EM_NFP, officially assigned. See Google Group
 616         Generic System V Application Binary Interface.
 617         * elf/nfp.h: New, for NFP support.
 618         * opcode/nfp.h: New, for NFP support.
 619
 620 2018-04-25  Christophe Lyon  <christophe.lyon@st.com>
 621         Mickaël Guêné  <mickael.guene@st.com>
 622
 623         * elf/arm.h: Add R_ARM_TLS_GD32_FDPIC, R_ARM_TLS_LDM32_FDPIC,
 624         R_ARM_TLS_IE32_FDPIC.
 625
 626 2018-04-25  Christophe Lyon  <christophe.lyon@st.com>
 627         Mickaël Guêné  <mickael.guene@st.com>
 628
 629         * elf/arm.h (R_ARM_GOTFUNCDESC, R_ARM_GOTOFFFUNCDESC)
 630         (R_ARM_FUNCDESC)
 631         (R_ARM_FUNCDESC_VALUE): Define new relocations.
 632
 633 2018-04-25  Christophe Lyon  <christophe.lyon@st.com>
 634         Mickaël Guêné  <mickael.guene@st.com>
 635
 636         * elf/arm.h (EF_ARM_FDPIC): New.
 637
 638 2018-04-18  Alan Modra  <amodra@gmail.com>
 639
 640         * coff/mipspe.h: Delete.
 641
 642 2018-04-18  Alan Modra  <amodra@gmail.com>
 643
 644         * aout/dynix3.h: Delete.
 645
 646 2018-04-17 Andrew Sadek  <andrew.sadek.se@gmail.com>
 647
 648         Microblaze Target: PIC data text relative
 649
 650         * bfdlink.h (Add flag): Add new flag @ 'bfd_link_info' struct.
 651         * elf/microblaze.h (Add 3 new relocations):
 652         R_MICROBLAZE_TEXTPCREL_64, R_MICROBLAZE_TEXTREL_64
 653         and R_MICROBLAZE_TEXTREL_32_LO for relax function.
 654
 655 2018-04-17  Alan Modra  <amodra@gmail.com>
 656
 657         * elf/i370.h: Revert removal.
 658         * elf/i860.h: Likewise.
 659         * elf/i960.h: Likewise.
 660
 661 2018-04-16  Alan Modra  <amodra@gmail.com>
 662
 663         * coff/sparc.h: Delete.
 664
 665 2018-04-16  Alan Modra  <amodra@gmail.com>
 666
 667         * aout/host.h: Remove m68k-aout and m68k-coff support.
 668         * aout/hp300hpux.h: Delete.
 669         * coff/apollo.h: Delete.
 670         * coff/aux-coff.h: Delete.
 671         * coff/m68k.h: Delete.
 672
 673 2018-04-16  Alan Modra  <amodra@gmail.com>
 674
 675         * dis-asm.h: Remove sh5 and sh64 support.
 676
 677 2018-04-16  Alan Modra  <amodra@gmail.com>
 678
 679         * coff/internal.h: Remove w65 support.
 680         * coff/w65.h: Delete.
 681
 682 2018-04-16  Alan Modra  <amodra@gmail.com>
 683
 684         * coff/we32k.h: Delete.
 685
 686 2018-04-16  Alan Modra  <amodra@gmail.com>
 687
 688         * coff/internal.h: Remove m88k support.
 689         * coff/m88k.h: Delete.
 690         * opcode/m88k.h: Delete.
 691
 692 2018-04-16  Alan Modra  <amodra@gmail.com>
 693
 694         * elf/i370.h: Delete.
 695         * opcode/i370.h: Delete.
 696
 697 2018-04-16  Alan Modra  <amodra@gmail.com>
 698
 699         * coff/h8500.h: Delete.
 700         * coff/internal.h: Remove h8500 support.
 701
 702 2018-04-16  Alan Modra  <amodra@gmail.com>
 703
 704         * coff/h8300.h: Delete.
 705
 706 2018-04-16  Alan Modra  <amodra@gmail.com>
 707
 708         * ieee.h: Delete.
 709
 710 2018-04-16  Alan Modra  <amodra@gmail.com>
 711
 712         * aout/host.h: Remove newsos3 support.
 713
 714 2018-04-16  Alan Modra  <amodra@gmail.com>
 715
 716         * nlm/ChangeLog-9315: Delete.
 717         * nlm/alpha-ext.h: Delete.
 718         * nlm/common.h: Delete.
 719         * nlm/external.h: Delete.
 720         * nlm/i386-ext.h: Delete.
 721         * nlm/internal.h: Delete.
 722         * nlm/ppc-ext.h: Delete.
 723         * nlm/sparc32-ext.h: Delete.
 724
 725 2018-04-16  Alan Modra  <amodra@gmail.com>
 726
 727         * opcode/tahoe.h: Delete.
 728
 729 2018-04-11  Alan Modra  <amodra@gmail.com>
 730
 731         * aout/adobe.h: Delete.
 732         * aout/reloc.h: Delete.
 733         * coff/i860.h: Delete.
 734         * coff/i960.h: Delete.
 735         * elf/i860.h: Delete.
 736         * elf/i960.h: Delete.
 737         * opcode/i860.h: Delete.
 738         * opcode/i960.h: Delete.
 739         * aout/aout64.h (enum reloc_type): Trim off 29k and other unused values.
 740         * aout/ar.h (ARMAGB): Remove.
 741         * coff/internal.h (struct internal_aouthdr, struct internal_scnhdr,
 742         union internal_auxent): Remove i960 support.
 743
 744 2018-04-09  Alan Modra  <amodra@gmail.com>
 745
 746         * elf/ppc.h (R_PPC_PLTSEQ, R_PPC_PLTCALL): Define.
 747         * elf/ppc64.h (R_PPC64_PLTSEQ, R_PPC64_PLTCALL): Define.
 748
 749 2018-03-28  Renlin Li  <renlin.li@arm.com>
 750
 751         PR ld/22970
 752         * elf/aarch64.h: Add relocation number for
 753         R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12,
 754         R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC,
 755         R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12,
 756         R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC,
 757         R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12,
 758         R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC,
 759         R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12,
 760         R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC.
 761
 762 2018-03-28  Nick Clifton  <nickc@redhat.com>
 763
 764         PR 22988
 765         * opcode/aarch64.h (enum aarch64_opnd): Add
 766         AARCH64_OPND_SVE_ADDR_R.
 767
 768 2018-03-21  H.J. Lu  <hongjiu.lu@intel.com>
 769
 770         * elf/common.h (DF_1_KMOD): New.
 771         (DF_1_WEAKFILTER): Likewise.
 772         (DF_1_NOCOMMON): Likewise.
 773
 774 2018-03-14  Kito Cheng  <kito.cheng@gmail.com>
 775
 776         * opcode/riscv.h (OP_MASK_FUNCT3): New.
 777         (OP_SH_FUNCT3): Likewise.
 778         (OP_MASK_FUNCT7): Likewise.
 779         (OP_SH_FUNCT7): Likewise.
 780         (OP_MASK_OP2): Likewise.
 781         (OP_SH_OP2): Likewise.
 782         (OP_MASK_CFUNCT4): Likewise.
 783         (OP_SH_CFUNCT4): Likewise.
 784         (OP_MASK_CFUNCT3): Likewise.
 785         (OP_SH_CFUNCT3): Likewise.
 786         (riscv_insn_types): Likewise.
 787
 788 2018-03-13  Nick Clifton  <nickc@redhat.com>
 789
 790         PR 22113
 791         * coff/pe.h (struct pex64_unwind_info): Add a rawUnwindCodesEnd
 792         field.
 793
 794 2018-03-08  H.J. Lu  <hongjiu.lu@intel.com>
 795
 796         * opcode/i386 (OLDGCC_COMPAT): Removed.
 797
 798 2018-02-27  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 799
 800         * opcode/arm.h (ARM_FEATURE_COPY): Remove macro definition.
 801
 802 2018-02-20  Maciej W. Rozycki  <macro@mips.com>
 803
 804         * opcode/mips.h: Remove `M' operand code.
 805
 806 2018-02-12  Zebediah Figura  <z.figura12@gmail.com>
 807
 808         * coff/msdos.h: New header.
 809         * coff/pe.h: Move common defines to msdos.h.
 810         * coff/powerpc.h: Likewise.
 811
 812 2018-01-13  Nick Clifton  <nickc@redhat.com>
 813
 814         2.30 branch created.
 815
 816 2018-01-11  H.J. Lu  <hongjiu.lu@intel.com>
 817
 818         PR ld/22393
 819         * bfdlink.h (bfd_link_info): Add separate_code.
 820
 821 2018-01-04  Jim Wilson  <jimw@sifive.com>
 822
 823         * opcode/riscv-opc.h (CSR_SBADADDR): Rename to CSR_STVAL.  Rename
 824         DECLARE_CSR entry.  Add alias to map sbadaddr to CSR_STVAL.
 825         (CSR_MBADADDR): Rename to CSR_MTVAL.  Rename DECLARE_CSR entry.
 826         Add alias to map mbadaddr to CSR_MTVAL.
 827
 828 2018-01-03  Alan Modra  <amodra@gmail.com>
 829
 830         Update year range in copyright notice of all files.
 831
 832 For older changes see ChangeLog-2017
 833 \f
 834 Copyright (C) 2018 Free Software Foundation, Inc.
 835
 836 Copying and distribution of this file, with or without modification,
 837 are permitted in any medium without royalty provided the copyright
 838 notice and this notice are preserved.
 839
 840 Local Variables:
 841 mode: change-log
 842 left-margin: 8
 843 fill-column: 74
 844 version-control: never
 845 End: