include/ChangeLog

   1 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
   2
   3         * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_bh iclass.
   4
   5 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
   6
   7         * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_sd2 iclass.
   8
   9 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
  10
  11         * opcode/aarch64.h (enum aarch64_opnd): New SVE_ADDR_ZX operand.
  12
  13 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
  14
  15         * opcode/aarch64.h (enum aarch64_opnd): New SVE_Zm3_11_INDEX operand.
  16
  17 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
  18
  19         * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_hsd2 iclass.
  20
  21 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
  22
  23         * opcode/aarch64.h (enum aarch64_opnd): New SVE_IMM_ROT3 operand.
  24
  25 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
  26
  27         * opcode/aarch64.h (AARCH64_FEATURE_SVE2
  28         AARCH64_FEATURE_SVE2_AES, AARCH64_FEATURE_SVE2_BITPERM,
  29         AARCH64_FEATURE_SVE2_SM4, AARCH64_FEATURE_SVE2_SHA3): New
  30         feature macros.
  31
  32 2019-05-06  Andrew Bennett  <andrew.bennett@imgtec.com>
  33             Faraz Shahbazker  <fshahbazker@wavecomp.com>
  34
  35         * opcode/mips.h (ASE_EVA_R6): New macro.
  36         (M_LLWPE_AB, M_SCWPE_AB): New enum values.
  37
  38 2019-05-01  Sudakshina Das  <sudi.das@arm.com>
  39
  40         * opcode/aarch64.h (AARCH64_FEATURE_TME): New.
  41         (enum aarch64_opnd): Add AARCH64_OPND_TME_UIMM16.
  42
  43 2019-04-26  Andrew Bennett  <andrew.bennett@imgtec.com>
  44             Faraz Shahbazker  <fshahbazker@wavecomp.com>
  45
  46         * opcode/mips.h (M_LLWP_AB, M_LLDP_AB): New enum values.
  47         (M_SCWP_AB, M_SCDP_AB): Likewise.
  48
  49 2019-04-25  Maciej W. Rozycki  <macro@linux-mips.org>
  50
  51         * opcode/mips.h: Update comment for MIPS32 CODE20 operand.
  52
  53 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
  54
  55         * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF12.
  56
  57 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
  58
  59         * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF18.
  60
  61 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
  62
  63         * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF16.
  64
  65 2019-04-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>
  66
  67         * elf/arm.h (TAG_CPU_ARCH_V8_1M_MAIN): new macro.
  68         (MAX_TAG_CPU_ARCH): Set value to above macro.
  69         * opcode/arm.h (ARM_EXT2_V8_1M_MAIN): New macro.
  70         (ARM_AEXT_V8_1M_MAIN): Likewise.
  71         (ARM_AEXT2_V8_1M_MAIN): Likewise.
  72         (ARM_ARCH_V8_1M_MAIN): Likewise.
  73
  74 2019-04-11  Sudakshina Das  <sudi.das@arm.com>
  75
  76         * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_Rt_SP.
  77
  78 2019-04-08  H.J. Lu  <hongjiu.lu@intel.com>
  79
  80         * elf/common.h (GNU_PROPERTY_X86_ISA_1_AVX512_BF16): New.
  81
  82 2019-04-07  Alan Modra  <amodra@gmail.com>
  83
  84         Merge from gcc.
  85         2019-04-03  Vineet Gupta  <vgupta@synopsys.com>
  86         PR89877
  87         * longlong.h [__arc__] (add_ssaaaa): Add cc clobber.
  88         (sub_ddmmss): Likewise.
  89
  90 2019-04-06  H.J. Lu  <hongjiu.lu@intel.com>
  91
  92         * bfdlink.h (bfd_link_info): Remove x86-specific linker options.
  93
  94 2019-04-01  Andre Vieira  <andre.simoesdiasvieira@arm.com>
  95
  96         * opcode/arm.h (FPU_NEON_ARMV8_1): New.
  97         (FPU_ARCH_NEON_VFP_ARMV8_1): Use FPU_NEON_ARMV8_1.
  98         (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1): Likewise.
  99         (FPU_ARCH_DOTPROD_NEON_VFP_ARMV8): Likewise.
 100         (FPU_ARCH_NEON_VFP_ARMV8_2_FP16): New.
 101         (FPU_ARCH_NEON_VFP_ARMV8_2_FP16FML): New.
 102         (FPU_ARCH_NEON_VFP_ARMV8_4_FP16FML): New.
 103         (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_4): New.
 104
 105 2019-03-28  Alan Modra  <amodra@gmail.com>
 106
 107         PR 24390
 108         * opcode/ppc.h (PPC_OPERAND_CR_REG): Comment.
 109
 110 2019-03-25  Tamar Christina  <tamar.christina@arm.com>
 111
 112         * dis-asm.h (struct disassemble_info): Add stop_offset.
 113
 114 2019-03-13  Sudakshina Das  <sudi.das@arm.com>
 115
 116         * elf/aarch64.h (DT_AARCH64_PAC_PLT): New.
 117
 118 2019-03-13  Sudakshina Das  <sudi.das@arm.com>
 119             Szabolcs Nagy  <szabolcs.nagy@arm.com>
 120
 121         * elf/aarch64.h (DT_AARCH64_BTI_PLT): New.
 122
 123 2019-03-13  Sudakshina Das  <sudi.das@arm.com>
 124
 125         * elf/common.h (GNU_PROPERTY_AARCH64_FEATURE_1_AND): New.
 126         (GNU_PROPERTY_AARCH64_FEATURE_1_BTI): New.
 127         (GNU_PROPERTY_AARCH64_FEATURE_1_PAC): New.
 128
 129 2019-02-20  Alan Hayward  <alan.hayward@arm.com>
 130
 131         * elf/common.h (NT_ARM_PAC_MASK): Add define.
 132
 133 2019-02-15  Saagar Jha  <saagar@saagarjha.com>
 134
 135         * mach-o/loader.h: Use new OS names in comments.
 136
 137 2019-02-11  Philippe Waroquiers  <philippe.waroquiers@skynet.be>
 138
 139         * splay-tree.h (splay_tree_delete_key_fn): Update comment.
 140         (splay_tree_delete_value_fn): Likewise.
 141
 142 2019-01-31  Andreas Krebbel  <krebbel@linux.ibm.com>
 143
 144         * opcode/s390.h (enum s390_opcode_cpu_val): Add
 145         S390_OPCODE_ARCH13.
 146
 147 2019-01-25  Sudakshina Das  <sudi.das@arm.com>
 148             Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 149
 150         * opcode/aarch64.h (enum aarch64_opnd): Remove
 151         AARCH64_OPND_ADDR_SIMPLE_2.
 152         (enum aarch64_insn_class): Remove ldstgv_indexed.
 153
 154 2019-01-22  Tom Tromey  <tom@tromey.com>
 155
 156         * coff/ecoff.h: Include coff/sym.h.
 157
 158 2018-06-24  Nick Clifton  <nickc@redhat.com>
 159
 160         2.32 branch created.
 161
 162 2019-01-16  Kito Cheng  <kito@andestech.com>
 163
 164         * elf/riscv.h (SHT_RISCV_ATTRIBUTES): Define.
 165         (Tag_RISCV_arch): Likewise.
 166         (Tag_RISCV_priv_spec): Likewise.
 167         (Tag_RISCV_priv_spec_minor): Likewise.
 168         (Tag_RISCV_priv_spec_revision): Likewise.
 169         (Tag_RISCV_unaligned_access): Likewise.
 170         (Tag_RISCV_stack_align): Likewise.
 171
 172 2019-01-14  Pavel I. Kryukov  <kryukov@frtk.ru>
 173
 174         * dis-asm.h: include <string.h>
 175
 176 2019-01-10  Nick Clifton  <nickc@redhat.com>
 177
 178         * Merge from GCC:
 179         2018-12-22  Jason Merrill  <jason@redhat.com>
 180
 181         * demangle.h: Remove support for ancient GNU (pre-3.0), Lucid,
 182         ARM, HP, and EDG demangling styles.
 183
 184 2019-01-09  Sandra Loosemore  <sandra@codesourcery.com>
 185
 186         Merge from GCC:
 187         PR other/16615
 188
 189         * libiberty.h: Mechanically replace "can not" with "cannot".
 190         * plugin-api.h: Likewise.
 191
 192 2018-12-25  Yoshinori Sato <ysato@users.sourceforge.jp>
 193
 194         * elf/rx.h (EF_RX_CPU_MASK): Update new bits.
 195         (E_FLAG_RX_V3): New RXv3 type.
 196         * opcode/rx.h (RX_Size): Add double size.
 197         (RX_Operand_Type): Add double FPU registers.
 198         (RX_Opcode_ID): Add new instuctions.
 199
 200 2019-01-01  Alan Modra  <amodra@gmail.com>
 201
 202         Update year range in copyright notice of all files.
 203
 204 For older changes see ChangeLog-2018
 205 \f
 206 Copyright (C) 2019 Free Software Foundation, Inc.
 207
 208 Copying and distribution of this file, with or without modification,
 209 are permitted in any medium without royalty provided the copyright
 210 notice and this notice are preserved.
 211
 212 Local Variables:
 213 mode: change-log
 214 left-margin: 8
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 216 version-control: never
 217 End: