1 2017-06-30 Georg-Johann Lay <avr@gjlay.de>
4 * opcode/avr.h (AVR_INSN): Add one for __gcc_isr.
6 2017-06-30 Maciej W. Rozycki <macro@imgtec.com>
7 Andrew Bennett <andrew.bennett@imgtec.com>
9 * opcode/mips.h (ASE_XPA_VIRT): New macro.
11 2017-06-29 Andreas Arnez <arnez@linux.vnet.ibm.com>
13 * elf/common.h (NT_S390_GS_CB): New macro.
14 (NT_S390_GS_BC): Likewise.
16 2017-06-28 Tamar Christina <tamar.christina@arm.com>
18 * opcode/aarch64.h: (AARCH64_FEATURE_DOTPROD): New.
19 (aarch64_insn_class): Added dotprod.
21 2017-06-28 Jiong Wang <jiong.wang@arm.com>
23 * opcode/arm.h (FPU_NEON_EXT_DOTPROD): New macro.
24 (FPU_ARCH_DOTPROD_NEON_VFP_ARMV8): New macro.
26 2017-06-28 Maciej W. Rozycki <macro@imgtec.com>
27 Matthew Fortune <matthew.fortune@imgtec.com>
29 * elf/mips.h (E_MIPS_MACH_IAMR2): New macro.
30 (AFL_EXT_INTERAPTIV_MR2): Likewise.
31 * opcode/mips.h: Document new operand codes defined.
32 (INSN_INTERAPTIV_MR2): New macro.
33 (INSN_CHIP_MASK): Adjust accordingly.
34 (CPU_INTERAPTIV_MR2): New macro.
35 (cpu_is_member) <CPU_INTERAPTIV_MR2>: New case.
36 (MIPS16_ALL_ARGS): Rename to...
37 (MIPS_SVRS_ALL_ARGS): ... this.
38 (MIPS16_ALL_STATICS): Rename to...
39 (MIPS_SVRS_ALL_STATICS): ... this.
41 2017-06-26 Kuan-Lin Chen <rufus@andestech.com>
43 * elf/riscv.h (R_RISCV_32_PCREL): New.
45 2017-06-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
47 * elf/arm.h (TAG_CPU_ARCH_V8R): New macro.
48 * opcode/arm.h (ARM_EXT2_V8A): New macro.
49 (ARM_AEXT2_V8A): Rename into ...
50 (ARM_AEXT2_V8AR): This.
51 (ARM_AEXT2_V8A): New macro.
52 (ARM_AEXT_V8R): New macro.
53 (ARM_AEXT2_V8R): New macro.
54 (ARM_ARCH_V8R): New macro.
56 2017-06-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
58 * opcode/arm.h (ARM_AEXT_V4TxM): Add ARM_EXT_OS bit to the set.
59 (ARM_AEXT_V4T): Likewise.
60 (ARM_AEXT_V5TxM): Likewise.
61 (ARM_AEXT_V5T): Likewise.
62 (ARM_AEXT_V6M): Mask off ARM_EXT_OS bit.
64 2017-06-22 H.J. Lu <hongjiu.lu@intel.com>
66 * bfdlink.h (bfd_link_info): Add shstk.
67 * elf/common.h (GNU_PROPERTY_X86_FEATURE_1_SHSTK): New.
69 2017-06-22 H.J. Lu <hongjiu.lu@intel.com>
71 * bfdlink.h (bfd_link_info): Add ibtplt and ibt.
72 * elf/common.h (GNU_PROPERTY_X86_FEATURE_1_AND): New.
73 (GNU_PROPERTY_X86_FEATURE_1_IBT): Likewise.
75 2017-06-21 Thomas Preud'homme <thomas.preudhomme@arm.com>
77 * opcode/arm.h (FPU_ANY): New macro.
79 2017-06-20 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
81 * elf/s390.h (PT_S390_PGSTE): Define macro.
83 2017-06-16 Alan Modra <amodra@gmail.com>
89 * bfdlink.h (struct bfd_link_hash_entry): Delete undef.section.
91 2017-06-14 Yao Qi <yao.qi@linaro.org>
93 * dis-asm.h (print_insn_aarch64): Move it to opcodes/disassemble.h.
94 (print_insn_big_arm, print_insn_big_mips): Likewise.
95 (print_insn_i386, print_insn_ia64): Likewise.
96 (print_insn_little_arm, print_insn_little_mips): Likewise.
97 (print_insn_spu): Likewise.
99 2017-06-06 Andrew Burgess <andrew.burgess@embecosm.com>
101 * bfdlink.h (struct bfd_link_info): Add new resolve_section_groups
104 2017-06-01 Alan Modra <amodra@gmail.com>
106 * elf/ppc64.h (PPC64_OPT_LOCALENTRY): Define.
108 2017-05-31 Eli Zaretskii <eliz@gnu.org>
110 * environ.h: Add #ifndef guard.
112 2017-05-30 Anton Kolesov <anton.kolesov@synopsys.com>
114 * elf/arc-cpu.def: New file.
116 2017-05-24 Yao Qi <yao.qi@linaro.org>
118 * dis-asm.h: Move some function declarations to
119 opcodes/disassemble.h.
121 2017-05-24 Yao Qi <yao.qi@linaro.org>
123 * dis-asm.h (disassembler): Update declaration.
125 2017-05-23 Claudiu Zissulescu <claziss@synopsys.com>
127 * opcode/arc.h (MAX_INSN_FLGS): Update to 4.
129 2017-05-22 H.J. Lu <hongjiu.lu@intel.com>
131 * include/opcode/i386.h (NOTRACK_PREFIX_OPCODE): New.
133 2017-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
135 * elf/sparc.h (ELF_SPARC_HWCAP2_SPARC6): Define.
136 (ELF_SPARC_HWCAP2_ONADDSUB): Likewise.
137 (ELF_SPARC_HWCAP2_ONMUL): Likewise.
138 (ELF_SPARC_HWCAP2_ONDIV): Likewise.
139 (ELF_SPARC_HWCAP2_DICTUNP): Likewise.
140 (ELF_SPARC_HWCAP2_FPCMPSHL): Likewise.
141 (ELF_SPARC_HWCAP2_RLE): Likewise.
142 (ELF_SPARC_HWCAP2_SHA3): Likewise.
143 * opcode/sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_M8
144 and adjust SPARC_OPCODE_ARCH_MAX.
145 (HWCAP2_SPARC6): Define.
146 (HWCAP2_ONADDSUB): Likewise.
147 (HWCAP2_ONMUL): Likewise.
148 (HWCAP2_ONDIV): Likewise.
149 (HWCAP2_DICTUNP): Likewise.
150 (HWCAP2_FPCMPSHL): Likewise.
151 (HWCAP2_RLE): Likewise.
152 (HWCAP2_SHA3): Likewise.
159 2017-05-16 Alan Modra <amodra@gmail.com>
161 * bfdlink.h (struct bfd_link_hash_entry <non_ir_ref>): Rename to
164 2017-05-16 Alan Modra <amodra@gmail.com>
166 * bfdlink.h (struct bfd_link_hash_entry): Update non_ir_ref
167 comment. Rename dynamic_ref_after_ir_def to non_ir_ref_dynamic.
169 2017-05-15 Maciej W. Rozycki <macro@imgtec.com>
170 Matthew Fortune <matthew.fortune@imgtec.com>
172 * elf/mips.h (AFL_ASE_MIPS16E2): New macro.
173 (AFL_ASE_MASK): Adjust accordingly.
174 * opcode/mips.h: Document new operand codes defined.
175 (mips_operand_type): Add OP_REG28 enum value.
176 (INSN2_SHORT_ONLY): Update description.
177 (ASE_MIPS16E2, ASE_MIPS16E2_MT): New macros.
179 2017-05-14 John David Anglin <danglin@gcc.gnu.org>
181 * opcode/hppa.h: Fix match and mask for 64-bit bb opcode.
183 2017-05-10 Claudiu Zissulescu <claziss@synopsys.com>
185 * elf/arc.h (SHT_ARC_ATTRIBUTES): Define.
187 (E_ARC_OSABI_V4): Define.
188 (E_ARC_OSABI_CURRENT): Reassign it.
190 * opcode/arc-attrs.h: New file.
191 * opcode/arc.h (insn_subclass_t): Assign enum values.
192 (insn_subclass_t): Update enum with QUARKSE1, QUARKSE2, and LL64.
193 (ARC_EA, ARC_CD, ARC_LLOCK, ARC_ATOMIC, ARC_MPY, ARC_MULT)
194 (ARC_NPS400, ARC_DPFP, ARC_SPFP, ARC_FPU, ARC_FPUDA, ARC_SWAP)
195 (ARC_NORM, ARC_BSCAN, ARC_UIX, ARC_TSTAMP, ARC_VBFDW)
196 (ARC_BARREL, ARC_DSPA, ARC_SHIFT, ARC_INTR, ARC_DIV, ARC_XMAC)
199 2017-04-20 H.J. Lu <hongjiu.lu@intel.com>
202 * bfdlink.h (bfd_link_hash_entry): Add dynamic_ref_after_ir_def.
204 2017-04-19 Alan Modra <amodra@gmail.com>
206 * bfdlink.h (struct bfd_link_info <dynamic_undefined_weak>):
209 2017-04-11 Alan Modra <amodra@gmail.com>
211 * opcode/ppc.h (PPC_OPCODE_ALTIVEC2): Delete.
212 (PPC_OPCODE_VSX3): Delete.
213 (PPC_OPCODE_HTM): Delete.
214 (PPC_OPCODE_*): Renumber and order chronologically.
215 (PPC_OPCODE_SPE): Comment on this and other bits used for APUinfo.
217 2017-04-06 Pip Cet <pipcet@gmail.com>
219 * dis-asm.h: Add prototypes for wasm32 disassembler.
221 2017-04-05 Pedro Alves <palves@redhat.com>
223 * dis-asm.h (disassemble_info) <disassembler_options>: Now a
225 (next_disassembler_option): Constify.
227 2017-04-04 H.J. Lu <hongjiu.lu@intel.com>
229 * elf/common.h (PT_GNU_MBIND_NUM): New.
230 (PT_GNU_MBIND_LO): Likewise.
231 (PT_GNU_MBIND_HI): Likewise.
232 (SHF_GNU_MBIND): Likewise.
234 2017-04-03 Palmer Dabbelt <palmer@dabbelt.com>
236 * elf/riscv.h (RISCV_GP_SYMBOL): New define.
238 2017-03-27 Andrew Waterman <andrew@sifive.com>
240 * opcode/riscv-opc.h (CSR_PMPCFG0): New define.
241 (CSR_PMPCFG1): Likewise.
242 (CSR_PMPCFG2): Likewise.
243 (CSR_PMPCFG3): Likewise.
244 (CSR_PMPADDR0): Likewise.
245 (CSR_PMPADDR1): Likewise.
246 (CSR_PMPADDR2): Likewise.
247 (CSR_PMPADDR3): Likewise.
248 (CSR_PMPADDR4): Likewise.
249 (CSR_PMPADDR5): Likewise.
250 (CSR_PMPADDR6): Likewise.
251 (CSR_PMPADDR7): Likewise.
252 (CSR_PMPADDR8): Likewise.
253 (CSR_PMPADDR9): Likewise.
254 (CSR_PMPADDR10): Likewise.
255 (CSR_PMPADDR11): Likewise.
256 (CSR_PMPADDR12): Likewise.
257 (CSR_PMPADDR13): Likewise.
258 (CSR_PMPADDR14): Likewise.
259 (CSR_PMPADDR15): Likewise.
260 (pmpcfg0): Declare register.
264 (pmpaddr0): Likewise.
265 (pmpaddr1): Likewise.
266 (pmpaddr2): Likewise.
267 (pmpaddr3): Likewise.
268 (pmpaddr4): Likewise.
269 (pmpaddr5): Likewise.
270 (pmpaddr6): Likewise.
271 (pmpaddr7): Likewise.
272 (pmpaddr8): Likewise.
273 (pmpaddr9): Likewise.
274 (pmpaddr10): Likewise.
275 (pmpaddr11): Likewise.
276 (pmpaddr12): Likewise.
277 (pmpaddr13): Likewise.
278 (pmpaddr14): Likewise.
279 (pmpaddr15): Likewise.
281 2017-03-30 Pip Cet <pipcet@gmail.com>
283 * opcode/wasm.h: New file to support wasm32 architecture.
284 * elf/wasm32.h: Add R_WASM32_32 relocation.
286 2017-03-29 Alan Modra <amodra@gmail.com>
288 * opcode/ppc.h (PPC_OPCODE_RAW): Define.
289 (PPC_OPCODE_*): Make them all unsigned long long constants.
291 2017-03-27 Pip Cet <pipcet@gmail.com>
293 * elf/wasm32.h: New file to support wasm32 architecture.
295 2017-03-27 Rinat Zelig <rinat@mellanox.com>
297 * opcode/arc.h (insn_class_t): Add ULTRAIP and MISC class.
299 2017-03-21 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
301 * opcode/s390.h (S390_INSTR_FLAG_VX2): Remove.
302 (S390_INSTR_FLAG_FACILITY_MASK): Adjust value.
304 2017-03-21 Rinat Zelig <rinat@mellanox.com>
306 * opcode/arc.h (insn_class_t): Add DMA class.
308 2017-03-16 Nick Clifton <nickc@redhat.com>
310 * elf/common.h (GNU_BUILD_ATTRIBUTE_SHORT_ENUM): New GNU BUILD
313 2017-03-14 Jakub Jelinek <jakub@redhat.com>
316 * dwarf2.def (DW_OP_GNU_variable_value): New opcode.
318 2017-03-13 Markus Trippelsdorf <markus@trippelsdorf.de>
322 * demangle.h (struct demangle_component): Add d_printing field.
323 (cplus_demangle_print): Remove const qualifier from tree
325 (cplus_demangle_print_callback): Likewise.
327 2017-03-13 Nick Clifton <nickc@redhat.com>
330 * elf/aarch64.h (R_AARCH64_TLSDESC_LD64_LO12_NC): Rename to
331 R_AARCH64_TLSDESC_LD64_LO12.
332 (R_AARCH64_TLSDESC_ADD_LO12_NC): Rename to
333 R_AARCH64_TLSDESC_ADD_LO12_NC.
335 2017-03-10 Nick Clifton <nickc@redhat.com>
337 * elf/common.h (EM_LANAI): New machine number.
339 (EM_WEBASSEMBLY): Likewise.
340 Move low value, deprecated, numbers to their numerical
343 2017-03-08 H.J. Lu <hongjiu.lu@intel.com>
346 * elf/common.h (GNU_PROPERTY_LOPROC): New.
347 (GNU_PROPERTY_HIPROC): Likewise.
348 (GNU_PROPERTY_LOUSER): Likewise.
349 (GNU_PROPERTY_HIUSER): Likewise.
351 2017-03-01 Nick Clifton <nickc@redhat.com>
353 * elf/common.h (SHF_GNU_BUILD_NOTE): Define.
354 (NT_GNU_PROPERTY_TYPE_0): Define.
355 (NT_GNU_BUILD_ATTRIBUTE_OPEN): Define.
356 (NT_GNU_BUILD_ATTRIBUTE_FUN): Define.
357 (GNU_BUILD_ATTRIBUTE_TYPE_NUMERIC): Define.
358 (GNU_BUILD_ATTRIBUTE_TYPE_STRING): Define.
359 (GNU_BUILD_ATTRIBUTE_TYPE_BOOL_TRUE): Define.
360 (GNU_BUILD_ATTRIBUTE_TYPE_BOOL_FALSE): Define.
361 (GNU_BUILD_ATTRIBUTE_VERSION): Define.
362 (GNU_BUILD_ATTRIBUTE_STACK_PROT): Define.
363 (GNU_BUILD_ATTRIBUTE_RELRO): Define.
364 (GNU_BUILD_ATTRIBUTE_STACK_SIZE): Define.
365 (GNU_BUILD_ATTRIBUTE_TOOL): Define.
366 (GNU_BUILD_ATTRIBUTE_ABI): Define.
367 (GNU_BUILD_ATTRIBUTE_PIC): Define.
368 (NOTE_GNU_PROPERTY_SECTION_NAME): Define.
369 (GNU_BUILD_ATTRS_SECTION_NAME): Define.
370 (GNU_PROPERTY_STACK_SIZE): Define.
371 (GNU_PROPERTY_NO_COPY_ON_PROTECTED): Define.
372 (GNU_PROPERTY_X86_ISA_1_USED): Define.
373 (GNU_PROPERTY_X86_ISA_1_NEEDED): Define.
374 (GNU_PROPERTY_X86_ISA_1_486): Define.
375 (GNU_PROPERTY_X86_ISA_1_586): Define.
376 (GNU_PROPERTY_X86_ISA_1_686): Define.
377 (GNU_PROPERTY_X86_ISA_1_SSE): Define.
378 (GNU_PROPERTY_X86_ISA_1_SSE2): Define.
379 (GNU_PROPERTY_X86_ISA_1_SSE3): Define.
380 (GNU_PROPERTY_X86_ISA_1_SSSE3): Define.
381 (GNU_PROPERTY_X86_ISA_1_SSE4_1): Define.
382 (GNU_PROPERTY_X86_ISA_1_SSE4_2): Define.
383 (GNU_PROPERTY_X86_ISA_1_AVX): Define.
384 (GNU_PROPERTY_X86_ISA_1_AVX2): Define.
385 (GNU_PROPERTY_X86_ISA_1_AVX512F): Define.
386 (GNU_PROPERTY_X86_ISA_1_AVX512CD): Define.
387 (GNU_PROPERTY_X86_ISA_1_AVX512ER): Define.
388 (GNU_PROPERTY_X86_ISA_1_AVX512PF): Define.
389 (GNU_PROPERTY_X86_ISA_1_AVX512VL): Define.
390 (GNU_PROPERTY_X86_ISA_1_AVX512DQ): Define.
391 (GNU_PROPERTY_X86_ISA_1_AVX512BW): Define.
393 2017-02-28 Peter Bergner <bergner@vnet.ibm.com>
395 * dis-asm.h (disasm_options_t): New typedef.
396 (parse_arm_disassembler_option): Remove prototype.
397 (set_arm_regname_option): Likewise.
398 (get_arm_regnames): Likewise.
399 (get_arm_regname_num_options): Likewise.
400 (disassemble_init_s390): New prototype.
401 (disassembler_options_powerpc): Likewise.
402 (disassembler_options_arm): Likewise.
403 (disassembler_options_s390): Likewise.
404 (remove_whitespace_and_extra_commas): Likewise.
405 (disassembler_options_cmp): Likewise.
406 (next_disassembler_option): New inline function.
407 (FOR_EACH_DISASSEMBLER_OPTION): New macro.
409 2017-02-28 Alan Modra <amodra@gmail.com>
411 * elf/ppc64.h (R_PPC64_16DX_HA): New. Expand fake reloc comment.
412 * elf/ppc.h (R_PPC_16DX_HA): Likewise.
414 2017-02-24 Richard Sandiford <richard.sandiford@arm.com>
416 * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4x16)
417 (AARCH64_OPND_SVE_IMM_ROT1, AARCH64_OPND_SVE_IMM_ROT2)
418 (AARCH64_OPND_SVE_Zm3_INDEX, AARCH64_OPND_SVE_Zm3_22_INDEX)
419 (AARCH64_OPND_SVE_Zm4_INDEX): New aarch64_opnds.
421 2017-02-24 Richard Sandiford <richard.sandiford@arm.com>
423 * opcode/aarch64.h (AARCH64_FEATURE_COMPNUM): New macro.
424 (AARCH64_ARCH_V8_3): Include AARCH64_FEATURE_COMPNUM.
426 2017-02-22 Andrew Waterman <andrew@sifive.com>
428 * opcode/riscv-opc.h (CSR_SCOUNTEREN): New define.
429 (CSR_MCOUNTEREN): Likewise.
430 (scounteren): Declare register.
431 (mcounteren): Likewise.
433 2017-02-14 Andrew Waterman <andrew@sifive.com>
435 * opcode/riscv-opc.h (MATCH_SFENCE_VMA): New define.
436 (MASK_SFENCE_VMA): Likewise.
437 (sfence_vma): Declare instruction.
439 2017-02-14 Alan Modra <amodra@gmail.com>
442 * opcode/ppc.h (PPC_OPERAND_*): Reassign values, regs first.
443 (PPC_OPERAND_SPR, PPC_OPERAND_GQR): Define.
445 2017-01-24 Dimitar Dimitrov <dimitar@dinux.eu>
447 * opcode/hppa.h: Clarify that file is part of GNU opcodes.
448 * opcode/i860.h: Ditto.
449 * opcode/nios2.h: Ditto.
450 * opcode/nios2r1.h: Ditto.
451 * opcode/nios2r2.h: Ditto.
452 * opcode/pru.h: Ditto.
454 2017-01-24 Alan Hayward <alan.hayward@arm.com>
456 * elf/common.h (NT_ARM_SVE): Define.
458 2017-01-04 Jiong Wang <jiong.wang@arm.com>
460 * dwarf2.def: Sync with mainline gcc sources.
462 2017-01-04 Richard Earnshaw <rearnsha@arm.com>
463 Jiong Wang <jiong.wang@arm.com>
465 * dwarf2.def (DW_OP_AARCH64_operation): Reserve the number 0xea.
466 (DW_CFA_GNU_window_save): Comments the multiplexing on AArch64.
468 2017-01-04 Szabolcs Nagy <szabolcs.nagy@arm.com>
470 * opcode/aarch64.h (AARCH64_FEATURE_RCPC): Define.
471 (AARCH64_ARCH_V8_3): Update.
473 2017-01-03 Kito Cheng <kito.cheng@gmail.com>
475 * opcode/riscv-opc.h: Add support for the "q" ISA extension.
477 2017-01-03 Nick Clifton <nickc@redhat.com>
479 * dwarf2.def: Sync with mainline gcc sources
480 * dwarf2.h: Likewise.
482 2016-12-21 Jakub Jelinek <jakub@redhat.com>
484 * dwarf2.def (DW_FORM_ref_sup): Renamed to ...
485 (DW_FORM_ref_sup4): ... this. New form.
486 (DW_FORM_ref_sup8): New form.
488 2016-10-17 Jakub Jelinek <jakub@redhat.com>
490 * dwarf2.h (enum dwarf_calling_convention): Add new DWARF5
491 calling convention codes.
492 (enum dwarf_line_number_content_type): New.
493 (enum dwarf_location_list_entry_type): Add DWARF5 DW_LLE_*
495 (enum dwarf_source_language): Add new DWARF5 DW_LANG_* codes.
496 (enum dwarf_macro_record_type): Add DWARF5 DW_MACRO_* codes.
497 (enum dwarf_name_index_attribute): New.
498 (enum dwarf_range_list_entry): New.
499 (enum dwarf_unit_type): New.
500 * dwarf2.def: Add new DWARF5 DW_TAG_*, DW_FORM_*, DW_AT_*,
501 DW_OP_* and DW_ATE_* entries.
503 2016-08-15 Jakub Jelinek <jakub@redhat.com>
505 * dwarf2.def (DW_AT_string_length_bit_size,
506 DW_AT_string_length_byte_size): New attributes.
508 2016-08-12 Alexandre Oliva <aoliva@redhat.com>
511 * dwarf2.def (DW_AT_deleted, DW_AT_defaulted): New.
512 * dwarf2.h (enum dwarf_defaulted_attribute): New.
514 2017-01-02 Alan Modra <amodra@gmail.com>
516 Update year range in copyright notice of all files.
518 For older changes see ChangeLog-2016
520 Copyright (C) 2017 Free Software Foundation, Inc.
522 Copying and distribution of this file, with or without modification,
523 are permitted in any medium without royalty provided the copyright
524 notice and this notice are preserved.
530 version-control: never