1 2018-10-09 Sudakshina Das <sudi.das@arm.com>
3 * opcode/aarch64.h (AARCH64_FEATURE_RNG): New.
5 2018-10-09 Sudakshina Das <sudi.das@arm.com>
7 * opcode/aarch64.h (AARCH64_FEATURE_CVADP): New.
9 2018-10-09 Sudakshina Das <sudi.das@arm.com>
11 * opcode/aarch64.h (AARCH64_FEATURE_PREDRES): New.
12 (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_PREDRES by default.
13 (aarch64_opnd): Add AARCH64_OPND_SYSREG_SR.
14 (aarch64_sys_regs_sr): Declare new table.
16 2018-10-09 Sudakshina Das <sudi.das@arm.com>
18 * opcode/aarch64.h (AARCH64_FEATURE_SB): New.
19 (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_SB by default.
21 2018-10-09 Sudakshina Das <sudi.das@arm.com>
23 * opcode/aarch64.h (AARCH64_FEATURE_FLAGMANIP): New.
24 (AARCH64_FEATURE_FRINTTS): New.
25 (AARCH64_ARCH_V8_5): Add both by default.
27 2018-10-09 Sudakshina Das <sudi.das@arm.com>
29 * opcode/aarch64.h (AARCH64_FEATURE_V8_5): New.
30 (AARCH64_ARCH_V8_5): New.
32 2018-10-08 Alan Modra <amodra@gmail.com>
34 * bfdlink.h (struct bfd_link_info): Add load_phdrs field.
36 2018-10-05 Sudakshina Das <sudi.das@arm.com>
38 * opcode/arm.h (ARM_EXT2_PREDRES): New.
39 (ARM_ARCH_V8_5A): Add ARM_EXT2_PREDRES by default.
41 2018-10-05 Sudakshina Das <sudi.das@arm.com>
43 * opcode/arm.h (ARM_EXT2_SB): New.
44 (ARM_ARCH_V8_5A): Add ARM_EXT2_SB by default.
46 2018-10-05 Sudakshina Das <sudi.das@arm.com>
48 * opcode/arm.h (ARM_EXT2_V8_5A): New.
49 (ARM_AEXT2_V8_5A, ARM_ARCH_V8_5A): New.
51 2018-10-05 Richard Henderson <rth@twiddle.net>
53 * elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_PCREL_PG21,
54 R_OR1K_GOT_PG21, R_OR1K_TLS_GD_PG21, R_OR1K_TLS_LDM_PG21,
55 R_OR1K_TLS_IE_PG21, R_OR1K_LO13, R_OR1K_GOT_LO13,
56 R_OR1K_TLS_GD_LO13, R_OR1K_TLS_LDM_LO13, R_OR1K_TLS_IE_LO13,
57 R_OR1K_SLO13, R_OR1K_PLTA26.
59 2018-10-05 Richard Henderson <rth@twiddle.net>
61 * elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_AHI16,
62 R_OR1K_GOTOFF_AHI16, R_OR1K_TLS_IE_AHI16, R_OR1K_TLS_LE_AHI16,
63 R_OR1K_SLO16, R_OR1K_GOTOFF_SLO16, R_OR1K_TLS_LE_SLO16.
65 2018-10-03 Tamar Christina <tamar.christina@arm.com>
67 * opcode/aarch64.h (aarch64_inst): Remove.
68 (enum err_type): Add ERR_VFI.
69 (aarch64_is_destructive_by_operands): New.
70 (init_insn_sequence): New.
71 (aarch64_decode_insn): Remove param name.
73 2018-10-03 Tamar Christina <tamar.christina@arm.com>
75 * opcode/aarch64.h (struct aarch64_opcode): Expand verifiers to take
78 2018-10-03 Tamar Christina <tamar.christina@arm.com>
80 * opcode/aarch64.h (enum err_type): New.
81 (aarch64_decode_insn): Use it.
83 2018-10-03 Tamar Christina <tamar.christina@arm.com>
85 * opcode/aarch64.h (struct aarch64_instr_sequence): New.
86 (aarch64_opcode_encode): Use it.
88 2018-10-03 Tamar Christina <tamar.christina@arm.com>
90 * opcode/aarch64.h (struct aarch64_opcode): Add constraints,
91 extend flags field size.
92 (F_SCAN, C_SCAN_MOVPRFX, C_MAX_ELEM): New.
94 2018-10-03 John Darrington <john@darrington.wattle.id.au>
96 * dis-asm.h (print_insn_s12z): New declaration.
98 2018-10-02 Palmer Dabbelt <palmer@sifive.com>
100 * opcode/riscv-opc.h (MATCH_FENCE_TSO): New define.
101 (MASK_FENCE_TSO): Likewise.
103 2018-10-01 Cupertino Miranda <cmiranda@synopsys.com>
105 * arc-reloc.def (ARC_TLS_LE_32): Updated reloc formula.
107 2018-09-21 H.J. Lu <hongjiu.lu@intel.com>
110 * include/elf/internal.h (ELF_SECTION_IN_SEGMENT_1): Don't
111 include zero size sections at start of PT_NOTE segment.
113 2018-09-20 Nelson Chu <nelson.chu1990@gmail.com>
115 * elf/nds32.h: Remove the unused target features.
116 * dis-asm.h (disassemble_init_nds32): Declared.
117 * elf/nds32.h (E_NDS32_NULL): Removed.
118 (E_NDS32_HAS_DSP_INST, E_NDS32_HAS_ZOL): New.
119 * opcode/nds32.h: Ident.
120 (N32_SUB6, INSN_LW): New macros.
121 (enum n32_opcodes): Updated.
122 * elf/nds32.h: Doc fixes.
123 * elf/nds32.h: Add R_NDS32_LSI.
124 * elf/nds32.h: Add new relocations for TLS.
126 2018-09-20 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
128 * elf/common.h (AT_SUN_HWCAP): Rename to ...
129 (AT_SUN_CAP_HW1): ... this. Retain old name for backward
131 (AT_SUN_EMULATOR, AT_SUN_BRANDNAME, AT_SUN_BRAND_AUX1)
132 (AT_SUN_BRAND_AUX2, AT_SUN_BRAND_AUX3, AT_SUN_CAP_HW2): Define.
134 2018-09-05 Simon Marchi <simon.marchi@ericsson.com>
136 * diagnostics.h (DIAGNOSTIC_IGNORE_FORMAT_NONLITERAL): New macro.
138 2018-08-31 Alan Modra <amodra@gmail.com>
140 * elf/ppc64.h (R_PPC64_REL16_HIGH, R_PPC64_REL16_HIGHA),
141 (R_PPC64_REL16_HIGHER, R_PPC64_REL16_HIGHERA),
142 (R_PPC64_REL16_HIGHEST, R_PPC64_REL16_HIGHESTA): Define.
143 (R_PPC64_LO_DS_OPT, R_PPC64_16DX_HA): Bump value.
145 2018-08-30 Kito Cheng <kito@andestech.com>
147 * opcode/riscv.h (MAX_SUBSET_NUM): New.
148 (riscv_opcode): Add xlen_requirement field and change type of
151 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
153 * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS264E.
154 * opcode/mips.h (CPU_XXX): New CPU_GS264E.
156 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
158 * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS464E.
159 * opcode/mips.h (CPU_XXX): New CPU_GS464E.
161 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
163 * elf/mips.h (E_MIPS_MACH_XXX): Rename E_MIPS_MACH_LS3A to
165 (AFL_EXT_XXX): Delete AFL_EXT_LOONGSON_3A.
166 * opcode/mips.h (INSN_XXX): Delete INSN_LOONGSON_3A.
167 (CPU_XXX): Rename CPU_LOONGSON_3A to CPU_GS464.
168 * opcode/mips.h (mips_isa_table): Delete CPU_LOONGSON_3A case.
170 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
172 * elf/mips.h (AFL_ASE_LOONGSON_EXT2): New macro.
173 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT2.
174 * opcode/mips.h (ASE_LOONGSON_EXT2): New macro.
176 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
178 * elf/mips.h (AFL_ASE_LOONGSON_EXT): New macro.
179 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT.
180 * opcode/mips.h (ASE_LOONGSON_EXT): New macro.
182 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
184 * elf/mips.h (AFL_ASE_LOONGSON_CAM): New macro.
185 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_CAM.
186 * opcode/mips.h (ASE_LOONGSON_CAM): New macro.
188 2018-08-24 H.J. Lu <hongjiu.lu@intel.com>
190 * elf/common.h (GNU_PROPERTY_X86_ISA_1_USED): Renamed to ...
191 (GNU_PROPERTY_X86_COMPAT_ISA_1_USED): This.
192 (GNU_PROPERTY_X86_ISA_1_NEEDED): Renamed to ...
193 (GNU_PROPERTY_X86_COMPAT_ISA_1_NEEDED): This.
194 (GNU_PROPERTY_X86_ISA_1_XXX): Renamed to ...
195 (GNU_PROPERTY_X86_COMPAT_ISA_1_XXX): This.
196 (GNU_PROPERTY_X86_UINT32_AND_LO): New.
197 (GNU_PROPERTY_X86_UINT32_AND_HI): Likewise.
198 (GNU_PROPERTY_X86_UINT32_OR_LO): Likewise.
199 (GNU_PROPERTY_X86_UINT32_OR_HI): Likewise.
200 (GNU_PROPERTY_X86_UINT32_OR_AND_LO): Likewise.
201 (GNU_PROPERTY_X86_UINT32_OR_AND_HI): Likewise.
202 (GNU_PROPERTY_X86_ISA_1_CMOV): Likewise.
203 (GNU_PROPERTY_X86_ISA_1_SSE): Likewise.
204 (GNU_PROPERTY_X86_ISA_1_SSE2): Likewise.
205 (GNU_PROPERTY_X86_ISA_1_SSE3): Likewise.
206 (GNU_PROPERTY_X86_ISA_1_SSSE3): Likewise.
207 (GNU_PROPERTY_X86_ISA_1_SSE4_1): Likewise.
208 (GNU_PROPERTY_X86_ISA_1_SSE4_2): Likewise.
209 (GNU_PROPERTY_X86_ISA_1_AVX): Likewise.
210 (GNU_PROPERTY_X86_ISA_1_AVX2): Likewise.
211 (GNU_PROPERTY_X86_ISA_1_FMA): Likewise.
212 (GNU_PROPERTY_X86_ISA_1_AVX512F): Likewise.
213 (GNU_PROPERTY_X86_ISA_1_AVX512CD): Likewise.
214 (GNU_PROPERTY_X86_ISA_1_AVX512ER): Likewise.
215 (GNU_PROPERTY_X86_ISA_1_AVX512PF): Likewise.
216 (GNU_PROPERTY_X86_ISA_1_AVX512VL): Likewise.
217 (GNU_PROPERTY_X86_ISA_1_AVX512DQ): Likewise.
218 (GNU_PROPERTY_X86_ISA_1_AVX512BW): Likewise.
219 (GNU_PROPERTY_X86_ISA_1_AVX512_4FMAPS): Likewise.
220 (GNU_PROPERTY_X86_ISA_1_AVX512_4VNNIW): Likewise.
221 (GNU_PROPERTY_X86_ISA_1_AVX512_BITALG): Likewise.
222 (GNU_PROPERTY_X86_ISA_1_AVX512_IFMA): Likewise.
223 (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI): Likewise.
224 (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI2): Likewise.
225 (GNU_PROPERTY_X86_ISA_1_AVX512_VNNI): Likewise.
226 (GNU_PROPERTY_X86_FEATURE_2_X86): Likewise.
227 (GNU_PROPERTY_X86_FEATURE_2_X87): Likewise.
228 (GNU_PROPERTY_X86_FEATURE_2_MMX): Likewise.
229 (GNU_PROPERTY_X86_FEATURE_2_XMM): Likewise.
230 (GNU_PROPERTY_X86_FEATURE_2_YMM): Likewise.
231 (GNU_PROPERTY_X86_FEATURE_2_ZMM): Likewise.
232 (GNU_PROPERTY_X86_FEATURE_2_FXSR): Likewise.
233 (GNU_PROPERTY_X86_FEATURE_2_XSAVE): Likewise.
234 (GNU_PROPERTY_X86_FEATURE_2_XSAVEOPT): Likewise.
235 (GNU_PROPERTY_X86_FEATURE_2_XSAVEC): Likewise.
236 (GNU_PROPERTY_X86_FEATURE_1_AND): Updated to
237 (GNU_PROPERTY_X86_UINT32_AND_LO + 0).
238 (GNU_PROPERTY_X86_ISA_1_NEEDED): Defined to
239 (GNU_PROPERTY_X86_UINT32_OR_LO + 0).
240 (GNU_PROPERTY_X86_FEATURE_2_NEEDED): New. Defined to
241 (GNU_PROPERTY_X86_UINT32_OR_LO + 1).
242 (GNU_PROPERTY_X86_ISA_1_USED): Defined to
243 (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 0).
244 (GNU_PROPERTY_X86_FEATURE_2_USED): New. Defined to
245 (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 1).
247 2018-08-24 H.J. Lu <hongjiu.lu@intel.com>
249 * elf/common.h (GNU_PROPERTY_X86_UINT32_VALID): New.
251 2018-08-21 John Darrington <john@darrington.wattle.id.au>
253 * elf/s12z.h: Rename R_S12Z_UKNWN_3 to R_S12Z_EXT18.
255 2018-08-21 Alan Modra <amodra@gmail.com>
257 * opcode/ppc.h (struct powerpc_operand): Correct "insert" comment.
258 Mention use of "extract" function to provide default value.
259 (PPC_OPERAND_OPTIONAL_VALUE): Delete.
260 (ppc_optional_operand_value): Rewrite to use extract function.
262 2018-08-18 John Darrington <john@darrington.wattle.id.au>
264 * opcode/s12z.h: New file.
266 2018-08-09 Richard Earnshaw <rearnsha@arm.com>
268 * elf/arm.h: Updated comments for e_flags definitions.
270 2018-08-06 Claudiu Zissulescu <claziss@synopsys.com>
272 * elf/arc.h (Tag_ARC_ATR_version): New tag.
274 2018-08-06 Claudiu Zissulescu <claziss@synopsys.com>
276 * opcode/arc.h (ARC_OPCODE_ARCV1): Define.
278 2018-08-01 Richard Earnshaw <rearnsha@arm.com>
281 2018-07-26 Martin Liska <mliska@suse.cz>
284 * libiberty.h (make_temp_file_with_prefix): New function.
286 2018-07-30 Jim Wilson <jimw@sifive.com>
288 * opcode/riscv.h (INSN_TYPE, INSN_BRANCH, INSN_CONDBRANCH, INSN_JSR)
289 (INSN_DREF, INSN_DATA_SIZE, INSN_DATA_SIZE_SHIFT, INSN_1_BYTE)
290 (INSN_2_BYTE, INSN_4_BYTE, INSN_8_BYTE, INSN_16_BYTE): New.
292 2018-07-30 Andrew Jenner <andrew@codesourcery.com>
294 * elf/common.h (EM_CSKY, EM_CSKY_OLD): Define.
295 * elf/csky.h: New file.
297 2018-07-27 Chenghua Xu <paul.hua.gm@gmail.com>
298 Maciej W. Rozycki <macro@linux-mips.org>
300 * elf/mips.h (AFL_ASE_MASK): Correct typo.
302 2018-07-26 Alex Chadwick <Alex.Chadwick@cl.cam.ac.uk>
304 * opcode/ppc.h (PPC_OPCODE_750): Adjust comment.
306 2018-07-26 Alan Modra <amodra@gmail.com>
308 * elf/ppc64.h: Specify byte offset to local entry for values
309 of two to six in STO_PPC64_LOCAL_MASK. Clarify r2 return
310 value for such functions when entering via global entry point.
311 Specify meaning of a value of one in STO_PPC64_LOCAL_MASK.
313 2018-07-24 Alan Modra <amodra@gmail.com>
316 * elf/common.h (SHT_SYMTAB_SHNDX): Fix comment typo.
318 2018-07-20 Chenghua Xu <paul.hua.gm@gmail.com>
319 Maciej W. Rozycki <macro@mips.com>
321 * elf/mips.h (AFL_ASE_MMI): New macro.
322 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_MMI.
323 * opcode/mips.h (ASE_LOONGSON_MMI): New macro.
325 2018-07-17 Maciej W. Rozycki <macro@mips.com>
327 * bfdlink.h (bfd_link_hash_entry): Add `rel_from_abs' member.
329 2018-07-06 Alan Modra <amodra@gmail.com>
331 * diagnostics.h: Comment on macro usage.
333 2018-07-05 Simon Marchi <simon.marchi@polymtl.ca>
335 * diagnostics.h (DIAGNOSTIC_IGNORE_DEPRECATED_DECLARATIONS):
338 2018-07-02 Maciej W. Rozycki <macro@mips.com>
341 * dis-asm.h (disasm_option_arg_t): New typedef.
342 (disasm_options_and_args_t): Likewise.
343 (disasm_options_t): Add `arg' member, document members.
344 (disassembler_options_mips): New prototype.
345 (disassembler_options_arm, disassembler_options_powerpc)
346 (disassembler_options_s390): Update prototypes.
348 2018-06-29 Tamar Christina <tamar.christina@arm.com>
351 *opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_Em16.
353 2018-06-26 Alan Modra <amodra@gmail.com>
355 * elf/internal.h (ELF_SECTION_IN_SEGMENT): Revert last change.
357 2018-06-24 Nick Clifton <nickc@redhat.com>
361 2018-06-21 Alan Hayward <alan.hayward@arm.com>
363 * elf/internal.h (ELF_SECTION_IN_SEGMENT): Don’t check addresses
366 2018-06-19 Simon Marchi <simon.marchi@ericsson.com>
370 2018-05-24 Tom Rix <trix@juniper.net>
372 * dwarf2.def (DW_FORM_strx*, DW_FORM_addrx*): New.
374 2017-11-20 Kito Cheng <kito.cheng@gmail.com>
376 * longlong.h [__riscv] (__umulsidi3): Define.
377 [__riscv] (umul_ppmm): Likewise.
378 [__riscv] (__muluw3): Likewise.
380 2018-06-14 Faraz Shahbazker <Faraz.Shahbazker@mips.com>
382 * elf/mips.h (AFL_ASE_GINV, AFL_ASE_RESERVED1): New macros.
383 (AFL_ASE_MASK): Update to include AFL_ASE_GINV.
384 * opcode/mips.h: Document "+\" operand format.
385 (ASE_GINV): New macro.
387 2018-06-13 Scott Egerton <scott.egerton@imgtec.com>
388 Faraz Shahbazker <Faraz.Shahbazker@mips.com>
390 * elf/mips.h (AFL_ASE_CRC): New macro.
391 (AFL_ASE_MASK): Update to include AFL_ASE_CRC.
392 * opcode/mips.h (ASE_CRC): New macro.
393 * opcode/mips.h (ASE_CRC64): Likewise.
395 2018-06-04 Max Filippov <jcmvbkbc@gmail.com>
397 * elf/xtensa.h (xtensa_read_table_entries)
398 (xtensa_compute_fill_extra_space): New declarations.
400 2018-06-04 H.J. Lu <hongjiu.lu@intel.com>
402 * diagnostics.h (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): Always
405 2018-06-04 H.J. Lu <hongjiu.lu@intel.com>
407 * diagnostics.h (DIAGNOSTIC_STRINGIFY_1): New.
408 (DIAGNOSTIC_STRINGIFY): Likewise.
409 (DIAGNOSTIC_IGNORE): Replace STRINGIFY with DIAGNOSTIC_STRINGIFY.
410 (DIAGNOSTIC_IGNORE_SELF_MOVE): Define empty if not defined.
411 (DIAGNOSTIC_IGNORE_DEPRECATED_REGISTER): Likewise.
412 (DIAGNOSTIC_IGNORE_UNUSED_FUNCTION): Likewise.
413 (DIAGNOSTIC_IGNORE_SWITCH_DIFFERENT_ENUM_TYPES): Likewise.
414 (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): New.
416 2018-06-01 H.J. Lu <hongjiu.lu@intel.com>
418 * diagnostics.h: Moved from ../gdb/common/diagnostics.h.
420 2018-05-28 Bernd Edlinger <bernd.edlinger@hotmail.de>
422 * splay-tree.h (splay_tree_compare_strings,
423 splay_tree_delete_pointers): Declare new utility functions.
425 2018-05-21 Peter Bergner <bergner@vnet.ibm.com.com>
427 * opcode/ppc.h (PPC_OPERAND_FAKE): Delete macro.
429 2018-05-18 Kito Cheng <kito.cheng@gmail.com>
431 * elf/riscv.h (EF_RISCV_RVE): New define.
433 2018-05-18 John Darrington <john@darrington.wattle.id.au>
435 * elf/s12z.h: New header.
437 2018-05-15 Tamar Christina <tamar.christina@arm.com>
440 * opcode/aarch64.h (F_SYS_READ, F_SYS_WRITE): New.
442 2018-05-15 Tamar Christina <tamar.christina@arm.com>
445 * opcode/aarch64.h (aarch64_operand_error): Add non_fatal.
446 (aarch64_print_operand): Support notes.
448 2018-05-15 Tamar Christina <tamar.christina@arm.com>
451 * opcode/aarch64.h (aarch64_opnd_info): Change sysreg to struct.
452 (aarch64_decode_insn): Accept error struct.
454 2018-05-15 Francois H. Theron <francois.theron@netronome.com>
456 * opcode/nfp.h: Use uint64_t instead of bfd_vma.
458 2018-05-10 John Darrington <john@darrington.wattle.id.au>
460 * elf/common.h (EM_S12Z): New macro.
462 2018-05-09 Sebastian Rasmussen <sebras@gmail.com>
464 * mach-o/unwind.h (MACH_O_UNWIND_X86_64_RBP_FRAME_REGISTERS):
465 Rename from MACH_O_UNWIND_X86_64_RBP_FRAME_REGSITERS.
466 (MACH_O_UNWIND_X86_EBP_FRAME_REGISTERS): Rename from
467 MACH_O_UNWIND_X86_EBP_FRAME_REGSITERS.
469 2018-05-08 Jim Wilson <jimw@sifive.com>
471 * opcode/riscv-opc.h (MATCH_C_SRLI64, MASK_C_SRLI64): New.
472 (MATCH_C_SRAI64, MASK_C_SRAI64): New.
473 (MATCH_C_SLLI64, MASK_C_SLLI64): New.
475 2018-05-07 Peter Bergner <bergner@vnet.ibm.com.com>
477 * opcode/ppc.h (powerpc_num_opcodes): Change type to unsigned.
478 (vle_num_opcodes): Likewise.
479 (spe2_num_opcodes): Likewise.
481 2018-05-04 Alan Modra <amodra@gmail.com>
483 * ansidecl.h: Import from gcc.
484 * coff/internal.h (struct internal_scnhdr): Add ATTRIBUTE_NONSTRING
486 (struct internal_syment): Add ATTRIBUTE_NONSTRING to _n_name.
488 2018-04-30 Francois H. Theron <francois.theron@netronome.com>
490 * dis-asm.h: Added print_nfp_disassembler_options prototype.
491 * elf/common.h: Added EM_NFP, officially assigned. See Google Group
492 Generic System V Application Binary Interface.
493 * elf/nfp.h: New, for NFP support.
494 * opcode/nfp.h: New, for NFP support.
496 2018-04-25 Christophe Lyon <christophe.lyon@st.com>
497 Mickaël Guêné <mickael.guene@st.com>
499 * elf/arm.h: Add R_ARM_TLS_GD32_FDPIC, R_ARM_TLS_LDM32_FDPIC,
500 R_ARM_TLS_IE32_FDPIC.
502 2018-04-25 Christophe Lyon <christophe.lyon@st.com>
503 Mickaël Guêné <mickael.guene@st.com>
505 * elf/arm.h (R_ARM_GOTFUNCDESC, R_ARM_GOTOFFFUNCDESC)
507 (R_ARM_FUNCDESC_VALUE): Define new relocations.
509 2018-04-25 Christophe Lyon <christophe.lyon@st.com>
510 Mickaël Guêné <mickael.guene@st.com>
512 * elf/arm.h (EF_ARM_FDPIC): New.
514 2018-04-18 Alan Modra <amodra@gmail.com>
516 * coff/mipspe.h: Delete.
518 2018-04-18 Alan Modra <amodra@gmail.com>
520 * aout/dynix3.h: Delete.
522 2018-04-17 Andrew Sadek <andrew.sadek.se@gmail.com>
524 Microblaze Target: PIC data text relative
526 * bfdlink.h (Add flag): Add new flag @ 'bfd_link_info' struct.
527 * elf/microblaze.h (Add 3 new relocations):
528 R_MICROBLAZE_TEXTPCREL_64, R_MICROBLAZE_TEXTREL_64
529 and R_MICROBLAZE_TEXTREL_32_LO for relax function.
531 2018-04-17 Alan Modra <amodra@gmail.com>
533 * elf/i370.h: Revert removal.
534 * elf/i860.h: Likewise.
535 * elf/i960.h: Likewise.
537 2018-04-16 Alan Modra <amodra@gmail.com>
539 * coff/sparc.h: Delete.
541 2018-04-16 Alan Modra <amodra@gmail.com>
543 * aout/host.h: Remove m68k-aout and m68k-coff support.
544 * aout/hp300hpux.h: Delete.
545 * coff/apollo.h: Delete.
546 * coff/aux-coff.h: Delete.
547 * coff/m68k.h: Delete.
549 2018-04-16 Alan Modra <amodra@gmail.com>
551 * dis-asm.h: Remove sh5 and sh64 support.
553 2018-04-16 Alan Modra <amodra@gmail.com>
555 * coff/internal.h: Remove w65 support.
556 * coff/w65.h: Delete.
558 2018-04-16 Alan Modra <amodra@gmail.com>
560 * coff/we32k.h: Delete.
562 2018-04-16 Alan Modra <amodra@gmail.com>
564 * coff/internal.h: Remove m88k support.
565 * coff/m88k.h: Delete.
566 * opcode/m88k.h: Delete.
568 2018-04-16 Alan Modra <amodra@gmail.com>
570 * elf/i370.h: Delete.
571 * opcode/i370.h: Delete.
573 2018-04-16 Alan Modra <amodra@gmail.com>
575 * coff/h8500.h: Delete.
576 * coff/internal.h: Remove h8500 support.
578 2018-04-16 Alan Modra <amodra@gmail.com>
580 * coff/h8300.h: Delete.
582 2018-04-16 Alan Modra <amodra@gmail.com>
586 2018-04-16 Alan Modra <amodra@gmail.com>
588 * aout/host.h: Remove newsos3 support.
590 2018-04-16 Alan Modra <amodra@gmail.com>
592 * nlm/ChangeLog-9315: Delete.
593 * nlm/alpha-ext.h: Delete.
594 * nlm/common.h: Delete.
595 * nlm/external.h: Delete.
596 * nlm/i386-ext.h: Delete.
597 * nlm/internal.h: Delete.
598 * nlm/ppc-ext.h: Delete.
599 * nlm/sparc32-ext.h: Delete.
601 2018-04-16 Alan Modra <amodra@gmail.com>
603 * opcode/tahoe.h: Delete.
605 2018-04-11 Alan Modra <amodra@gmail.com>
607 * aout/adobe.h: Delete.
608 * aout/reloc.h: Delete.
609 * coff/i860.h: Delete.
610 * coff/i960.h: Delete.
611 * elf/i860.h: Delete.
612 * elf/i960.h: Delete.
613 * opcode/i860.h: Delete.
614 * opcode/i960.h: Delete.
615 * aout/aout64.h (enum reloc_type): Trim off 29k and other unused values.
616 * aout/ar.h (ARMAGB): Remove.
617 * coff/internal.h (struct internal_aouthdr, struct internal_scnhdr,
618 union internal_auxent): Remove i960 support.
620 2018-04-09 Alan Modra <amodra@gmail.com>
622 * elf/ppc.h (R_PPC_PLTSEQ, R_PPC_PLTCALL): Define.
623 * elf/ppc64.h (R_PPC64_PLTSEQ, R_PPC64_PLTCALL): Define.
625 2018-03-28 Renlin Li <renlin.li@arm.com>
628 * elf/aarch64.h: Add relocation number for
629 R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12,
630 R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC,
631 R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12,
632 R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC,
633 R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12,
634 R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC,
635 R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12,
636 R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC.
638 2018-03-28 Nick Clifton <nickc@redhat.com>
641 * opcode/aarch64.h (enum aarch64_opnd): Add
642 AARCH64_OPND_SVE_ADDR_R.
644 2018-03-21 H.J. Lu <hongjiu.lu@intel.com>
646 * elf/common.h (DF_1_KMOD): New.
647 (DF_1_WEAKFILTER): Likewise.
648 (DF_1_NOCOMMON): Likewise.
650 2018-03-14 Kito Cheng <kito.cheng@gmail.com>
652 * opcode/riscv.h (OP_MASK_FUNCT3): New.
653 (OP_SH_FUNCT3): Likewise.
654 (OP_MASK_FUNCT7): Likewise.
655 (OP_SH_FUNCT7): Likewise.
656 (OP_MASK_OP2): Likewise.
657 (OP_SH_OP2): Likewise.
658 (OP_MASK_CFUNCT4): Likewise.
659 (OP_SH_CFUNCT4): Likewise.
660 (OP_MASK_CFUNCT3): Likewise.
661 (OP_SH_CFUNCT3): Likewise.
662 (riscv_insn_types): Likewise.
664 2018-03-13 Nick Clifton <nickc@redhat.com>
667 * coff/pe.h (struct pex64_unwind_info): Add a rawUnwindCodesEnd
670 2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
672 * opcode/i386 (OLDGCC_COMPAT): Removed.
674 2018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
676 * opcode/arm.h (ARM_FEATURE_COPY): Remove macro definition.
678 2018-02-20 Maciej W. Rozycki <macro@mips.com>
680 * opcode/mips.h: Remove `M' operand code.
682 2018-02-12 Zebediah Figura <z.figura12@gmail.com>
684 * coff/msdos.h: New header.
685 * coff/pe.h: Move common defines to msdos.h.
686 * coff/powerpc.h: Likewise.
688 2018-01-13 Nick Clifton <nickc@redhat.com>
692 2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
695 * bfdlink.h (bfd_link_info): Add separate_code.
697 2018-01-04 Jim Wilson <jimw@sifive.com>
699 * opcode/riscv-opc.h (CSR_SBADADDR): Rename to CSR_STVAL. Rename
700 DECLARE_CSR entry. Add alias to map sbadaddr to CSR_STVAL.
701 (CSR_MBADADDR): Rename to CSR_MTVAL. Rename DECLARE_CSR entry.
702 Add alias to map mbadaddr to CSR_MTVAL.
704 2018-01-03 Alan Modra <amodra@gmail.com>
706 Update year range in copyright notice of all files.
708 For older changes see ChangeLog-2017
710 Copyright (C) 2018 Free Software Foundation, Inc.
712 Copying and distribution of this file, with or without modification,
713 are permitted in any medium without royalty provided the copyright
714 notice and this notice are preserved.
720 version-control: never