1 2018-12-06 Andrew Burgess <andrew.burgess@embecosm.com>
3 * dis-asm.h (riscv_symbol_is_valid): Declare.
4 * opcode/riscv.h (RISCV_FAKE_LABEL_NAME): Define.
5 (RISCV_FAKE_LABEL_CHAR): Define.
7 2018-12-03 Kito Cheng <kito@andestech.com>
9 * opcode/riscv.h (riscv_opcode): Change type of xlen_requirement to
12 2018-11-27 Jim Wilson <jimw@sifive.com>
14 * opcode/riscv.h (OP_MASK_CFUNCT6, OP_SH_CFUNCT6): New.
15 (OP_MASK_CFUNCT2, OP_SH_CFUNCT2): New.
17 2018-11-13 Thomas Preud'homme <thomas.preudhomme@arm.com>
19 * opcode/arm.h (ARM_AEXT_V6M_ONLY): Merge into its use in ARM_AEXT_V6M.
20 (ARM_ARCH_V6M_ONLY): Remove.
21 (ARM_EXT_V1, ARM_EXT_V2, ARM_EXT_V2S, ARM_EXT_V3, ARM_EXT_V3M,
22 ARM_EXT_V4, ARM_EXT_V4T, ARM_EXT_V5, ARM_EXT_V5T, ARM_EXT_V5ExP,
23 ARM_EXT_V5E, ARM_EXT_V5J, ARM_EXT_V6, ARM_EXT_V6K, ARM_EXT_V8,
24 ARM_EXT_V6T2, ARM_EXT_DIV, ARM_EXT_V5E_NOTM, ARM_EXT_V6_NOTM,
25 ARM_EXT_V7, ARM_EXT_V7A, ARM_EXT_V7R, ARM_EXT_V7M, ARM_EXT_V6M,
26 ARM_EXT_BARRIER, ARM_EXT_THUMB_MSR, ARM_EXT_V6_DSP, ARM_EXT_MP,
27 ARM_EXT_SEC, ARM_EXT_OS, ARM_EXT_ADIV, ARM_EXT_VIRT, ARM_EXT2_PAN,
28 ARM_EXT2_V8_2A, ARM_EXT2_V8M, ARM_EXT2_ATOMICS, ARM_EXT2_V6T2_V8M,
29 ARM_EXT2_FP16_INST, ARM_EXT2_V8M_MAIN, ARM_EXT2_RAS, ARM_EXT2_V8_3A,
30 ARM_EXT2_V8A, ARM_EXT2_V8_4A, ARM_EXT2_FP16_FML, ARM_EXT2_V8_5A,
31 ARM_EXT2_SB, ARM_EXT2_PREDRES, ARM_CEXT_XSCALE, ARM_CEXT_MAVERICK,
32 ARM_CEXT_IWMMXT, ARM_CEXT_IWMMXT2, FPU_ENDIAN_PURE, FPU_ENDIAN_BIG,
33 FPU_FPA_EXT_V1, FPU_FPA_EXT_V2, FPU_MAVERICK, FPU_VFP_EXT_V1xD,
34 FPU_VFP_EXT_V1, FPU_VFP_EXT_V2, FPU_VFP_EXT_V3xD, FPU_VFP_EXT_V3,
35 FPU_NEON_EXT_V1, FPU_VFP_EXT_D32, FPU_VFP_EXT_FP16, FPU_NEON_EXT_FMA,
36 FPU_VFP_EXT_FMA, FPU_VFP_EXT_ARMV8, FPU_NEON_EXT_ARMV8,
37 FPU_CRYPTO_EXT_ARMV8, CRC_EXT_ARMV8, FPU_VFP_EXT_ARMV8xD,
38 FPU_NEON_EXT_RDMA, FPU_NEON_EXT_DOTPROD, ARM_AEXT_V1, ARM_AEXT_V2,
39 ARM_AEXT_V2S, ARM_AEXT_V3, ARM_AEXT_V3M, ARM_AEXT_V4xM, ARM_AEXT_V4,
40 ARM_AEXT_V4TxM, ARM_AEXT_V4T, ARM_AEXT_V5xM, ARM_AEXT_V5,
41 ARM_AEXT_V5TxM, ARM_AEXT_V5T, ARM_AEXT_V5TExP, ARM_AEXT_V5TE,
42 ARM_AEXT_V5TEJ, ARM_AEXT_V6, ARM_AEXT_V6K, ARM_AEXT_V6Z, ARM_AEXT_V6KZ,
43 ARM_AEXT_V6T2, ARM_AEXT_V6KT2, ARM_AEXT_V6ZT2, ARM_AEXT_V6KZT2,
44 ARM_AEXT_V7_ARM, ARM_AEXT_V7A, ARM_AEXT_V7VE, ARM_AEXT_V7R,
45 ARM_AEXT_NOTM, ARM_AEXT_V6M_ONLY, ARM_AEXT_V6M, ARM_AEXT_V6SM,
46 ARM_AEXT_V7M, ARM_AEXT_V7, ARM_AEXT_V7EM, ARM_AEXT_V8A, ARM_AEXT2_V8A,
47 ARM_AEXT2_V8_1A, ARM_AEXT2_V8_2A, ARM_AEXT2_V8_3A, ARM_AEXT2_V8_4A,
48 ARM_AEXT2_V8_5A, ARM_AEXT_V8M_BASE, ARM_AEXT_V8M_MAIN,
49 ARM_AEXT_V8M_MAIN_DSP, ARM_AEXT2_V8M, ARM_AEXT2_V8M_BASE,
50 ARM_AEXT2_V8M_MAIN, ARM_AEXT2_V8M_MAIN_DSP, ARM_AEXT_V8R,
51 ARM_AEXT2_V8R, FPU_VFP_V1xD, FPU_VFP_V1, FPU_VFP_V2, FPU_VFP_V3D16,
52 FPU_VFP_V3, FPU_VFP_V3xD, FPU_VFP_V4D16, FPU_VFP_V4, FPU_VFP_V4_SP_D16,
53 FPU_VFP_V5D16, FPU_VFP_ARMV8, FPU_NEON_ARMV8, FPU_CRYPTO_ARMV8,
54 FPU_VFP_HARD, FPU_FPA, FPU_ARCH_VFP, FPU_ARCH_FPE, FPU_ARCH_FPA,
55 FPU_ARCH_VFP_V1xD, FPU_ARCH_VFP_V1, FPU_ARCH_VFP_V2,
56 FPU_ARCH_VFP_V3D16_FP16, FPU_ARCH_VFP_V3, FPU_ARCH_VFP_V3_FP16,
57 FPU_ARCH_VFP_V3xD_FP16, FPU_ARCH_NEON_V1, FPU_ARCH_VFP_V3_PLUS_NEON_V1,
58 FPU_ARCH_NEON_FP16, FPU_ARCH_VFP_HARD, FPU_ARCH_VFP_V4,
59 FPU_ARCH_VFP_V4D16, FPU_ARCH_VFP_V4_SP_D16, FPU_ARCH_VFP_V5D16,
60 FPU_ARCH_VFP_V5_SP_D16, FPU_ARCH_NEON_VFP_V4, FPU_ARCH_VFP_ARMV8,
61 FPU_ARCH_NEON_VFP_ARMV8, FPU_ARCH_CRYPTO_NEON_VFP_ARMV8,
62 FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_DOTPROD, ARCH_CRC_ARMV8,
63 FPU_ARCH_NEON_VFP_ARMV8_1, FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1,
64 FPU_ARCH_DOTPROD_NEON_VFP_ARMV8, ARM_ARCH_V1, ARM_ARCH_V2,
65 ARM_ARCH_V2S, ARM_ARCH_V3, ARM_ARCH_V3M, ARM_ARCH_V4xM, ARM_ARCH_V4,
66 ARM_ARCH_V4TxM, ARM_ARCH_V4T, ARM_ARCH_V5xM, ARM_ARCH_V5,
67 ARM_ARCH_V5TxM, ARM_ARCH_V5T, ARM_ARCH_V5TExP, ARM_ARCH_V5TE,
68 ARM_ARCH_V5TEJ, ARM_ARCH_V6, ARM_ARCH_V6K, ARM_ARCH_V6Z, ARM_ARCH_V6KZ,
69 ARM_ARCH_V6T2, ARM_ARCH_V6KT2, ARM_ARCH_V6ZT2, ARM_ARCH_V6KZT2,
70 ARM_ARCH_V6M, ARM_ARCH_V6SM, ARM_ARCH_V7, ARM_ARCH_V7A, ARM_ARCH_V7VE,
71 ARM_ARCH_V7R, ARM_ARCH_V7M, ARM_ARCH_V7EM, ARM_ARCH_V8A,
72 ARM_ARCH_V8A_CRC, ARM_ARCH_V8_1A, ARM_ARCH_V8_2A, ARM_ARCH_V8_3A,
73 ARM_ARCH_V8_4A, ARM_ARCH_V8_5A, ARM_ARCH_V8M_BASE, ARM_ARCH_V8M_MAIN,
74 ARM_ARCH_V8M_MAIN_DSP, ARM_ARCH_V8R): Reindent.
76 2018-11-12 Sudakshina Das <sudi.das@arm.com>
78 * opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_ADDR_SIMPLE_2.
79 (aarch64_insn_class): Add ldstgv_indexed.
81 2018-11-12 Sudakshina Das <sudi.das@arm.com>
83 * opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_ADDR_SIMM11
84 and AARCH64_OPND_ADDR_SIMM13.
85 (aarch64_opnd_qualifier): Add new AARCH64_OPND_QLF_imm_tag.
87 2018-11-12 Sudakshina Das <sudi.das@arm.com>
89 * opcode/aarch64.h (aarch64_opnd): Add
90 AARCH64_OPND_UIMM4_ADDG and AARCH64_OPND_UIMM10 as new enums.
92 2018-11-12 Sudakshina Das <sudi.das@arm.com>
94 * opcode/aarch64.h (AARCH64_FEATURE_MEMTAG): New.
96 2018-11-07 Roman Bolshakov <r.bolshakov@yadro.com>
97 Saagar Jha <saagar@saagarjha.com>
99 * mach-o/external.h (mach_o_nversion_min_command_external): Rename
101 (mach_o_note_command_external): New.
102 (mach_o_build_version_command_external): New.
103 * mach-o/loader.h (BFD_MACH_O_LC_VERSION_MIN_TVOS): Define.
104 (BFD_MACH_O_LC_NOTE): Define.
106 2018-11-06 Romain Margheriti <lilrom13@gmail.com>
109 * mach-o/loader.h: Add BFD_MACH_O_LC_BUILD_VERSION.
111 2018-11-06 Sudakshina Das <sudi.das@arm.com>
113 * opcode/arm.h (ARM_ARCH_V8_5A): Move ARM_EXT2_PREDRES and
115 (ARM_AEXT2_V8_5A): Here.
117 2018-10-26 John Baldwin <jhb@FreeBSD.org>
119 * elf/common.h (AT_FREEBSD_HWCAP2): Define.
121 2018-10-09 Sudakshina Das <sudi.das@arm.com>
123 * opcode/aarch64.h (AARCH64_FEATURE_SSBS): New.
124 (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_SSBS by default.
126 2018-10-09 Sudakshina Das <sudi.das@arm.com>
128 * opcode/aarch64.h (AARCH64_FEATURE_SCXTNUM): New.
129 (AARCH64_FEATURE_ID_PFR2): New.
130 (AARCH64_ARCH_V8_5): Add both by default.
132 2018-10-09 Sudakshina Das <sudi.das@arm.com>
134 * opcode/aarch64.h (AARCH64_FEATURE_BTI): New.
135 (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_BTI by default.
136 (aarch64_opnd): Add AARCH64_OPND_BTI_TARGET.
137 (HINT_OPD_CSYNC, HINT_OPD_C, HINT_OPD_J): New macros to
138 define HINT #imm values.
139 (HINT_OPD_JC, HINT_OPD_NULL): Likewise.
141 2018-10-09 Sudakshina Das <sudi.das@arm.com>
143 * opcode/aarch64.h (AARCH64_FEATURE_RNG): New.
145 2018-10-09 Sudakshina Das <sudi.das@arm.com>
147 * opcode/aarch64.h (AARCH64_FEATURE_CVADP): New.
149 2018-10-09 Sudakshina Das <sudi.das@arm.com>
151 * opcode/aarch64.h (AARCH64_FEATURE_PREDRES): New.
152 (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_PREDRES by default.
153 (aarch64_opnd): Add AARCH64_OPND_SYSREG_SR.
154 (aarch64_sys_regs_sr): Declare new table.
156 2018-10-09 Sudakshina Das <sudi.das@arm.com>
158 * opcode/aarch64.h (AARCH64_FEATURE_SB): New.
159 (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_SB by default.
161 2018-10-09 Sudakshina Das <sudi.das@arm.com>
163 * opcode/aarch64.h (AARCH64_FEATURE_FLAGMANIP): New.
164 (AARCH64_FEATURE_FRINTTS): New.
165 (AARCH64_ARCH_V8_5): Add both by default.
167 2018-10-09 Sudakshina Das <sudi.das@arm.com>
169 * opcode/aarch64.h (AARCH64_FEATURE_V8_5): New.
170 (AARCH64_ARCH_V8_5): New.
172 2018-10-08 Alan Modra <amodra@gmail.com>
174 * bfdlink.h (struct bfd_link_info): Add load_phdrs field.
176 2018-10-05 Sudakshina Das <sudi.das@arm.com>
178 * opcode/arm.h (ARM_EXT2_PREDRES): New.
179 (ARM_ARCH_V8_5A): Add ARM_EXT2_PREDRES by default.
181 2018-10-05 Sudakshina Das <sudi.das@arm.com>
183 * opcode/arm.h (ARM_EXT2_SB): New.
184 (ARM_ARCH_V8_5A): Add ARM_EXT2_SB by default.
186 2018-10-05 Sudakshina Das <sudi.das@arm.com>
188 * opcode/arm.h (ARM_EXT2_V8_5A): New.
189 (ARM_AEXT2_V8_5A, ARM_ARCH_V8_5A): New.
191 2018-10-05 Richard Henderson <rth@twiddle.net>
193 * elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_PCREL_PG21,
194 R_OR1K_GOT_PG21, R_OR1K_TLS_GD_PG21, R_OR1K_TLS_LDM_PG21,
195 R_OR1K_TLS_IE_PG21, R_OR1K_LO13, R_OR1K_GOT_LO13,
196 R_OR1K_TLS_GD_LO13, R_OR1K_TLS_LDM_LO13, R_OR1K_TLS_IE_LO13,
197 R_OR1K_SLO13, R_OR1K_PLTA26.
199 2018-10-05 Richard Henderson <rth@twiddle.net>
201 * elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_AHI16,
202 R_OR1K_GOTOFF_AHI16, R_OR1K_TLS_IE_AHI16, R_OR1K_TLS_LE_AHI16,
203 R_OR1K_SLO16, R_OR1K_GOTOFF_SLO16, R_OR1K_TLS_LE_SLO16.
205 2018-10-03 Tamar Christina <tamar.christina@arm.com>
207 * opcode/aarch64.h (aarch64_inst): Remove.
208 (enum err_type): Add ERR_VFI.
209 (aarch64_is_destructive_by_operands): New.
210 (init_insn_sequence): New.
211 (aarch64_decode_insn): Remove param name.
213 2018-10-03 Tamar Christina <tamar.christina@arm.com>
215 * opcode/aarch64.h (struct aarch64_opcode): Expand verifiers to take
218 2018-10-03 Tamar Christina <tamar.christina@arm.com>
220 * opcode/aarch64.h (enum err_type): New.
221 (aarch64_decode_insn): Use it.
223 2018-10-03 Tamar Christina <tamar.christina@arm.com>
225 * opcode/aarch64.h (struct aarch64_instr_sequence): New.
226 (aarch64_opcode_encode): Use it.
228 2018-10-03 Tamar Christina <tamar.christina@arm.com>
230 * opcode/aarch64.h (struct aarch64_opcode): Add constraints,
231 extend flags field size.
232 (F_SCAN, C_SCAN_MOVPRFX, C_MAX_ELEM): New.
234 2018-10-03 John Darrington <john@darrington.wattle.id.au>
236 * dis-asm.h (print_insn_s12z): New declaration.
238 2018-10-02 Palmer Dabbelt <palmer@sifive.com>
240 * opcode/riscv-opc.h (MATCH_FENCE_TSO): New define.
241 (MASK_FENCE_TSO): Likewise.
243 2018-10-01 Cupertino Miranda <cmiranda@synopsys.com>
245 * arc-reloc.def (ARC_TLS_LE_32): Updated reloc formula.
247 2018-09-21 H.J. Lu <hongjiu.lu@intel.com>
250 * include/elf/internal.h (ELF_SECTION_IN_SEGMENT_1): Don't
251 include zero size sections at start of PT_NOTE segment.
253 2018-09-20 Nelson Chu <nelson.chu1990@gmail.com>
255 * elf/nds32.h: Remove the unused target features.
256 * dis-asm.h (disassemble_init_nds32): Declared.
257 * elf/nds32.h (E_NDS32_NULL): Removed.
258 (E_NDS32_HAS_DSP_INST, E_NDS32_HAS_ZOL): New.
259 * opcode/nds32.h: Ident.
260 (N32_SUB6, INSN_LW): New macros.
261 (enum n32_opcodes): Updated.
262 * elf/nds32.h: Doc fixes.
263 * elf/nds32.h: Add R_NDS32_LSI.
264 * elf/nds32.h: Add new relocations for TLS.
266 2018-09-20 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
268 * elf/common.h (AT_SUN_HWCAP): Rename to ...
269 (AT_SUN_CAP_HW1): ... this. Retain old name for backward
271 (AT_SUN_EMULATOR, AT_SUN_BRANDNAME, AT_SUN_BRAND_AUX1)
272 (AT_SUN_BRAND_AUX2, AT_SUN_BRAND_AUX3, AT_SUN_CAP_HW2): Define.
274 2018-09-05 Simon Marchi <simon.marchi@ericsson.com>
276 * diagnostics.h (DIAGNOSTIC_IGNORE_FORMAT_NONLITERAL): New macro.
278 2018-08-31 Alan Modra <amodra@gmail.com>
280 * elf/ppc64.h (R_PPC64_REL16_HIGH, R_PPC64_REL16_HIGHA),
281 (R_PPC64_REL16_HIGHER, R_PPC64_REL16_HIGHERA),
282 (R_PPC64_REL16_HIGHEST, R_PPC64_REL16_HIGHESTA): Define.
283 (R_PPC64_LO_DS_OPT, R_PPC64_16DX_HA): Bump value.
285 2018-08-30 Kito Cheng <kito@andestech.com>
287 * opcode/riscv.h (MAX_SUBSET_NUM): New.
288 (riscv_opcode): Add xlen_requirement field and change type of
291 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
293 * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS264E.
294 * opcode/mips.h (CPU_XXX): New CPU_GS264E.
296 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
298 * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS464E.
299 * opcode/mips.h (CPU_XXX): New CPU_GS464E.
301 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
303 * elf/mips.h (E_MIPS_MACH_XXX): Rename E_MIPS_MACH_LS3A to
305 (AFL_EXT_XXX): Delete AFL_EXT_LOONGSON_3A.
306 * opcode/mips.h (INSN_XXX): Delete INSN_LOONGSON_3A.
307 (CPU_XXX): Rename CPU_LOONGSON_3A to CPU_GS464.
308 * opcode/mips.h (mips_isa_table): Delete CPU_LOONGSON_3A case.
310 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
312 * elf/mips.h (AFL_ASE_LOONGSON_EXT2): New macro.
313 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT2.
314 * opcode/mips.h (ASE_LOONGSON_EXT2): New macro.
316 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
318 * elf/mips.h (AFL_ASE_LOONGSON_EXT): New macro.
319 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT.
320 * opcode/mips.h (ASE_LOONGSON_EXT): New macro.
322 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
324 * elf/mips.h (AFL_ASE_LOONGSON_CAM): New macro.
325 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_CAM.
326 * opcode/mips.h (ASE_LOONGSON_CAM): New macro.
328 2018-08-24 H.J. Lu <hongjiu.lu@intel.com>
330 * elf/common.h (GNU_PROPERTY_X86_ISA_1_USED): Renamed to ...
331 (GNU_PROPERTY_X86_COMPAT_ISA_1_USED): This.
332 (GNU_PROPERTY_X86_ISA_1_NEEDED): Renamed to ...
333 (GNU_PROPERTY_X86_COMPAT_ISA_1_NEEDED): This.
334 (GNU_PROPERTY_X86_ISA_1_XXX): Renamed to ...
335 (GNU_PROPERTY_X86_COMPAT_ISA_1_XXX): This.
336 (GNU_PROPERTY_X86_UINT32_AND_LO): New.
337 (GNU_PROPERTY_X86_UINT32_AND_HI): Likewise.
338 (GNU_PROPERTY_X86_UINT32_OR_LO): Likewise.
339 (GNU_PROPERTY_X86_UINT32_OR_HI): Likewise.
340 (GNU_PROPERTY_X86_UINT32_OR_AND_LO): Likewise.
341 (GNU_PROPERTY_X86_UINT32_OR_AND_HI): Likewise.
342 (GNU_PROPERTY_X86_ISA_1_CMOV): Likewise.
343 (GNU_PROPERTY_X86_ISA_1_SSE): Likewise.
344 (GNU_PROPERTY_X86_ISA_1_SSE2): Likewise.
345 (GNU_PROPERTY_X86_ISA_1_SSE3): Likewise.
346 (GNU_PROPERTY_X86_ISA_1_SSSE3): Likewise.
347 (GNU_PROPERTY_X86_ISA_1_SSE4_1): Likewise.
348 (GNU_PROPERTY_X86_ISA_1_SSE4_2): Likewise.
349 (GNU_PROPERTY_X86_ISA_1_AVX): Likewise.
350 (GNU_PROPERTY_X86_ISA_1_AVX2): Likewise.
351 (GNU_PROPERTY_X86_ISA_1_FMA): Likewise.
352 (GNU_PROPERTY_X86_ISA_1_AVX512F): Likewise.
353 (GNU_PROPERTY_X86_ISA_1_AVX512CD): Likewise.
354 (GNU_PROPERTY_X86_ISA_1_AVX512ER): Likewise.
355 (GNU_PROPERTY_X86_ISA_1_AVX512PF): Likewise.
356 (GNU_PROPERTY_X86_ISA_1_AVX512VL): Likewise.
357 (GNU_PROPERTY_X86_ISA_1_AVX512DQ): Likewise.
358 (GNU_PROPERTY_X86_ISA_1_AVX512BW): Likewise.
359 (GNU_PROPERTY_X86_ISA_1_AVX512_4FMAPS): Likewise.
360 (GNU_PROPERTY_X86_ISA_1_AVX512_4VNNIW): Likewise.
361 (GNU_PROPERTY_X86_ISA_1_AVX512_BITALG): Likewise.
362 (GNU_PROPERTY_X86_ISA_1_AVX512_IFMA): Likewise.
363 (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI): Likewise.
364 (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI2): Likewise.
365 (GNU_PROPERTY_X86_ISA_1_AVX512_VNNI): Likewise.
366 (GNU_PROPERTY_X86_FEATURE_2_X86): Likewise.
367 (GNU_PROPERTY_X86_FEATURE_2_X87): Likewise.
368 (GNU_PROPERTY_X86_FEATURE_2_MMX): Likewise.
369 (GNU_PROPERTY_X86_FEATURE_2_XMM): Likewise.
370 (GNU_PROPERTY_X86_FEATURE_2_YMM): Likewise.
371 (GNU_PROPERTY_X86_FEATURE_2_ZMM): Likewise.
372 (GNU_PROPERTY_X86_FEATURE_2_FXSR): Likewise.
373 (GNU_PROPERTY_X86_FEATURE_2_XSAVE): Likewise.
374 (GNU_PROPERTY_X86_FEATURE_2_XSAVEOPT): Likewise.
375 (GNU_PROPERTY_X86_FEATURE_2_XSAVEC): Likewise.
376 (GNU_PROPERTY_X86_FEATURE_1_AND): Updated to
377 (GNU_PROPERTY_X86_UINT32_AND_LO + 0).
378 (GNU_PROPERTY_X86_ISA_1_NEEDED): Defined to
379 (GNU_PROPERTY_X86_UINT32_OR_LO + 0).
380 (GNU_PROPERTY_X86_FEATURE_2_NEEDED): New. Defined to
381 (GNU_PROPERTY_X86_UINT32_OR_LO + 1).
382 (GNU_PROPERTY_X86_ISA_1_USED): Defined to
383 (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 0).
384 (GNU_PROPERTY_X86_FEATURE_2_USED): New. Defined to
385 (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 1).
387 2018-08-24 H.J. Lu <hongjiu.lu@intel.com>
389 * elf/common.h (GNU_PROPERTY_X86_UINT32_VALID): New.
391 2018-08-21 John Darrington <john@darrington.wattle.id.au>
393 * elf/s12z.h: Rename R_S12Z_UKNWN_3 to R_S12Z_EXT18.
395 2018-08-21 Alan Modra <amodra@gmail.com>
397 * opcode/ppc.h (struct powerpc_operand): Correct "insert" comment.
398 Mention use of "extract" function to provide default value.
399 (PPC_OPERAND_OPTIONAL_VALUE): Delete.
400 (ppc_optional_operand_value): Rewrite to use extract function.
402 2018-08-18 John Darrington <john@darrington.wattle.id.au>
404 * opcode/s12z.h: New file.
406 2018-08-09 Richard Earnshaw <rearnsha@arm.com>
408 * elf/arm.h: Updated comments for e_flags definitions.
410 2018-08-06 Claudiu Zissulescu <claziss@synopsys.com>
412 * elf/arc.h (Tag_ARC_ATR_version): New tag.
414 2018-08-06 Claudiu Zissulescu <claziss@synopsys.com>
416 * opcode/arc.h (ARC_OPCODE_ARCV1): Define.
418 2018-08-01 Richard Earnshaw <rearnsha@arm.com>
421 2018-07-26 Martin Liska <mliska@suse.cz>
424 * libiberty.h (make_temp_file_with_prefix): New function.
426 2018-07-30 Jim Wilson <jimw@sifive.com>
428 * opcode/riscv.h (INSN_TYPE, INSN_BRANCH, INSN_CONDBRANCH, INSN_JSR)
429 (INSN_DREF, INSN_DATA_SIZE, INSN_DATA_SIZE_SHIFT, INSN_1_BYTE)
430 (INSN_2_BYTE, INSN_4_BYTE, INSN_8_BYTE, INSN_16_BYTE): New.
432 2018-07-30 Andrew Jenner <andrew@codesourcery.com>
434 * elf/common.h (EM_CSKY, EM_CSKY_OLD): Define.
435 * elf/csky.h: New file.
437 2018-07-27 Chenghua Xu <paul.hua.gm@gmail.com>
438 Maciej W. Rozycki <macro@linux-mips.org>
440 * elf/mips.h (AFL_ASE_MASK): Correct typo.
442 2018-07-26 Alex Chadwick <Alex.Chadwick@cl.cam.ac.uk>
444 * opcode/ppc.h (PPC_OPCODE_750): Adjust comment.
446 2018-07-26 Alan Modra <amodra@gmail.com>
448 * elf/ppc64.h: Specify byte offset to local entry for values
449 of two to six in STO_PPC64_LOCAL_MASK. Clarify r2 return
450 value for such functions when entering via global entry point.
451 Specify meaning of a value of one in STO_PPC64_LOCAL_MASK.
453 2018-07-24 Alan Modra <amodra@gmail.com>
456 * elf/common.h (SHT_SYMTAB_SHNDX): Fix comment typo.
458 2018-07-20 Chenghua Xu <paul.hua.gm@gmail.com>
459 Maciej W. Rozycki <macro@mips.com>
461 * elf/mips.h (AFL_ASE_MMI): New macro.
462 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_MMI.
463 * opcode/mips.h (ASE_LOONGSON_MMI): New macro.
465 2018-07-17 Maciej W. Rozycki <macro@mips.com>
467 * bfdlink.h (bfd_link_hash_entry): Add `rel_from_abs' member.
469 2018-07-06 Alan Modra <amodra@gmail.com>
471 * diagnostics.h: Comment on macro usage.
473 2018-07-05 Simon Marchi <simon.marchi@polymtl.ca>
475 * diagnostics.h (DIAGNOSTIC_IGNORE_DEPRECATED_DECLARATIONS):
478 2018-07-02 Maciej W. Rozycki <macro@mips.com>
481 * dis-asm.h (disasm_option_arg_t): New typedef.
482 (disasm_options_and_args_t): Likewise.
483 (disasm_options_t): Add `arg' member, document members.
484 (disassembler_options_mips): New prototype.
485 (disassembler_options_arm, disassembler_options_powerpc)
486 (disassembler_options_s390): Update prototypes.
488 2018-06-29 Tamar Christina <tamar.christina@arm.com>
491 *opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_Em16.
493 2018-06-26 Alan Modra <amodra@gmail.com>
495 * elf/internal.h (ELF_SECTION_IN_SEGMENT): Revert last change.
497 2018-06-24 Nick Clifton <nickc@redhat.com>
501 2018-06-21 Alan Hayward <alan.hayward@arm.com>
503 * elf/internal.h (ELF_SECTION_IN_SEGMENT): Don’t check addresses
506 2018-06-19 Simon Marchi <simon.marchi@ericsson.com>
510 2018-05-24 Tom Rix <trix@juniper.net>
512 * dwarf2.def (DW_FORM_strx*, DW_FORM_addrx*): New.
514 2017-11-20 Kito Cheng <kito.cheng@gmail.com>
516 * longlong.h [__riscv] (__umulsidi3): Define.
517 [__riscv] (umul_ppmm): Likewise.
518 [__riscv] (__muluw3): Likewise.
520 2018-06-14 Faraz Shahbazker <Faraz.Shahbazker@mips.com>
522 * elf/mips.h (AFL_ASE_GINV, AFL_ASE_RESERVED1): New macros.
523 (AFL_ASE_MASK): Update to include AFL_ASE_GINV.
524 * opcode/mips.h: Document "+\" operand format.
525 (ASE_GINV): New macro.
527 2018-06-13 Scott Egerton <scott.egerton@imgtec.com>
528 Faraz Shahbazker <Faraz.Shahbazker@mips.com>
530 * elf/mips.h (AFL_ASE_CRC): New macro.
531 (AFL_ASE_MASK): Update to include AFL_ASE_CRC.
532 * opcode/mips.h (ASE_CRC): New macro.
533 * opcode/mips.h (ASE_CRC64): Likewise.
535 2018-06-04 Max Filippov <jcmvbkbc@gmail.com>
537 * elf/xtensa.h (xtensa_read_table_entries)
538 (xtensa_compute_fill_extra_space): New declarations.
540 2018-06-04 H.J. Lu <hongjiu.lu@intel.com>
542 * diagnostics.h (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): Always
545 2018-06-04 H.J. Lu <hongjiu.lu@intel.com>
547 * diagnostics.h (DIAGNOSTIC_STRINGIFY_1): New.
548 (DIAGNOSTIC_STRINGIFY): Likewise.
549 (DIAGNOSTIC_IGNORE): Replace STRINGIFY with DIAGNOSTIC_STRINGIFY.
550 (DIAGNOSTIC_IGNORE_SELF_MOVE): Define empty if not defined.
551 (DIAGNOSTIC_IGNORE_DEPRECATED_REGISTER): Likewise.
552 (DIAGNOSTIC_IGNORE_UNUSED_FUNCTION): Likewise.
553 (DIAGNOSTIC_IGNORE_SWITCH_DIFFERENT_ENUM_TYPES): Likewise.
554 (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): New.
556 2018-06-01 H.J. Lu <hongjiu.lu@intel.com>
558 * diagnostics.h: Moved from ../gdb/common/diagnostics.h.
560 2018-05-28 Bernd Edlinger <bernd.edlinger@hotmail.de>
562 * splay-tree.h (splay_tree_compare_strings,
563 splay_tree_delete_pointers): Declare new utility functions.
565 2018-05-21 Peter Bergner <bergner@vnet.ibm.com.com>
567 * opcode/ppc.h (PPC_OPERAND_FAKE): Delete macro.
569 2018-05-18 Kito Cheng <kito.cheng@gmail.com>
571 * elf/riscv.h (EF_RISCV_RVE): New define.
573 2018-05-18 John Darrington <john@darrington.wattle.id.au>
575 * elf/s12z.h: New header.
577 2018-05-15 Tamar Christina <tamar.christina@arm.com>
580 * opcode/aarch64.h (F_SYS_READ, F_SYS_WRITE): New.
582 2018-05-15 Tamar Christina <tamar.christina@arm.com>
585 * opcode/aarch64.h (aarch64_operand_error): Add non_fatal.
586 (aarch64_print_operand): Support notes.
588 2018-05-15 Tamar Christina <tamar.christina@arm.com>
591 * opcode/aarch64.h (aarch64_opnd_info): Change sysreg to struct.
592 (aarch64_decode_insn): Accept error struct.
594 2018-05-15 Francois H. Theron <francois.theron@netronome.com>
596 * opcode/nfp.h: Use uint64_t instead of bfd_vma.
598 2018-05-10 John Darrington <john@darrington.wattle.id.au>
600 * elf/common.h (EM_S12Z): New macro.
602 2018-05-09 Sebastian Rasmussen <sebras@gmail.com>
604 * mach-o/unwind.h (MACH_O_UNWIND_X86_64_RBP_FRAME_REGISTERS):
605 Rename from MACH_O_UNWIND_X86_64_RBP_FRAME_REGSITERS.
606 (MACH_O_UNWIND_X86_EBP_FRAME_REGISTERS): Rename from
607 MACH_O_UNWIND_X86_EBP_FRAME_REGSITERS.
609 2018-05-08 Jim Wilson <jimw@sifive.com>
611 * opcode/riscv-opc.h (MATCH_C_SRLI64, MASK_C_SRLI64): New.
612 (MATCH_C_SRAI64, MASK_C_SRAI64): New.
613 (MATCH_C_SLLI64, MASK_C_SLLI64): New.
615 2018-05-07 Peter Bergner <bergner@vnet.ibm.com.com>
617 * opcode/ppc.h (powerpc_num_opcodes): Change type to unsigned.
618 (vle_num_opcodes): Likewise.
619 (spe2_num_opcodes): Likewise.
621 2018-05-04 Alan Modra <amodra@gmail.com>
623 * ansidecl.h: Import from gcc.
624 * coff/internal.h (struct internal_scnhdr): Add ATTRIBUTE_NONSTRING
626 (struct internal_syment): Add ATTRIBUTE_NONSTRING to _n_name.
628 2018-04-30 Francois H. Theron <francois.theron@netronome.com>
630 * dis-asm.h: Added print_nfp_disassembler_options prototype.
631 * elf/common.h: Added EM_NFP, officially assigned. See Google Group
632 Generic System V Application Binary Interface.
633 * elf/nfp.h: New, for NFP support.
634 * opcode/nfp.h: New, for NFP support.
636 2018-04-25 Christophe Lyon <christophe.lyon@st.com>
637 Mickaël Guêné <mickael.guene@st.com>
639 * elf/arm.h: Add R_ARM_TLS_GD32_FDPIC, R_ARM_TLS_LDM32_FDPIC,
640 R_ARM_TLS_IE32_FDPIC.
642 2018-04-25 Christophe Lyon <christophe.lyon@st.com>
643 Mickaël Guêné <mickael.guene@st.com>
645 * elf/arm.h (R_ARM_GOTFUNCDESC, R_ARM_GOTOFFFUNCDESC)
647 (R_ARM_FUNCDESC_VALUE): Define new relocations.
649 2018-04-25 Christophe Lyon <christophe.lyon@st.com>
650 Mickaël Guêné <mickael.guene@st.com>
652 * elf/arm.h (EF_ARM_FDPIC): New.
654 2018-04-18 Alan Modra <amodra@gmail.com>
656 * coff/mipspe.h: Delete.
658 2018-04-18 Alan Modra <amodra@gmail.com>
660 * aout/dynix3.h: Delete.
662 2018-04-17 Andrew Sadek <andrew.sadek.se@gmail.com>
664 Microblaze Target: PIC data text relative
666 * bfdlink.h (Add flag): Add new flag @ 'bfd_link_info' struct.
667 * elf/microblaze.h (Add 3 new relocations):
668 R_MICROBLAZE_TEXTPCREL_64, R_MICROBLAZE_TEXTREL_64
669 and R_MICROBLAZE_TEXTREL_32_LO for relax function.
671 2018-04-17 Alan Modra <amodra@gmail.com>
673 * elf/i370.h: Revert removal.
674 * elf/i860.h: Likewise.
675 * elf/i960.h: Likewise.
677 2018-04-16 Alan Modra <amodra@gmail.com>
679 * coff/sparc.h: Delete.
681 2018-04-16 Alan Modra <amodra@gmail.com>
683 * aout/host.h: Remove m68k-aout and m68k-coff support.
684 * aout/hp300hpux.h: Delete.
685 * coff/apollo.h: Delete.
686 * coff/aux-coff.h: Delete.
687 * coff/m68k.h: Delete.
689 2018-04-16 Alan Modra <amodra@gmail.com>
691 * dis-asm.h: Remove sh5 and sh64 support.
693 2018-04-16 Alan Modra <amodra@gmail.com>
695 * coff/internal.h: Remove w65 support.
696 * coff/w65.h: Delete.
698 2018-04-16 Alan Modra <amodra@gmail.com>
700 * coff/we32k.h: Delete.
702 2018-04-16 Alan Modra <amodra@gmail.com>
704 * coff/internal.h: Remove m88k support.
705 * coff/m88k.h: Delete.
706 * opcode/m88k.h: Delete.
708 2018-04-16 Alan Modra <amodra@gmail.com>
710 * elf/i370.h: Delete.
711 * opcode/i370.h: Delete.
713 2018-04-16 Alan Modra <amodra@gmail.com>
715 * coff/h8500.h: Delete.
716 * coff/internal.h: Remove h8500 support.
718 2018-04-16 Alan Modra <amodra@gmail.com>
720 * coff/h8300.h: Delete.
722 2018-04-16 Alan Modra <amodra@gmail.com>
726 2018-04-16 Alan Modra <amodra@gmail.com>
728 * aout/host.h: Remove newsos3 support.
730 2018-04-16 Alan Modra <amodra@gmail.com>
732 * nlm/ChangeLog-9315: Delete.
733 * nlm/alpha-ext.h: Delete.
734 * nlm/common.h: Delete.
735 * nlm/external.h: Delete.
736 * nlm/i386-ext.h: Delete.
737 * nlm/internal.h: Delete.
738 * nlm/ppc-ext.h: Delete.
739 * nlm/sparc32-ext.h: Delete.
741 2018-04-16 Alan Modra <amodra@gmail.com>
743 * opcode/tahoe.h: Delete.
745 2018-04-11 Alan Modra <amodra@gmail.com>
747 * aout/adobe.h: Delete.
748 * aout/reloc.h: Delete.
749 * coff/i860.h: Delete.
750 * coff/i960.h: Delete.
751 * elf/i860.h: Delete.
752 * elf/i960.h: Delete.
753 * opcode/i860.h: Delete.
754 * opcode/i960.h: Delete.
755 * aout/aout64.h (enum reloc_type): Trim off 29k and other unused values.
756 * aout/ar.h (ARMAGB): Remove.
757 * coff/internal.h (struct internal_aouthdr, struct internal_scnhdr,
758 union internal_auxent): Remove i960 support.
760 2018-04-09 Alan Modra <amodra@gmail.com>
762 * elf/ppc.h (R_PPC_PLTSEQ, R_PPC_PLTCALL): Define.
763 * elf/ppc64.h (R_PPC64_PLTSEQ, R_PPC64_PLTCALL): Define.
765 2018-03-28 Renlin Li <renlin.li@arm.com>
768 * elf/aarch64.h: Add relocation number for
769 R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12,
770 R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC,
771 R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12,
772 R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC,
773 R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12,
774 R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC,
775 R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12,
776 R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC.
778 2018-03-28 Nick Clifton <nickc@redhat.com>
781 * opcode/aarch64.h (enum aarch64_opnd): Add
782 AARCH64_OPND_SVE_ADDR_R.
784 2018-03-21 H.J. Lu <hongjiu.lu@intel.com>
786 * elf/common.h (DF_1_KMOD): New.
787 (DF_1_WEAKFILTER): Likewise.
788 (DF_1_NOCOMMON): Likewise.
790 2018-03-14 Kito Cheng <kito.cheng@gmail.com>
792 * opcode/riscv.h (OP_MASK_FUNCT3): New.
793 (OP_SH_FUNCT3): Likewise.
794 (OP_MASK_FUNCT7): Likewise.
795 (OP_SH_FUNCT7): Likewise.
796 (OP_MASK_OP2): Likewise.
797 (OP_SH_OP2): Likewise.
798 (OP_MASK_CFUNCT4): Likewise.
799 (OP_SH_CFUNCT4): Likewise.
800 (OP_MASK_CFUNCT3): Likewise.
801 (OP_SH_CFUNCT3): Likewise.
802 (riscv_insn_types): Likewise.
804 2018-03-13 Nick Clifton <nickc@redhat.com>
807 * coff/pe.h (struct pex64_unwind_info): Add a rawUnwindCodesEnd
810 2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
812 * opcode/i386 (OLDGCC_COMPAT): Removed.
814 2018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
816 * opcode/arm.h (ARM_FEATURE_COPY): Remove macro definition.
818 2018-02-20 Maciej W. Rozycki <macro@mips.com>
820 * opcode/mips.h: Remove `M' operand code.
822 2018-02-12 Zebediah Figura <z.figura12@gmail.com>
824 * coff/msdos.h: New header.
825 * coff/pe.h: Move common defines to msdos.h.
826 * coff/powerpc.h: Likewise.
828 2018-01-13 Nick Clifton <nickc@redhat.com>
832 2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
835 * bfdlink.h (bfd_link_info): Add separate_code.
837 2018-01-04 Jim Wilson <jimw@sifive.com>
839 * opcode/riscv-opc.h (CSR_SBADADDR): Rename to CSR_STVAL. Rename
840 DECLARE_CSR entry. Add alias to map sbadaddr to CSR_STVAL.
841 (CSR_MBADADDR): Rename to CSR_MTVAL. Rename DECLARE_CSR entry.
842 Add alias to map mbadaddr to CSR_MTVAL.
844 2018-01-03 Alan Modra <amodra@gmail.com>
846 Update year range in copyright notice of all files.
848 For older changes see ChangeLog-2017
850 Copyright (C) 2018 Free Software Foundation, Inc.
852 Copying and distribution of this file, with or without modification,
853 are permitted in any medium without royalty provided the copyright
854 notice and this notice are preserved.
860 version-control: never